/**
* @brief Configure CPU clock.
* @param None
* @retval None
*/
void ClockConfigure ( void )
{
/* Enable HSE (High Speed External) clock */
RST_CLK_HSEconfig(RST_CLK_HSE_ON);
if (RST_CLK_HSEstatus() == ERROR) {
while (1);
}
/* Configures the CPU_PLL clock source */
RST_CLK_CPU_PLLconfig(RST_CLK_CPU_PLLsrcHSEdiv1, RST_CLK_CPU_PLLmul10);
/* Enables the CPU_PLL */
RST_CLK_CPU_PLLcmd(ENABLE);
if (RST_CLK_CPU_PLLstatus() == ERROR) {
while (1);
}
/* Enables the RST_CLK_PCLK_EEPROM */
RST_CLK_PCLKcmd(RST_CLK_PCLK_EEPROM, ENABLE);
/* Sets the code latency value */
EEPROM_SetLatency(EEPROM_Latency_3);
/* Select the CPU_PLL output as input for CPU_C3_SEL */
RST_CLK_CPU_PLLuse(ENABLE);
/* Set CPUClk Prescaler */
RST_CLK_CPUclkPrescaler(RST_CLK_CPUclkDIV1);
/* Select the CPU clock source */
RST_CLK_CPUclkSelection(RST_CLK_CPUclkCPU_C3);
}
void BRD_Clock_Init_HSE_PLL(uint32_t PLL_Mul_sub1)
{
uint32_t freqCPU;
RST_CLK_DeInit();
/* Enable HSE (High Speed External) clock */
RST_CLK_HSEconfig(RST_CLK_HSE_ON);
while (RST_CLK_HSEstatus() != SUCCESS);
// /* Configures the CPU_PLL clock source */
RST_CLK_CPU_PLLconfig(RST_CLK_CPU_PLLsrcHSEdiv1, PLL_Mul_sub1);
/* Enables the CPU_PLL */
RST_CLK_CPU_PLLcmd(ENABLE);
while (RST_CLK_CPU_PLLstatus() == ERROR);
/* Enables the RST_CLK_PCLK_EEPROM */
RST_CLK_PCLKcmd(RST_CLK_PCLK_EEPROM, ENABLE);
/* Sets the code latency value */
freqCPU = HSE_Value * (PLL_Mul_sub1 + 1);
if (freqCPU < 25E+6)
EEPROM_SetLatency(EEPROM_Latency_0);
else if (freqCPU < 50E+6)
EEPROM_SetLatency(EEPROM_Latency_1);
else if (freqCPU < 75E+6)
EEPROM_SetLatency(EEPROM_Latency_2);
else if (freqCPU < 100E+6)
EEPROM_SetLatency(EEPROM_Latency_3);
else if (freqCPU < 125E+6)
EEPROM_SetLatency(EEPROM_Latency_4);
else //if (PLL_Mul * HSE_Value <= 150E+6)
EEPROM_SetLatency(EEPROM_Latency_5);
// Additional Supply Power
if (freqCPU < 40E+6)
SetSelectRI(RI_till_40MHz);
else if (freqCPU < 80E+6)
SetSelectRI(RI_till_80MHz);
else
SetSelectRI(RI_over_80MHz);
/* Select the CPU_PLL output as input for CPU_C3_SEL */
RST_CLK_CPU_PLLuse(ENABLE);
/* Set CPUClk Prescaler */
RST_CLK_CPUclkPrescaler(RST_CLK_CPUclkDIV1);
/* Select the CPU clock source */
RST_CLK_CPUclkSelection(RST_CLK_CPUclkCPU_C3);
// Update System Clock
BRD_CPU_CLK = freqCPU;
}