Exemple #1
0
/**Function*************************************************************

  Synopsis    []

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
int Cec_ManHandleSpecialCases( Gia_Man_t * p, Cec_ParCec_t * pPars )
{
    Gia_Obj_t * pObj1, * pObj2;
    Gia_Obj_t * pDri1, * pDri2;
    int i;
    abctime clk = Abc_Clock();
    Gia_ManSetPhase( p );
    Gia_ManForEachPo( p, pObj1, i )
    {
        pObj2 = Gia_ManPo( p, ++i );
        // check if they different on all-0 pattern
        // (for example, when they have the same driver but complemented)
        if ( Gia_ObjPhase(pObj1) != Gia_ObjPhase(pObj2) )
        {
            Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different phase).  ", i/2 );
            Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
            pPars->iOutFail = i/2;
            Cec_ManTransformPattern( p, i/2, NULL );
            return 0;
        }
        // get the drivers
        pDri1 = Gia_ObjFanin0(pObj1);
        pDri2 = Gia_ObjFanin0(pObj2);
        // drivers are different PIs
        if ( Gia_ObjIsPi(p, pDri1) && Gia_ObjIsPi(p, pDri2) && pDri1 != pDri2 )
        {
            Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different PIs).  ", i/2 );
            Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
            pPars->iOutFail = i/2;
            Cec_ManTransformPattern( p, i/2, NULL );
            // if their compl attributes are the same - one should be complemented
            assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
            Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
            return 0;
        }
        // one of the drivers is a PI; another is a constant 0
        if ( (Gia_ObjIsPi(p, pDri1) && Gia_ObjIsConst0(pDri2)) || 
             (Gia_ObjIsPi(p, pDri2) && Gia_ObjIsConst0(pDri1)) )
        {
            Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (PI vs. constant).  ", i/2 );
            Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
            pPars->iOutFail = i/2;
            Cec_ManTransformPattern( p, i/2, NULL );
            // the compl attributes are the same - the PI should be complemented
            assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
            if ( Gia_ObjIsPi(p, pDri1) )
                Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
            else
                Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri2) );
            return 0;
        }
    }
/**Function*************************************************************

  Synopsis    []

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Bmc_Load_t * Bmc_LoadStart( Gia_Man_t * pGia )
{
    Bmc_Load_t * p;
    int Lit;
    Gia_ManSetPhase( pGia );
    Gia_ManCleanValue( pGia );
    Gia_ManCreateRefs( pGia );
    p = ABC_CALLOC( Bmc_Load_t, 1 );
    p->pGia      = pGia;
    p->pSat      = sat_solver_new();
    p->vSat2Id   = Vec_IntAlloc( 1000 );
    Vec_IntPush( p->vSat2Id, 0 );
    // create constant node
    Lit = Abc_Var2Lit( Bmc_LoadGetSatVar(p, 0), 1 );
    sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
    return p;
}
/**Function*************************************************************

  Synopsis    [Duplicates the AIG while retiming the registers to the cut.]

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
{
    Gia_Man_t * pNew, * pTemp;
    Gia_Obj_t * pObj, * pObjRi, * pObjRo;
    int i;
    // create the new manager
    pNew = Gia_ManStart( Gia_ManObjNum(p) );
    pNew->pName = Gia_UtilStrsav( p->pName );
    Gia_ManHashAlloc( pNew );
    // create the true PIs
    Gia_ManFillValue( p );
    Gia_ManSetPhase( p );
    Gia_ManConst0(p)->Value = 0;
    Gia_ManForEachPi( p, pObj, i )
        pObj->Value = Gia_ManAppendCi( pNew );
    // create the registers
    Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
        pObj->Value = Gia_LitNotCond( Gia_ManAppendCi(pNew), pObj->fPhase );
    // duplicate logic above the cut
    Gia_ManForEachCo( p, pObj, i )
        Gia_ManRetimeDup_rec( pNew, Gia_ObjFanin0(pObj) );
    // create the true POs
    Gia_ManForEachPo( p, pObj, i )
        Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
    // remember value in LI
    Gia_ManForEachRi( p, pObj, i )
        pObj->Value = Gia_ObjFanin0Copy(pObj);
    // transfer values from the LIs to the LOs
    Gia_ManForEachRiRo( p, pObjRi, pObjRo, i )
        pObjRo->Value = pObjRi->Value;
    // erase the data values on the internal nodes of the cut
    Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
        if ( Gia_ObjIsAnd(pObj) )
            pObj->Value = ~0;
    // duplicate logic below the cut
    Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
    {
        Gia_ManRetimeDup_rec( pNew, pObj );
        Gia_ManAppendCo( pNew, Gia_LitNotCond( pObj->Value, pObj->fPhase ) );
    }
Exemple #4
0
/**Function*************************************************************

  Synopsis    [Performs AIG shrinking using the current mapping.]

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Gia_Man_t * Gia_ManMapShrink4( Gia_Man_t * p, int fKeepLevel, int fVerbose )
{
    Vec_Int_t * vLeaves, * vTruth, * vVisited, * vLeavesBest;
    Gia_Man_t * pNew, * pTemp;
    Gia_Obj_t * pObj, * pFanin;
    unsigned * pTruth;
    int i, k, iFan;
    abctime clk = Abc_Clock();
//    int ClassCounts[222] = {0};
    int * pLutClass, Counter = 0;
    assert( p->pMapping != NULL );
    if ( Gia_ManLutSizeMax( p ) > 4 )
    {
        printf( "Resynthesis is not performed when nodes have more than 4 inputs.\n" );
        return NULL;
    }
    pLutClass   = ABC_CALLOC( int, Gia_ManObjNum(p) );
    vLeaves     = Vec_IntAlloc( 0 );
    vTruth      = Vec_IntAlloc( (1<<16) );
    vVisited    = Vec_IntAlloc( 0 );
    vLeavesBest = Vec_IntAlloc( 4 );
    // prepare the library
    Dar_LibPrepare( 5 ); 
    // clean the old manager
    Gia_ManCleanTruth( p );
    Gia_ManSetPhase( p );
    Gia_ManFillValue( p );
    Gia_ManConst0(p)->Value = 0;
    // start the new manager
    pNew = Gia_ManStart( Gia_ManObjNum(p) );
    pNew->pName = Abc_UtilStrsav( p->pName );
    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
    Gia_ManHashAlloc( pNew );
    Gia_ManCleanLevels( pNew, Gia_ManObjNum(p) );
    Gia_ManForEachObj1( p, pObj, i )
    {
        if ( Gia_ObjIsCi(pObj) )
        {
            pObj->Value = Gia_ManAppendCi( pNew );
            if ( p->vLevels )
                Gia_ObjSetLevel( pNew, Gia_ObjFromLit(pNew, Gia_ObjValue(pObj)), Gia_ObjLevel(p, pObj) );
        }
        else if ( Gia_ObjIsCo(pObj) )
        {
            pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
        }
        else if ( Gia_ObjIsLut(p, i) )
        {
            Counter++;
            // collect leaves of this gate
            Vec_IntClear( vLeaves );
            Gia_LutForEachFanin( p, i, iFan, k )
                Vec_IntPush( vLeaves, iFan );
            for ( ; k < 4; k++ )
                Vec_IntPush( vLeaves, 0 );
            //.compute the truth table 
            pTruth = Gia_ManConvertAigToTruth( p, pObj, vLeaves, vTruth, vVisited );
            // change from node IDs to their literals
            Gia_ManForEachObjVec( vLeaves, p, pFanin, k )
            {
                assert( Gia_ObjValue(pFanin) != ~0 ); 
                Vec_IntWriteEntry( vLeaves, k, Gia_ObjValue(pFanin) );
            }
            // derive new structre
            if ( Gia_ManTruthIsConst0(pTruth, Vec_IntSize(vLeaves)) )
                pObj->Value = 0;
            else if ( Gia_ManTruthIsConst1(pTruth, Vec_IntSize(vLeaves)) )
                pObj->Value = 1;
            else
            {
                pObj->Value = Dar_LibEvalBuild( pNew, vLeaves, 0xffff & *pTruth, fKeepLevel, vLeavesBest );
                pObj->Value = Abc_LitNotCond( pObj->Value, Gia_ObjPhaseRealLit(pNew, pObj->Value) ^ pObj->fPhase );
            }
        }
    }