void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
{
/* DA830/OMAP-L137 has 3 instances of McASP */
if (cpu_is_davinci_da830() && id == 1) {
da830_mcasp1_device.dev.platform_data = pdata;
platform_device_register(&da830_mcasp1_device);
} else if (cpu_is_davinci_da850()) {
da850_mcasp_device.dev.platform_data = pdata;
platform_device_register(&da850_mcasp_device);
}
}
int __init da8xx_register_edma(void)
{
struct platform_device *pdev;
if (cpu_is_davinci_da830())
pdev = &da830_edma_device;
else if (cpu_is_davinci_da850())
pdev = &da850_edma_device;
else
return -ENODEV;
return platform_device_register(pdev);
}
int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
{
if (instance < 0 || instance > 1)
return -EINVAL;
da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
if (instance == 1 && cpu_is_davinci_da850()) {
da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
}
return platform_device_register(&da8xx_spi_device[instance]);
}
int __init davinci_serial_init(struct davinci_uart_config *info)
{
int i;
char name[16];
struct clk *uart_clk;
struct davinci_soc_info *soc_info = &davinci_soc_info;
struct device *dev = &soc_info->serial_dev->dev;
struct plat_serial8250_port *p = dev->platform_data;
/*
* Make sure the serial ports are muxed on at this point.
* You have to mux them off in device drivers later on if not needed.
*/
for (i = 0; p->flags; i++, p++) {
if (!(info->enabled_uarts & (1 << i)))
continue;
sprintf(name, "uart%d", i);
uart_clk = clk_get(dev, name);
if (IS_ERR(uart_clk)) {
printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
__func__, __LINE__, i);
continue;
}
clk_enable(uart_clk);
p->uartclk = clk_get_rate(uart_clk);
p->clk = uart_clk;
if (!p->membase && p->mapbase) {
p->membase = ioremap(p->mapbase, SZ_4K);
if (p->membase)
p->flags &= ~UPF_IOREMAP;
else
pr_err("uart regs ioremap failed\n");
}
if (p->membase && ((p->type != PORT_AR7) ||
cpu_is_davinci_da850() ||
cpu_is_davinci_da830()))
davinci_serial_reset(p);
}
return platform_device_register(soc_info->serial_dev);
}
/* Enable or disable a PSC domain */
void davinci_psc_config(unsigned int domain, unsigned int ctlr,
unsigned int id, char enable)
{
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
void __iomem *psc_base;
struct davinci_soc_info *soc_info = &davinci_soc_info;
u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
(int)soc_info->psc_bases, ctlr);
return;
}
psc_base = soc_info->psc_bases[ctlr];
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
mdctl &= ~MDSTAT_STATE_MASK;
mdctl |= next_state;
/* For SATA force the domain turn on */
if (cpu_is_davinci_da850() && (id == 8) && (ctlr == 1))
mdctl |= 0x80000000;
__raw_writel(mdctl, psc_base + MDCTL + 4 * id);
pdstat = __raw_readl(psc_base + PDSTAT);
if ((pdstat & 0x00000001) == 0) {
pdctl1 = __raw_readl(psc_base + PDCTL1);
pdctl1 |= 0x1;
__raw_writel(pdctl1, psc_base + PDCTL1);
ptcmd = 1 << domain;
__raw_writel(ptcmd, psc_base + PTCMD);
do {
epcpr = __raw_readl(psc_base + EPCPR);
} while ((((epcpr >> domain) & 1) == 0));
pdctl1 = __raw_readl(psc_base + PDCTL1);
pdctl1 |= 0x100;
__raw_writel(pdctl1, psc_base + PDCTL1);
do {
ptstat = __raw_readl(psc_base +
PTSTAT);
} while (!(((ptstat >> domain) & 1) == 0));
} else {
int __init da8xx_register_spi(int instance, struct spi_board_info *info,
unsigned len)
{
int ret;
if (instance < 0 || instance > 1)
return -EINVAL;
ret = spi_register_board_info(info, len);
if (ret)
pr_warning("%s: failed to register board info for spi %d :"
" %d\n", __func__, instance, ret);
da8xx_spi_pdata[instance].num_chipselect = len;
if (instance == 1 && cpu_is_davinci_da850()) {
da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
}
return platform_device_register(&da8xx_spi_device[instance]);
}
