void mips_timer_interrupt(struct pt_regs *regs) { if ((timer_tick_count++ % HZ) == 0) { mips_display_message(&display_string[display_count++]); if (display_count == MAX_DISPLAY_COUNT) display_count = 0; } ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs); }
void mips_timer_interrupt(struct pt_regs *regs) { #if !defined(CONFIG_MIPS_AVALANCHE_SOC) if ((timer_tick_count++ % HZ) == 0) { mips_display_message(&display_string[display_count++]); if (display_count == MAX_DISPLAY_COUNT) display_count = 0; } #endif ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs); }
void mips_timer_interrupt(void) { /* if ((timer_tick_count++ % HZ) == 0) { mips_display_message(&display_string[display_count++]); if (display_count == MAX_DISPLAY_COUNT) display_count = 0; } */ ll_timer_interrupt(RALINK_CPU_TIMER_IRQ); }
asmlinkage void plat_irq_dispatch(struct pt_regs *regs) { unsigned int pending = read_c0_status() & read_c0_cause(); if (pending & 0x8000) { ll_timer_interrupt(Q_COUNT_COMPARE_IRQ, regs); return; } if (pending & 0x0400) { int irq = i8259_irq(); if (likely(irq >= 0)) do_IRQ(irq, regs); return; } }
asmlinkage void plat_irq_dispatch(void) { unsigned long int_status; unsigned int cause = read_c0_cause(); int irq; if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */ ll_timer_interrupt(7); return; } int_status = get_int_status(); /* if int_status == 0, then the interrupt has already been cleared */ if (int_status) { irq = ls1bit32(int_status); do_IRQ(irq); } }
void sb1250_timer_interrupt(struct pt_regs *regs) { int cpu = smp_processor_id(); int irq = K_INT_TIMER_0+cpu; /* Reset the timer */ out64(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); /* * CPU 0 handles the global timer interrupt job */ if (cpu == 0) { ll_timer_interrupt(irq, regs); } /* * every CPU should do profiling and process accouting */ ll_local_timer_interrupt(irq, regs); }
void bcm1480_timer_interrupt(void) { int cpu = smp_processor_id(); int irq = K_BCM1480_INT_TIMER_0 + cpu; /* Reset the timer */ __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); if (cpu == 0) { /* * CPU 0 handles the global timer interrupt job */ ll_timer_interrupt(irq); } else { /* * other CPUs should just do profiling and process accounting */ ll_local_timer_interrupt(irq); } }
void sb1250_timer_interrupt(struct pt_regs *regs) { extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); int cpu = smp_processor_id(); int irq = K_INT_TIMER_0 + cpu; /* Reset the timer */ __bus_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); /* * CPU 0 handles the global timer interrupt job */ if (cpu == 0) { ll_timer_interrupt(irq, regs); } if (cpu != 0) { /* * every CPU should do profiling and process accouting */ ll_local_timer_interrupt(irq, regs); } }
void ip32_irq5(struct pt_regs *regs) { ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs); }