void psxRcntInit(upse_module_instance_t *ins)
{
upse_psx_counter_state_t *ctrstate;
ctrstate = calloc(sizeof(upse_psx_counter_state_t), 1);
ctrstate->psxCounters[0].rate = 1;
ctrstate->psxCounters[0].interrupt = 0x10;
ctrstate->psxCounters[1].rate = 1;
ctrstate->psxCounters[1].interrupt = 0x20;
ctrstate->psxCounters[2].rate = 1;
ctrstate->psxCounters[2].interrupt = 64;
ctrstate->psxCounters[3].interrupt = 1;
ctrstate->psxCounters[3].mode = 0x58; // The VSync counter mode
ctrstate->psxCounters[3].target = 1;
ins->ctrstate = ctrstate;
psxUpdateVSyncRate(ins);
psxRcntUpd(ins, 0);
psxRcntUpd(ins, 1);
psxRcntUpd(ins, 2);
psxRcntUpd(ins, 3);
psxRcntSet(ins);
ctrstate->last = 0;
}
void psxRcntInit()
{
memset(psxCounters, 0, sizeof(psxCounters));
psxCounters[0].rate = 1;
psxCounters[0].interrupt = 0x10;
psxCounters[1].rate = 1;
psxCounters[1].interrupt = 0x20;
psxCounters[2].rate = 1;
psxCounters[2].interrupt = 64;
psxCounters[3].interrupt = 1;
psxCounters[3].mode = 0x58; // The VSync counter mode
psxCounters[3].target = 1;
psxUpdateVSyncRate();
cnts = 4;
psxRcntUpd(0);
psxRcntUpd(1);
psxRcntUpd(2);
psxRcntUpd(3);
psxRcntSet();
last = 0;
}
void psxRcntWtarget(u32 index, u32 value)
{
// SysPrintf("writeCtarget[%ld] = %lx\n", index, value);
psxCounters[index].target = value;
psxRcntUpd(index);
psxRcntSet();
}
void psxRcntUpdate()
{
if ((upse_r3000_cpu_regs.cycle - psxCounters[3].sCycle) >= psxCounters[3].Cycle)
{
//printf("%d\n",(upse_r3000_cpu_regs.cycle - psxCounters[3].sCycle)- psxCounters[3].Cycle);
psxRcntUpd(3);
psxHu32(0x1070) |= BFLIP32(1);
}
if ((upse_r3000_cpu_regs.cycle - psxCounters[0].sCycle) >= psxCounters[0].Cycle)
{
psxRcntReset(0);
}
if ((upse_r3000_cpu_regs.cycle - psxCounters[1].sCycle) >= psxCounters[1].Cycle)
{
psxRcntReset(1);
}
if ((upse_r3000_cpu_regs.cycle - psxCounters[2].sCycle) >= psxCounters[2].Cycle)
{
psxRcntReset(2);
}
psxRcntSet();
}
void psxRcntUpdate(upse_module_instance_t *ins)
{
upse_psx_counter_state_t *ctrstate = ins->ctrstate;
if ((ins->cpustate.cycle - ctrstate->psxCounters[3].sCycle) >= ctrstate->psxCounters[3].Cycle)
{
psxRcntUpd(ins, 3);
psxHu32(ins, 0x1070) |= BFLIP32(1);
}
if ((ins->cpustate.cycle - ctrstate->psxCounters[0].sCycle) >= ctrstate->psxCounters[0].Cycle)
{
psxRcntReset(ins, 0);
}
if ((ins->cpustate.cycle - ctrstate->psxCounters[1].sCycle) >= ctrstate->psxCounters[1].Cycle)
{
psxRcntReset(ins, 1);
}
if ((ins->cpustate.cycle - ctrstate->psxCounters[2].sCycle) >= ctrstate->psxCounters[2].Cycle)
{
psxRcntReset(ins, 2);
}
psxRcntSet(ins);
}
void psxRcntWtarget(upse_module_instance_t *ins, u32 index, u32 value)
{
upse_psx_counter_state_t *ctrstate = ins->ctrstate;
ctrstate->psxCounters[index].target = value;
psxRcntUpd(ins, index);
psxRcntSet(ins);
}
static void psxRcntReset(u32 index) {
psxCounters[index].count = 0;
psxRcntUpd(index);
psxHu32(0x1070)|= BFLIP32(psxCounters[index].interrupt);
if (!(psxCounters[index].mode & 0x40)) { // Only 1 interrupt
psxCounters[index].Cycle = 0xffffffff;
}
}
static void psxRcntReset(upse_module_instance_t *ins, u32 index)
{
upse_psx_counter_state_t *ctrstate = ins->ctrstate;
ctrstate->psxCounters[index].count = 0;
psxRcntUpd(ins, index);
psxHu32(ins, 0x1070) |= BFLIP32(ctrstate->psxCounters[index].interrupt);
if (!(ctrstate->psxCounters[index].mode & 0x40))
{ // Only 1 interrupt
ctrstate->psxCounters[index].Cycle = 0xffffffff;
}
}
void psxRcntWmode(upse_module_instance_t *ins, u32 index, u32 value)
{
upse_psx_counter_state_t *ctrstate = ins->ctrstate;
ctrstate->psxCounters[index].mode = value;
ctrstate->psxCounters[index].count = 0;
if (index == 0)
{
switch (value & 0x300)
{
case 0x100:
ctrstate->psxCounters[index].rate = ((ctrstate->psxCounters[3].rate /** BIAS*/ ) / 386) / 262; // seems ok
break;
default:
ctrstate->psxCounters[index].rate = 1;
}
}
else if (index == 1)
{
switch (value & 0x300)
{
case 0x100:
ctrstate->psxCounters[index].rate = (ctrstate->psxCounters[3].rate /** BIAS*/ ) / 262; // seems ok
//ctrstate->psxCounters[index].rate = (PSXCLK / 60)/262; //(ctrstate->psxCounters[3].rate*16/262);
//printf("%d\n",ctrstate->psxCounters[index].rate);
break;
default:
ctrstate->psxCounters[index].rate = 1;
}
}
else if (index == 2)
{
switch (value & 0x300)
{
case 0x200:
ctrstate->psxCounters[index].rate = 8; // 1/8 speed
break;
default:
ctrstate->psxCounters[index].rate = 1; // normal speed
}
}
// Need to set a rate and target
psxRcntUpd(ins, index);
psxRcntSet(ins);
}
void psxRcntWmode(u32 index, u32 value)
{
psxCounters[index].mode = value;
psxCounters[index].count = 0;
if (index == 0)
{
switch (value & 0x300)
{
case 0x100:
psxCounters[index].rate = ((psxCounters[3].rate /** BIAS*/ ) / 386) / 262; // seems ok
break;
default:
psxCounters[index].rate = 1;
}
}
else if (index == 1)
{
switch (value & 0x300)
{
case 0x100:
psxCounters[index].rate = (psxCounters[3].rate /** BIAS*/ ) / 262; // seems ok
//psxCounters[index].rate = (PSXCLK / 60)/262; //(psxCounters[3].rate*16/262);
//printf("%d\n",psxCounters[index].rate);
break;
default:
psxCounters[index].rate = 1;
}
}
else if (index == 2)
{
switch (value & 0x300)
{
case 0x200:
psxCounters[index].rate = 8; // 1/8 speed
break;
default:
psxCounters[index].rate = 1; // normal speed
}
}
// Need to set a rate and target
psxRcntUpd(index);
psxRcntSet();
}
void psxRcntWcount(u32 index, u32 value)
{
psxCounters[index].count = value;
psxRcntUpd(index);
psxRcntSet();
}