void momenco_time_init(void) { setup_wired_tlb_entries(); /* * Ocelot-3 board has been built with both * the Rm7900 and the Rm7065C */ mips_hpt_frequency = cpu_clock / 2; rtc_mips_get_time = m48t37y_get_time; rtc_mips_set_time = m48t37y_set_time; }
void __init plat_setup(void) { unsigned int tmpword; board_time_init = momenco_time_init; _machine_restart = momenco_ocelot_restart; _machine_halt = momenco_ocelot_halt; pm_power_off = momenco_ocelot_power_off; /* Wired TLB entries */ setup_wired_tlb_entries(); /* shut down ethernet ports, just to be sure our memory doesn't get * corrupted by random ethernet traffic. */ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); do {} while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); do {} while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); do {} while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); do {} while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); /* Turn off the Bit-Error LED */ OCELOT_FPGA_WRITE(0x80, CLR); tmpword = OCELOT_FPGA_READ(BOARDREV); if (tmpword < 26) printk("Momenco Ocelot-3: Board Assembly Rev. %c\n", 'A'+tmpword); else printk("Momenco Ocelot-3: Board Assembly Revision #0x%x\n", tmpword); tmpword = OCELOT_FPGA_READ(FPGA_REV); printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15); tmpword = OCELOT_FPGA_READ(RESET_STATUS); printk("Reset reason: 0x%x\n", tmpword); switch (tmpword) { case 0x1: printk(" - Power-up reset\n"); break; case 0x2: printk(" - Push-button reset\n"); break; case 0x4: printk(" - cPCI bus reset\n"); break; case 0x8: printk(" - Watchdog reset\n"); break; case 0x10: printk(" - Software reset\n"); break; default: printk(" - Unknown reset cause\n"); } reset_reason = tmpword; OCELOT_FPGA_WRITE(0xff, RESET_STATUS); tmpword = OCELOT_FPGA_READ(CPCI_ID); printk("cPCI ID register: 0x%02x\n", tmpword); printk(" - Slot number: %d\n", tmpword & 0x1f); printk(" - PCI bus present: %s\n", tmpword & 0x40 ? "yes" : "no"); printk(" - System Slot: %s\n", tmpword & 0x20 ? "yes" : "no"); tmpword = OCELOT_FPGA_READ(BOARD_STATUS); printk("Board Status register: 0x%02x\n", tmpword); printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); printk(" - L3 cache size: %d MB\n", (1<<((tmpword&12) >> 2))&~1); /* Support for 128 MB memory */ add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM); }