void tms34061_device::write(address_space &space, int col, int row, int func, UINT8 data)
{
offs_t offs;
/* the function code determines what to do */
switch (func)
{
/* both 0 and 2 map to register access */
case 0:
case 2:
register_w(space, col, data);
break;
/* function 1 maps to XY access; col is the address adjustment */
case 1:
xypixel_w(space, col, data);
break;
/* function 3 maps to direct access */
case 3:
offs = ((row << m_rowshift) | col) & m_vrammask;
if (m_regs[TMS34061_CONTROL2] & 0x0040)
offs |= (m_regs[TMS34061_CONTROL2] & 3) << 16;
if (VERBOSE) logerror("%s:tms34061 direct (%04x) = %02x/%02x\n", space.machine().describe_context(), offs, data, m_latchdata);
if (m_vram[offs] != data || m_latchram[offs] != m_latchdata)
{
m_vram[offs] = data;
m_latchram[offs] = m_latchdata;
}
break;
/* function 4 performs a shift reg transfer to VRAM */
case 4:
offs = col << m_rowshift;
if (m_regs[TMS34061_CONTROL2] & 0x0040)
offs |= (m_regs[TMS34061_CONTROL2] & 3) << 16;
offs &= m_vrammask;
if (VERBOSE) logerror("%s:tms34061 shiftreg write (%04x)\n", space.machine().describe_context(), offs);
memcpy(&m_vram[offs], m_shiftreg, (size_t)1 << m_rowshift);
memset(&m_latchram[offs], m_latchdata, (size_t)1 << m_rowshift);
break;
/* function 5 performs a shift reg transfer from VRAM */
case 5:
offs = col << m_rowshift;
if (m_regs[TMS34061_CONTROL2] & 0x0040)
offs |= (m_regs[TMS34061_CONTROL2] & 3) << 16;
offs &= m_vrammask;
if (VERBOSE) logerror("%s:tms34061 shiftreg read (%04x)\n", space.machine().describe_context(), offs);
m_shiftreg = &m_vram[offs];
break;
/* log anything else */
default:
logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(), func);
break;
}
}
INLINE UINT16 galpani2_bg8_regs_r(address_space &space, offs_t offset, int n)
{
galpani2_state *state = space.machine().driver_data<galpani2_state>();
switch (offset * 2)
{
case 0x16: return space.machine().rand() & 1;
default:
logerror("CPU #0 PC %06X : Warning, bg8 #%d screen reg %04X read\n",space.cpu->safe_pc(),_n_,offset*2);
}
return state->m_bg8_regs[_n_][offset];
}
static void dragrace_update_misc_flags( address_space &space )
{
dragrace_state *state = space.machine().driver_data<dragrace_state>();
/* 0x0900 = set 3SPEED1 0x00000001
* 0x0901 = set 4SPEED1 0x00000002
* 0x0902 = set 5SPEED1 0x00000004
* 0x0903 = set 6SPEED1 0x00000008
* 0x0904 = set 7SPEED1 0x00000010
* 0x0905 = set EXPLOSION1 0x00000020
* 0x0906 = set SCREECH1 0x00000040
* 0x0920 - 0x0927 = clear 0x0900 - 0x0907
* 0x0909 = set KLEXPL1 0x00000200
* 0x090b = set MOTOR1 0x00000800
* 0x090c = set ATTRACT 0x00001000
* 0x090d = set LOTONE 0x00002000
* 0x090f = set Player 1 Start Lamp 0x00008000
* 0x0928 - 0x092f = clear 0x0908 - 0x090f
* 0x0910 = set 3SPEED2 0x00010000
* 0x0911 = set 4SPEED2 0x00020000
* 0x0912 = set 5SPEED2 0x00040000
* 0x0913 = set 6SPEED2 0x00080000
* 0x0914 = set 7SPEED2 0x00100000
* 0x0915 = set EXPLOSION2 0x00200000
* 0x0916 = set SCREECH2 0x00400000
* 0x0930 = clear 0x0910 - 0x0917
* 0x0919 = set KLEXPL2 0x02000000
* 0x091b = set MOTOR2 0x08000000
* 0x091d = set HITONE 0x20000000
* 0x091f = set Player 2 Start Lamp 0x80000000
* 0x0938 = clear 0x0918 - 0x091f
*/
set_led_status(space.machine(), 0, state->m_misc_flags & 0x00008000);
set_led_status(space.machine(), 1, state->m_misc_flags & 0x80000000);
discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR1_DATA, ~state->m_misc_flags & 0x0000001f); // Speed1 data*
discrete_sound_w(state->m_discrete, space, DRAGRACE_EXPLODE1_EN, (state->m_misc_flags & 0x00000020) ? 1: 0); // Explosion1 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_SCREECH1_EN, (state->m_misc_flags & 0x00000040) ? 1: 0); // Screech1 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_KLEXPL1_EN, (state->m_misc_flags & 0x00000200) ? 1: 0); // KLEXPL1 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR1_EN, (state->m_misc_flags & 0x00000800) ? 1: 0); // Motor1 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR2_DATA, (~state->m_misc_flags & 0x001f0000) >> 0x10); // Speed2 data*
discrete_sound_w(state->m_discrete, space, DRAGRACE_EXPLODE2_EN, (state->m_misc_flags & 0x00200000) ? 1: 0); // Explosion2 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_SCREECH2_EN, (state->m_misc_flags & 0x00400000) ? 1: 0); // Screech2 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_KLEXPL2_EN, (state->m_misc_flags & 0x02000000) ? 1: 0); // KLEXPL2 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR2_EN, (state->m_misc_flags & 0x08000000) ? 1: 0); // Motor2 enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_ATTRACT_EN, (state->m_misc_flags & 0x00001000) ? 1: 0); // Attract enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_LOTONE_EN, (state->m_misc_flags & 0x00002000) ? 1: 0); // LoTone enable
discrete_sound_w(state->m_discrete, space, DRAGRACE_HITONE_EN, (state->m_misc_flags & 0x20000000) ? 1: 0); // HiTone enable
}
static UINT8 srtc_read( address_space &space, UINT16 addr )
{
addr &= 0xffff;
if (addr == 0x2800)
{
if (rtc_state.mode != RTCM_Read)
{
return 0x00;
}
if (rtc_state.index < 0)
{
srtc_update_time(space.machine());
rtc_state.index++;
return 0x0f;
}
else if (rtc_state.index > 12)
{
rtc_state.index = -1;
return 0x0f;
}
else
{
return rtc_state.ram[rtc_state.index++];
}
}
return snes_open_bus_r(space, 0);
}
void artmagic_from_shiftreg(address_space &space, offs_t address, UINT16 *data)
{
artmagic_state *state = space.machine().driver_data<artmagic_state>();
UINT16 *vram = address_to_vram(state, &address);
if (vram)
memcpy(&vram[address], data, TOBYTE(0x2000));
}
/* read status port */
static int I8741_status_r(address_space &space, int num)
{
I8741 *st = &taito8741[num];
taito8741_update(space, num);
LOG(("%s:8741-%d ST Read %02x\n",space.machine().describe_context(),num,st->status));
return st->status;
}
UINT8 tms34061_device::register_r(address_space &space, offs_t offset)
{
int regnum = offset >> 2;
UINT16 result;
/* extract the correct portion of the register */
if (regnum < ARRAY_LENGTH(m_regs))
result = m_regs[regnum];
else
result = 0xffff;
/* special cases: */
switch (regnum)
{
/* status register: a read here clears it */
case TMS34061_STATUS:
m_regs[TMS34061_STATUS] = 0;
update_interrupts();
break;
/* vertical count register: return the current scanline */
case TMS34061_VERCOUNTER:
result = (m_screen->vpos()+ m_regs[TMS34061_VERENDBLNK]) % m_regs[TMS34061_VERTOTAL];
break;
}
/* log it */
if (VERBOSE) logerror("%s:tms34061 %s read = %04X\n", space.machine().describe_context(), regnames[regnum], result);
return (offset & 0x02) ? (result >> 8) : result;
}
static UINT16 exterm_trackball_port_r(address_space &space, int which, UINT16 mem_mask)
{
exterm_state *state = space.machine().driver_data<exterm_state>();
UINT16 port;
/* Read the fake input port */
UINT8 trackball_pos = state->ioport(which ? "DIAL1" : "DIAL0")->read();
/* Calculate the change from the last position. */
UINT8 trackball_diff = state->m_trackball_old[which] - trackball_pos;
/* Store the new position for the next comparision. */
state->m_trackball_old[which] = trackball_pos;
/* Move the sign bit to the high bit of the 6-bit trackball count. */
if (trackball_diff & 0x80)
trackball_diff |= 0x20;
/* Keep adding the changes. The counters will be reset later by a hardware write. */
state->m_aimpos[which] = (state->m_aimpos[which] + trackball_diff) & 0x3f;
/* Combine it with the standard input bits */
port = state->ioport(which ? "P2" : "P1")->read();
return (port & 0xc0ff) | (state->m_aimpos[which] << 8);
}
static void console_write(address_space &space, UINT8 data)
{
dac_device *dac = space.machine().device<dac_device>("dac");
if (data & 0x08)
dac->write_unsigned8((UINT8)-120);
else
dac->write_unsigned8(+120);
}
/* Read/Write common */
void psion_state::io_rw(address_space &space, UINT16 offset)
{
if (space.debugger_access())
return;
switch (offset & 0xffc0)
{
case 0xc0:
/* switch off, CPU goes into standby mode */
m_enable_nmi = 0;
m_stby_pwr = 1;
space.machine().device<cpu_device>("maincpu")->suspend(SUSPEND_REASON_HALT, 1);
break;
case 0x100:
m_pulse = 1;
break;
case 0x140:
m_pulse = 0;
break;
case 0x200:
m_kb_counter = 0;
break;
case 0x180:
beep_set_state(m_beep, 1);
break;
case 0x1c0:
beep_set_state(m_beep, 0);
break;
case 0x240:
if (offset == 0x260 && (m_rom_bank_count || m_ram_bank_count))
{
m_ram_bank=0;
m_rom_bank=0;
update_banks(machine());
}
else
m_kb_counter++;
break;
case 0x280:
if (offset == 0x2a0 && m_ram_bank_count)
{
m_ram_bank++;
update_banks(machine());
}
else
m_enable_nmi = 1;
break;
case 0x2c0:
if (offset == 0x2e0 && m_rom_bank_count)
{
m_rom_bank++;
update_banks(machine());
}
else
m_enable_nmi = 0;
break;
}
}
/* Write command port */
static void I8741_command_w(address_space &space, int num, int data)
{
I8741 *st = &taito8741[num];
LOG(("%s:8741-%d CMD Write %02x\n",space.machine().describe_context(),num,data));
st->fromCmd = data;
st->status |= 0x04;
/* update chip */
taito8741_update(space,num);
}
INLINE void galpani2_bg8_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
{
galpani2_state *state = space.machine().driver_data<galpani2_state>();
int x,y,pen;
UINT16 newword = COMBINE_DATA(&state->m_bg8[_n_][offset]);
pen = newword & 0xff;
x = (offset % 512); /* 512 x 256 */
y = (offset / 512);
state->m_bg8_bitmap[_n_]->pix16(y, x) = 0x4000 + pen;
}
static void leland_video_addr_w(address_space &space, int offset, int data, int num)
{
leland_state *drvstate = space.machine().driver_data<leland_state>();
struct vram_state_data *state = drvstate->m_vram_state + num;
if (!offset)
state->m_addr = (state->m_addr & 0xfe00) | ((data << 1) & 0x01fe);
else
state->m_addr = ((data << 9) & 0xfe00) | (state->m_addr & 0x01fe);
}
UINT8 tms34061_device::read(address_space &space, int col, int row, int func)
{
int result = 0;
offs_t offs;
/* the function code determines what to do */
switch (func)
{
/* both 0 and 2 map to register access */
case 0:
case 2:
result = register_r(space, col);
break;
/* function 1 maps to XY access; col is the address adjustment */
case 1:
result = xypixel_r(space, col);
break;
/* funtion 3 maps to direct access */
case 3:
offs = ((row << m_rowshift) | col) & m_vrammask;
result = m_vram[offs];
break;
/* function 4 performs a shift reg transfer to VRAM */
case 4:
offs = col << m_rowshift;
if (m_regs[TMS34061_CONTROL2] & 0x0040)
offs |= (m_regs[TMS34061_CONTROL2] & 3) << 16;
offs &= m_vrammask;
memcpy(&m_vram[offs], m_shiftreg, (size_t)1 << m_rowshift);
memset(&m_latchram[offs], m_latchdata, (size_t)1 << m_rowshift);
break;
/* function 5 performs a shift reg transfer from VRAM */
case 5:
offs = col << m_rowshift;
if (m_regs[TMS34061_CONTROL2] & 0x0040)
offs |= (m_regs[TMS34061_CONTROL2] & 3) << 16;
offs &= m_vrammask;
m_shiftreg = &m_vram[offs];
break;
/* log anything else */
default:
logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(),
func);
break;
}
return result;
}
static void log_protection( address_space &space, const char *warning )
{
quizpun2_state *state = space.machine().driver_data<quizpun2_state>();
struct prot_t &prot = state->m_prot;
logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", space.device().safe_pc(), warning,
prot.state,
prot.wait_param,
prot.param,
prot.cmd,
prot.addr
);
}
static int amerdart_trackball_direction(address_space &space, int num, int data)
{
coolpool_state *state = space.machine().driver_data<coolpool_state>();
UINT16 result_x = (data & 0x0c) >> 2;
UINT16 result_y = (data & 0x03) >> 0;
if ((state->m_dx[num] == 0) && (state->m_dy[num] < 0)) { /* Up */
state->m_oldy[num]--;
result_x = amerdart_trackball_inc(result_x);
result_y = amerdart_trackball_inc(result_y);
}
if ((state->m_dx[num] == 0) && (state->m_dy[num] > 0)) { /* Down */
state->m_oldy[num]++;
result_x = amerdart_trackball_dec(result_x);
result_y = amerdart_trackball_dec(result_y);
}
if ((state->m_dx[num] < 0) && (state->m_dy[num] == 0)) { /* Left */
state->m_oldx[num]--;
result_x = amerdart_trackball_inc(result_x);
result_y = amerdart_trackball_dec(result_y);
}
if ((state->m_dx[num] > 0) && (state->m_dy[num] == 0)) { /* Right */
state->m_oldx[num]++;
result_x = amerdart_trackball_dec(result_x);
result_y = amerdart_trackball_inc(result_y);
}
if ((state->m_dx[num] < 0) && (state->m_dy[num] < 0)) { /* Left & Up */
state->m_oldx[num]--;
state->m_oldy[num]--;
result_x = amerdart_trackball_inc(result_x);
}
if ((state->m_dx[num] < 0) && (state->m_dy[num] > 0)) { /* Left & Down */
state->m_oldx[num]--;
state->m_oldy[num]++;
result_y = amerdart_trackball_dec(result_y);
}
if ((state->m_dx[num] > 0) && (state->m_dy[num] < 0)) { /* Right & Up */
state->m_oldx[num]++;
state->m_oldy[num]--;
result_y = amerdart_trackball_inc(result_y);
}
if ((state->m_dx[num] > 0) && (state->m_dy[num] > 0)) { /* Right & Down */
state->m_oldx[num]++;
state->m_oldy[num]++;
result_x = amerdart_trackball_dec(result_x);
}
data = ((result_x << 2) & 0x0c) | ((result_y << 0) & 0x03);
return data;
}
static void esb_slapstic_tweak(address_space &space, offs_t offset)
{
starwars_state *state = space.machine().driver_data<starwars_state>();
int new_bank = slapstic_tweak(space, offset);
/* update for the new bank */
if (new_bank != state->m_slapstic_current_bank)
{
state->m_slapstic_current_bank = new_bank;
memcpy(state->m_slapstic_base, &state->m_slapstic_source[state->m_slapstic_current_bank * 0x2000], 0x2000);
}
}
inline void ti8x_update_bank(address_space &space, UINT8 bank, UINT8 *base, UINT8 page, bool is_ram)
{
ti85_state *state = space.machine().driver_data<ti85_state>();
static const char *const tag[] = {"bank1", "bank2", "bank3", "bank4"};
state->membank(tag[bank&3])->set_base(base + (0x4000 * page));
if (is_ram)
space.install_write_bank(bank * 0x4000, bank * 0x4000 + 0x3fff, tag[bank&3]);
else
space.nop_write(bank * 0x4000, bank * 0x4000 + 0x3fff);
}
static UINT32 pm_io(address_space &space, int reg, int write, UINT32 d)
{
mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
if (state->m_emu_status & SSP_PMC_SET)
{
state->m_pmac_read[write ? reg + 6 : reg] = state->m_pmc.d;
state->m_emu_status &= ~SSP_PMC_SET;
return 0;
}
// just in case
if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
}
if (reg == 4 || (space.device().state().state_int(SSP_ST) & 0x60))
{
#define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
UINT16 *dram = (UINT16 *)state->m_dram;
if (write)
{
int mode = state->m_pmac_write[reg]>>16;
int addr = state->m_pmac_write[reg]&0xffff;
if ((mode & 0x43ff) == 0x0018) // DRAM
{
int inc = get_inc(mode);
if (mode & 0x0400) {
overwrite_write(&dram[addr], d);
} else dram[addr] = d;
state->m_pmac_write[reg] += inc;
}
else if ((mode & 0xfbff) == 0x4018) // DRAM, cell inc
{
if (mode & 0x0400) {
overwrite_write(&dram[addr], d);
} else dram[addr] = d;
state->m_pmac_write[reg] += (addr&1) ? 31 : 1;
}
else if ((mode & 0x47ff) == 0x001c) // IRAM
{
int inc = get_inc(mode);
((UINT16 *)state->m_iram)[addr&0x3ff] = d;
state->m_pmac_write[reg] += inc;
}
else
{
logerror("ssp FIXME: PM%i unhandled write mode %04x, [%06x] %04x\n",
reg, mode, CADDR, d);
}
}
else
{
void hdgsp_write_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
{
harddriv_state *state = space.machine().driver_data<harddriv_state>();
/* access to the 1bpp/2bpp area */
if (address >= 0x02000000 && address <= 0x020fffff)
{
address -= 0x02000000;
address >>= state->m_gsp_multisync;
address &= state->m_vram_mask;
address &= ~((512*8 >> state->m_gsp_multisync) - 1);
state->m_gsp_shiftreg_source = &state->m_gsp_vram[address];
}
static int leland_vram_port_r(address_space &space, int offset, int num)
{
leland_state *drvstate = space.machine().driver_data<leland_state>();
struct vram_state_data *state = drvstate->m_vram_state + num;
int addr = state->m_addr;
int inc = (offset >> 2) & 2;
int ret;
switch (offset & 7)
{
case 3: /* read hi/lo (alternating) */
ret = drvstate->m_video_ram[addr];
addr += inc & (addr << 1);
addr ^= 1;
break;
case 5: /* read hi */
ret = drvstate->m_video_ram[addr | 1];
addr += inc;
break;
case 6: /* read lo */
ret = drvstate->m_video_ram[addr & ~1];
addr += inc;
break;
default:
logerror("%s: Warning: Unknown video port %02x read (address=%04x)\n",
space.machine().describe_context(), offset, addr);
ret = 0;
break;
}
state->m_addr = addr;
if (LOG_COMM && addr >= 0xf000)
logerror("%s:%s comm read %04X = %02X\n", space.machine().describe_context(), num ? "slave" : "master", addr, ret);
return ret;
}
static INT8 josvolly_8741_r(address_space &space,int num,int offset)
{
JV8741 *mcu = &i8741[num];
int ret;
if(offset==1)
{
if(mcu->rst)
mcu->rxd = space.machine().root_device().ioport(mcu->initReadPort)->read(); /* port in */
ret = mcu->sts;
LOG(("%s:8741[%d] SR %02X\n",space.machine().describe_context(),num,ret));
}
else
{
/* clear status port */
mcu->sts &= ~0x01; /* RD ready */
ret = mcu->rxd;
LOG(("%s:8741[%d] DR %02X\n",space.machine().describe_context(),num,ret));
mcu->rst = 0;
}
return ret;
}
static void update_misc_flags(address_space &space, UINT8 val)
{
orbit_state *state = space.machine().driver_data<orbit_state>();
state->m_misc_flags = val;
/* BIT0 => UNUSED */
/* BIT1 => LOCKOUT */
/* BIT2 => NMI ENABLE */
/* BIT3 => HEAT RST LED */
/* BIT4 => PANEL BUS OC */
/* BIT5 => PANEL STROBE */
/* BIT6 => HYPER LED */
/* BIT7 => WARNING SND */
discrete_sound_w(state->m_discrete, space, ORBIT_WARNING_EN, BIT(state->m_misc_flags, 7));
set_led_status(space.machine(), 0, BIT(state->m_misc_flags, 3));
set_led_status(space.machine(), 1, BIT(state->m_misc_flags, 6));
coin_lockout_w(space.machine(), 0, !BIT(state->m_misc_flags, 1));
coin_lockout_w(space.machine(), 1, !BIT(state->m_misc_flags, 1));
}
static void triplhnt_update_misc(address_space &space, int offset)
{
triplhnt_state *state = space.machine().driver_data<triplhnt_state>();
samples_device *samples = space.machine().device<samples_device>("samples");
device_t *discrete = space.machine().device("discrete");
UINT8 is_witch_hunt;
UINT8 bit = offset >> 1;
/* BIT0 => UNUSED */
/* BIT1 => LAMP */
/* BIT2 => SCREECH */
/* BIT3 => LOCKOUT */
/* BIT4 => SPRITE ZOOM */
/* BIT5 => CMOS WRITE */
/* BIT6 => TAPE CTRL */
/* BIT7 => SPRITE BANK */
if (offset & 1)
{
state->m_misc_flags |= 1 << bit;
if (bit == 5)
{
state->m_cmos[state->m_cmos_latch] = state->m_da_latch;
}
}
else
{
state->m_misc_flags &= ~(1 << bit);
}
state->m_sprite_zoom = (state->m_misc_flags >> 4) & 1;
state->m_sprite_bank = (state->m_misc_flags >> 7) & 1;
set_led_status(space.machine(), 0, state->m_misc_flags & 0x02);
coin_lockout_w(space.machine(), 0, !(state->m_misc_flags & 0x08));
coin_lockout_w(space.machine(), 1, !(state->m_misc_flags & 0x08));
discrete_sound_w(discrete, space, TRIPLHNT_SCREECH_EN, state->m_misc_flags & 0x04); // screech
discrete_sound_w(discrete, space, TRIPLHNT_LAMP_EN, state->m_misc_flags & 0x02); // Lamp is used to reset noise
discrete_sound_w(discrete, space, TRIPLHNT_BEAR_EN, state->m_misc_flags & 0x80); // bear
is_witch_hunt = space.machine().root_device().ioport("0C09")->read() == 0x40;
bit = ~state->m_misc_flags & 0x40;
/* if we're not playing the sample yet, start it */
if (!samples->playing(0))
samples->start(0, 0, true);
if (!samples->playing(1))
samples->start(1, 1, true);
/* bit 6 turns cassette on/off */
samples->pause(0, is_witch_hunt || bit);
samples->pause(1, !is_witch_hunt || bit);
}
DISCRETE_SOUND_END
/****************************************************************
*
* EA / Banking
*
****************************************************************/
static void set_ea(address_space &space, int ea)
{
mario_state *state = space.machine().driver_data<mario_state>();
//printf("ea: %d\n", ea);
//machine.device("audiocpu")->execute().set_input_line(MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
if (state->m_eabank != NULL)
state->membank(state->m_eabank)->set_entry(ea);
}
void tms34061_device::xypixel_w(address_space &space, int offset, UINT8 data)
{
/* determine the offset, then adjust it */
offs_t pixeloffs = m_regs[TMS34061_XYADDRESS];
if (offset)
adjust_xyaddress(offset);
/* adjust for the upper bits */
pixeloffs |= (m_regs[TMS34061_XYOFFSET] & 0x0f00) << 8;
/* mask to the VRAM size */
pixeloffs &= m_vrammask;
if (VERBOSE) logerror("%s:tms34061 xy (%04x) = %02x/%02x\n", space.machine().describe_context(), pixeloffs, data, m_latchdata);
/* set the pixel data */
m_vram[pixeloffs] = data;
m_latchram[pixeloffs] = m_latchdata;
}
/* read data port */
static int I8741_data_r(address_space &space, int num)
{
I8741 *st = &taito8741[num];
int ret = st->toData;
st->status &= 0xfe;
LOG(("%s:8741-%d DATA Read %02x\n",space.machine().describe_context(),num,ret));
/* update chip */
taito8741_update(space, num);
switch( st->mode )
{
case TAITO8741_PORT: /* parallel data */
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect, 0xff) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
break;
}
return ret;
}
INLINE void scrollram_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
{
megasys1_state *state = space.machine().driver_data<megasys1_state>();
COMBINE_DATA(&state->m_scrollram[which][offset]);
if (offset < 0x40000/2 && state->m_tmap[which])
{
if (state->m_scroll_flag[which] & 0x10) /* tiles are 8x8 */
{
state->m_tmap[which]->mark_tile_dirty(offset );
}
else
{
state->m_tmap[which]->mark_tile_dirty(offset*4 + 0);
state->m_tmap[which]->mark_tile_dirty(offset*4 + 1);
state->m_tmap[which]->mark_tile_dirty(offset*4 + 2);
state->m_tmap[which]->mark_tile_dirty(offset*4 + 3);
}
}
}
void wmg_state::wmg_def_install_io_space(address_space &space)
{
pia6821_device *pia_0 = space.machine().device<pia6821_device>("pia_0");
pia6821_device *pia_1 = space.machine().device<pia6821_device>("pia_1");
/* this routine dynamically installs the memory mapped above from c000-cfff */
space.install_write_bank (0xc000, 0xc00f, 0, 0, "bank4");
space.install_write_handler (0xc010, 0xc01f, write8_delegate(FUNC(williams_state::defender_video_control_w),this));
space.install_write_handler (0xc400, 0xc400, write8_delegate(FUNC(wmg_state::wmg_rombank_w),this));
space.install_write_handler (0xc401, 0xc401, write8_delegate(FUNC(wmg_state::wmg_sound_reset_w),this));
space.install_readwrite_handler(0xc804, 0xc807, read8_delegate(FUNC(wmg_state::wmg_pia_0_r),this), write8_delegate(FUNC(pia6821_device::write), pia_0));
space.install_readwrite_handler(0xc80c, 0xc80f, read8_delegate(FUNC(pia6821_device::read), pia_1), write8_delegate(FUNC(pia6821_device::write), pia_1));
space.install_write_handler (0xc900, 0xc9ff, write8_delegate(FUNC(wmg_state::wmg_vram_select_w),this));
space.install_write_handler (0xca00, 0xca07, write8_delegate(FUNC(williams_state::williams_blitter_w),this));
space.install_write_handler (0xcbff, 0xcbff, write8_delegate(FUNC(williams_state::williams_watchdog_reset_w),this));
space.install_read_handler (0xcb00, 0xcbff, read8_delegate(FUNC(williams_state::williams_video_counter_r),this));
space.install_readwrite_handler(0xcc00, 0xcfff, read8_delegate(FUNC(wmg_state::wmg_nvram_r), this), write8_delegate(FUNC(wmg_state::wmg_nvram_w),this));
membank("bank4")->set_base(m_generic_paletteram_8);
}
UINT32 twcup98_prot_read_callback( address_space &space, int protaddr, UINT32 key )
{
UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
UINT32 res = 0;
UINT32 twcup_prot_data[8] =
{
0x23232323, 0x23232323, 0x4c4c4c4c, 0x4c156301
};
switch(key >> 16)
{
case 0x1212:
if(protaddr & 2)
{
res = (ROM[protaddr / 4] & 0xffff) << 16;
res |= (ROM[(protaddr+4) / 4] & 0xffff0000) >> 16;
}
else
{
