offs_t device_disasm_interface::disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) { offs_t result = 0; // check for disassembler override if (!m_dasm_override.isnull()) result = m_dasm_override(device(), stream, pc, oprom, opram, options); if (result == 0) result = disasm_disassemble(stream, pc, oprom, opram, options); // make sure we get good results assert((result & DASMFLAG_LENGTHMASK) != 0); #ifdef MAME_DEBUG device_memory_interface *memory; if (device().interface(memory)) { address_space &space = memory->space(AS_PROGRAM); int bytes = space.address_to_byte(result & DASMFLAG_LENGTHMASK); assert(bytes >= min_opcode_bytes()); assert(bytes <= max_opcode_bytes()); (void) bytes; // appease compiler } #endif return result; }
void tms57002_device::decode_error(UINT32 opcode) { char buf[256]; UINT8 opr[3]; if(unsupported_inst_warning) return; unsupported_inst_warning = 1; opr[0] = opcode; opr[1] = opcode >> 8; opr[2] = opcode >> 16; disasm_disassemble(buf, pc, opr, opr, 0); popmessage("tms57002: %s - Contact Mamedev", buf); }
/** * @brief read the microcode ROM/RAM halfword * * Note: HALFSEL is selecting the even (0) or odd (1) half of the * microcode RAM 32-bit word. Here's how the demultiplexers (74298) * u8, u18, u28 and u38 select the bits: * * SN74298 * +---+-+---+ * | +-+ | * B2 -|1 16|- Vcc * | | * A2 -|2 15|- QA * | | * A1 -|3 14|- QB * | | * B1 -|4 13|- QC * | | * C2 -|5 12|- QD * | | * D2 -|6 11|- CLK * | | * D1 -|7 10|- SEL * | | * GND -|8 9|- C1 * | | * +---------+ * * chip out pin BUS in pin HSEL=0 in pin HSEL=1 * -------------------------------------------------------------- * u8 QA 15 0 A1 3 DRSEL(0)' A2 2 DF2(0) * u8 QB 14 1 B1 4 DRSEL(1)' B2 1 DF2(1)' * u8 QC 13 2 C1 9 DRSEL(2)' C2 5 DF2(2)' * u8 QD 12 3 D1 7 DRSEL(3)' D2 6 DF2(3)' * * u18 QA 15 4 A1 3 DRSEL(4)' A2 2 LOADT' * u18 QB 14 5 B1 4 DALUF(0)' B2 1 LOADL * u18 QC 13 6 C1 9 DALUF(1)' C2 5 NEXT(00)' * u18 QD 12 7 D1 7 DALUF(2)' D2 6 NEXT(01)' * * u28 QA 15 8 A1 3 DALUF(3)' A2 2 NEXT(02)' * u28 QB 14 9 B1 4 DBS(0)' B2 1 NEXT(03)' * u28 QC 13 10 C1 9 DBS(1)' C2 5 NEXT(04)' * u28 QD 12 11 D1 7 DBS(2)' D2 6 NEXT(05)' * * u38 QA 15 12 A1 3 DF1(0) A2 2 NEXT(06)' * u38 QB 14 13 B1 4 DF1(1)' B2 1 NEXT(07)' * u38 QC 13 14 C1 9 DF1(2)' C2 5 NEXT(08)' * u38 QD 12 15 D1 7 DF1(3)' D2 6 NEXT(09)' * * The HALFSEL signal to the demultiplexers is the inverted bit BUS(5): * BUS(5)=1, HALFSEL=0, A1,B1,C1,D1 inputs, upper half of the 32-bit word * BUS(5)=0, HALFSEL=1, A2,B2,C2,D2 inputs, lower half of the 32-bit word */ void alto2_cpu_device::rdram() { UINT32 addr, value; UINT32 bank = GET_CRAM_BANKSEL(m_cram_addr); UINT32 wordaddr = GET_CRAM_WORDADDR(m_cram_addr); if (GET_CRAM_RAMROM(m_cram_addr)) { /* read CROM 0 at current mpc */ addr = m_mpc & ALTO2_UCODE_PAGE_MASK; LOG((this,LOG_CPU,0," rdram: ROM [%05o] ", addr)); } else { /* read CRAM[bank] */ addr = bank * ALTO2_UCODE_PAGE_SIZE + wordaddr; LOG((this,LOG_CPU,0," rdram: RAM%d [%04o] ", bank, wordaddr)); } m_rdram_flag = false; if (m_ucode_ram_base + addr >= m_ucode_size) { value = 0177777; /* ??? */ LOG((this,LOG_CPU,0,"invalid address (%06o)\n", addr)); #if DEBUG_RDRAM printf("RD CRAM_BANKSEL=%d RAM%d [%04o] invalid address!\n", GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr); #endif return; } value = *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + addr * 4) ^ ALTO2_UCODE_INVERTED; #if DEBUG_RDRAM char buffer[256]; UINT8* oprom = m_ucode_cram.get() + 4 * wordaddr; disasm_disassemble(buffer, wordaddr, oprom, oprom, 0); printf("RD CRAM_BANKSEL=%d RAM%d [%04o] upper:%06o lower:%06o value:%011o '%s'\n", GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr, m_myl, m_alu, value, buffer); #endif if (GET_CRAM_HALFSEL(m_cram_addr)) { value >>= 16; LOG((this,LOG_CPU,0,"upper:%06o\n", value)); } else {