Esempio n. 1
0
void testReplacement(const string& input,
                     const string& expected,
                     InstrCode initial,
                     InstrCode replacement,
                     InstrCode next1 = InstrCodeCount,
                     InstrCode next2 = InstrCodeCount)
{
    Stack<Value> result;
    Stack<Env*> globals;
    bool ok = CompileModule(input, globals, result);
    testTrue(ok);
    Stack<Block*> block(result.as<CodeObject>()->block());

    InstrThunk* instrp = block->findInstr(Instr_Lambda);
    assert(instrp);
    Instr* instr = instrp->data;
    assert(instr->code() == Instr_Lambda);
    LambdaInstr* lambda = static_cast<LambdaInstr*>(instr);
    instrp = lambda->block()->findInstr(initial);
    assert(instrp);

    ok = interp->exec(block, result);
    if (!ok)
        cerr << "Error: " << result.asObject()->as<Exception>()->message() << endl;
    testTrue(ok);
    testEqual(repr(result.get()), expected);

    instr = instrp->data;
    testEqual(instrName(instr->code()), instrName(replacement));

    if (next1 < InstrCodeCount) {
        instr = getNextInstr(instr);
        assert(instr);
        testEqual(instrName(instr->code()), instrName(next1));

        if (next2 < InstrCodeCount) {
            instr = getNextInstr(instr);
            assert(instr);
            testEqual(instrName(instr->code()), instrName(next2));
        }
    }
}
Esempio n. 2
0
/** Display registers, flags and the next instruction in the console */
void rntDisplayStatus(void)
{
	Error		rval = ERR_None;
	ProcInfo	info;
	char		buff[MAXOUTLEN];
	char		nextInstr[21];

	rval = instToStr(getNextInstr(), nextInstr);
	if(rval != ERR_None)
	{
		strcpy(nextInstr, "???");
	}

	info = getStatus();
	sprintf(buff,
		"  Registers: A: %-10d B: %-10d PC: %d\n"
		"  Flags:     Z: %c   O: %c   N: %c\n"
		"  => %s\n",
		info.regA, info.regB, info.progCounter,
		FLAGTOCHAR(info.flagZ), FLAGTOCHAR(info.flagO), FLAGTOCHAR(info.flagN),
		nextInstr);

	consoleOut(buff);
}
Esempio n. 3
0
int main(int argc, char **argv) {
    // allocate and zero out memory and registers
    initialiseARMstate();

    // ensure correct number of args
    if (argc != 2) {
        printUsageMsg();
        return EXIT_FAILURE;
    }

    // open inary file
    FILE *instrFile = fopen(argv[1], "r");
    if (instrFile == NULL) {
        printUsageMsg();
        return EXIT_FAILURE;
    }

    // load instructions into memory
    size_t numRead = fread(MEM, MEM_WORD_SIZE, MEM_SIZE, instrFile);
    if (numRead == 0) {
        fputs("Error: Could not read binary file", stderr);
        printUsageMsg();
        return EXIT_FAILURE;
    }

    if (!feof(instrFile)) {
        fputs("Error: Ran out of memory to hold instructions.", stderr);
        return EXIT_FAILURE;
    }

    // close the binary file
    if (fclose(instrFile)) {
        fputs("Warning: failed to close binary file.", stderr);
    }

    // initialise fetched and current instruction
    uint32_t fetchedInstr = getNextInstr();
    uint32_t currInstr = fetchedInstr;

    // loop until next instruction is 0 (halt instruction)
    while (currInstr) {
        // gets next instruction and increments PC
        currInstr = fetchedInstr;
        fetchedInstr = getNextInstr();

        // skip this instruction if condition says to
        if (!checkCond(currInstr)) {
            continue;
        }

        // decode and execute the instruction
        bool wasBranch = decodeAndExecute(currInstr);

        if (wasBranch) {
            fetchedInstr = getNextInstr();
        }
    }

    // print the final system state
    printState();

    // free memory used
    deallocARMState();

    return EXIT_SUCCESS;
}
int main() {
	FILE *arq = NULL;
    
    char patFilename[] = __FILE__;
    patFilename[ strlen(patFilename)-2 ] = '\0';

	arq = fopen("instructions/control.txt", "r+");
	
	if( !arq ) {
		fprintf(stderr, "\nCouldn't open 'instructions/control.txt' file.\n");
		return 1;
	}
	
	DEF_GENPAT(patFilename);
	
	DECLAR("CLK"	, ":2", "B", IN , "", "");
	DECLAR("Reset"	, ":2", "B", IN , "","");

	DECLAR("State"		, ":2", "X", OUT, "3 down to 0", "");

	DECLAR("Opcode"	, ":2", "B", IN , "5 down to 0", "");
	
	// Multiplexer Selects
	DECLAR("MemtoReg"	, ":2", "B", OUT, "", "");
	DECLAR("RegDst"		, ":2", "B", OUT, "", "");
	DECLAR("IorD"		, ":2", "B", OUT, "", "");
	DECLAR("PCSrc"		, ":2", "B", OUT, "1 down to 0", "");
	DECLAR("ALUSrcA"	, ":2", "B", OUT, "", "");
	DECLAR("ALUSrcB"	, ":2", "B", OUT, "1 down to 0", "");
	DECLAR("ALUOp"	    , ":2", "B", OUT, "1 down to 0", "");
	
	// Registers Enables
	DECLAR("IRWrite"	, ":2", "B", OUT, "", "");
	DECLAR("MemWrite"	, ":2", "B", OUT, "", "");	
	DECLAR("PCWrite"	, ":2", "B", OUT, "", "");
	DECLAR("RegWrite"	, ":2", "B", OUT, "", "");
	DECLAR("Branch"		, ":2", "B", OUT, "", "");

	DECLAR ("Vdd"		, ":2", "B", IN , "", "");
	DECLAR ("Vss"		, ":2", "B", IN , "", "");


	AFFECT ("0", "Vdd", "1");
	AFFECT ("0", "Vss", "0");
	AFFECT ("0", "CLK", "0");
    AFFECT ("0", "Reset", "1");
    AFFECT ("0", "Opcode", "0");
    
    FsmMode = MODE_FSM;
    
    curvect++;
    toggleClock();
    FsmReset();
    
    curvect++;
    toggleClock();
    
    AFFECT (cvect(), "Reset", "0");
    curvect++;
    
	while(1) {
    
        toggleClock();
        
        FsmRunState();
        
        curvect++;
        toggleClock();
        
        if(FsmNextState == 1) {
            if( !getNextInstr(arq) ) {
                break;
            }
            
            AFFECT(cvect(), "Opcode", inttostr(DecOpcode));
            FsmOpcode = DecOpcode;
        }
        curvect++;
        
	}
	
	SAV_GENPAT();
	
	return 0;
}