static void __init ux500_timer_init(void) { void __iomem *prcmu_timer_base; if (cpu_is_u5500()) { mtu_base = __io_address(U5500_MTU0_BASE); prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE); } else if (cpu_is_u8500()) { mtu_base = __io_address(U8500_MTU0_BASE); prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); } else { ux500_unknown_soc(); } /* * Here we register the timerblocks active in the system. * Localtimers (twd) is started when both cpu is up and running. * MTU register a clocksource, clockevent and sched_clock. * Since the MTU is located in the VAPE power domain * it will be cleared in sleep which makes it unsuitable. * We however need it as a timer tick (clockevent) * during boot to calibrate delay until twd is started. * RTC-RTT have problems as timer tick during boot since it is * depending on delay which is not yet calibrated. RTC-RTT is in the * always-on powerdomain and is used as clockevent instead of twd when * sleeping. * The PRCMU timer 4(3 for DB5500) register a clocksource and * sched_clock with higher rating then MTU since is always-on. * */ nmdk_timer_init(); clksrc_dbx500_prcmu_init(prcmu_timer_base); ux500_twd_init(); }
static void __init nomadik_timer_init(void) { u32 src_cr; /* Configure timer sources in "system reset controller" ctrl reg */ src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); src_cr &= SRC_CR_INIT_MASK; src_cr |= SRC_CR_INIT_VAL; writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0); }
void __init ux500_timer_init(void) { void __iomem *mtu_timer_base; void __iomem *prcmu_timer_base; void __iomem *tmp_base; struct device_node *np; if (cpu_is_u8500_family() || cpu_is_ux540_family()) { mtu_timer_base = __io_address(U8500_MTU0_BASE); prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); } else { ux500_unknown_soc(); } /* TODO: Once MTU has been DT:ed place code above into else. */ if (of_have_populated_dt()) { #ifdef CONFIG_OF np = of_find_matching_node(NULL, prcmu_timer_of_match); if (!np) #endif goto dt_fail; tmp_base = of_iomap(np, 0); if (!tmp_base) goto dt_fail; prcmu_timer_base = tmp_base; } dt_fail: /* Doing it the old fashioned way. */ /* * Here we register the timerblocks active in the system. * Localtimers (twd) is started when both cpu is up and running. * MTU register a clocksource, clockevent and sched_clock. * Since the MTU is located in the VAPE power domain * it will be cleared in sleep which makes it unsuitable. * We however need it as a timer tick (clockevent) * during boot to calibrate delay until twd is started. * RTC-RTT have problems as timer tick during boot since it is * depending on delay which is not yet calibrated. RTC-RTT is in the * always-on powerdomain and is used as clockevent instead of twd when * sleeping. * The PRCMU timer 4 register a clocksource and * sched_clock with higher rating then MTU since is always-on. * */ if (!of_have_populated_dt()) nmdk_timer_init(mtu_timer_base, IRQ_MTU0); clksrc_dbx500_prcmu_init(prcmu_timer_base); ux500_twd_init(); }
static void __init ux500_timer_init(void) { #ifdef CONFIG_LOCAL_TIMERS /* Setup the local timer base */ twd_base = __io_address(UX500_TWD_BASE); #endif /* Setup the MTU base */ if (cpu_is_u8500ed()) mtu_base = __io_address(U8500_MTU0_BASE_ED); else mtu_base = __io_address(UX500_MTU0_BASE); nmdk_timer_init(); }
static void __init nomadik_timer_init(void) { u32 src_cr; /* Configure timer sources in "system reset controller" ctrl reg */ src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); src_cr &= SRC_CR_INIT_MASK; src_cr |= SRC_CR_INIT_VAL; writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); /* Save global pointer to mtu, used by platform timer code */ mtu_base = io_p2v(NOMADIK_MTU0_BASE); nmdk_timer_init(); }