/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { usart->UBRR = 0; usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_MSPI_gc); if (opt->spimode == 1 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPHA_bm; } else { usart->UCSRnC &= ~USART_UCPHA_bm; } if (opt->spimode == 2 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPOL_bm; } else { usart->UCSRnC &= ~USART_UCPOL_bm; } if (opt->data_order) { usart->UCSRnC |= USART_DORD_bm; } else { usart->UCSRnC &= ~USART_DORD_bm; } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_source_clock_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
/** * \brief Initialize USART in RS232 mode. * * This function initializes the USART module in RS232 mode using the * usart_rs232_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt) { usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc); usart_format_set(usart, opt->charlength, opt->paritytype, opt->stopbits); usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { usart->UBRR = 0; usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_MSPI_gc); port_pin_t sck_pin; #ifdef USARTA0 if ((uintptr_t)usart == (uintptr_t)&UCSR0A) { sck_pin = IOPORT_CREATE_PIN(PORTE, 2); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); } #endif #ifdef USARTA1 if ((uintptr_t)usart == (uintptr_t)&UCSR1A) { sck_pin = IOPORT_CREATE_PIN(PORTD, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); } #endif if (opt->spimode == 1 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPHA_bm; } else { usart->UCSRnC &= ~USART_UCPHA_bm; } if (opt->spimode == 2 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPOL_bm; } else { usart->UCSRnC &= ~USART_UCPOL_bm; } if (opt->data_order) { usart->UCSRnC |= USART_DORD_bm; } else { usart->UCSRnC &= ~USART_DORD_bm; } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_source_clock_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_MSPI_gc); port_pin_t sck_pin; if (opt->spimode == 1 || opt->spimode == 3) { //! \todo Fix when UCPHA_bm is added to header file. usart->CTRLC |= 0x02; } else { //! \todo Fix when UCPHA_bm is added to header file. usart->CTRLC &= ~0x02; } // configure Clock polarity using INVEN bit of the correct SCK I/O port if (opt->spimode == 2 || opt->spimode == 3) { #ifdef USARTC0 if ((uint16_t)usart == (uint16_t)&USARTC0) { sck_pin = IOPORT_CREATE_PIN(PORTC, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTC1 if ((uint16_t)usart == (uint16_t)&USARTC1) { sck_pin = IOPORT_CREATE_PIN(PORTC, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTD0 if ((uint16_t)usart == (uint16_t)&USARTD0) { sck_pin = IOPORT_CREATE_PIN(PORTD, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTD1 if ((uint16_t)usart == (uint16_t)&USARTD1) { sck_pin = IOPORT_CREATE_PIN(PORTD, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTE0 if ((uint16_t)usart == (uint16_t)&USARTE0) { sck_pin = IOPORT_CREATE_PIN(PORTE, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTE1 if ((uint16_t)usart == (uint16_t)&USARTE1) { sck_pin = IOPORT_CREATE_PIN(PORTE, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTF0 if ((uint16_t)usart == (uint16_t)&USARTF0) { sck_pin = IOPORT_CREATE_PIN(PORTF, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTF1 if ((uint16_t)usart == (uint16_t)&USARTF1) { sck_pin = IOPORT_CREATE_PIN(PORTF, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }