コード例 #1
0
u32
ODM_GetRFReg(
	PDM_ODM_T			pDM_Odm,
	ODM_RF_RADIO_PATH_E	eRFPath,
	u32				RegAddr,
	u32				BitMask
	)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
	return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
	struct rtw_adapter *		Adapter = pDM_Odm->Adapter;
	return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask);
#endif
}
コード例 #2
0
u4Byte 
ODM_GetRFReg(	
	IN 	PDM_ODM_T			pDM_Odm,
	IN	ODM_RF_RADIO_PATH_E	eRFPath,
	IN	u4Byte				RegAddr,
	IN	u4Byte				BitMask
	)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
	return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
	PADAPTER		Adapter = pDM_Odm->Adapter;
	return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask);
#endif	
}
コード例 #3
0
ファイル: 8192d_hw.c プロジェクト: cmotc/openwrt-realtek
unsigned int DMDP_PHY_QueryRFReg(unsigned int phy, RF92CD_RADIO_PATH_E eRFPath,
				unsigned int RegAddr, unsigned int BitMask, unsigned int dbg_avoid)
{
	//printk("++++++++++++++++++++++++++%s++++++++++++++++++++++++++\n", __FUNCTION__);
	if (phy >= NUM_WLAN_IFACE || phy < 0) {
		printk("%s: phy index[%d] out of bound !!\n", __FUNCTION__, phy);
		return -1;
	}
	return PHY_QueryRFReg((struct rtl8192cd_priv *)if_priv[phy], eRFPath, RegAddr, BitMask, dbg_avoid);
}
コード例 #4
0
ファイル: rtw_mp.c プロジェクト: BARBAZ/rtl8188eu
s32 MPT_InitializeAdapter(struct adapter *pAdapter, u8 Channel)
{
	struct hal_data_8188e	*pHalData = GET_HAL_DATA(pAdapter);
	s32		rtStatus = _SUCCESS;
	struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
	struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;

	/*  HW Initialization for 8190 MPT. */
	/*  SW Initialization for 8190 MP. */
	pMptCtx->bMptDrvUnload = false;
	pMptCtx->bMassProdTest = false;
	pMptCtx->bMptIndexEven = true;	/* default gain index is -6.0db */
	pMptCtx->h2cReqNum = 0x0;
	/* Init mpt event. */
	/* init for BT MP */

	pMptCtx->bMptWorkItemInProgress = false;
	pMptCtx->CurrMptAct = NULL;
	/*  */

	/*  Don't accept any packets */
	rtw_write32(pAdapter, REG_RCR, 0);

	PHY_IQCalibrate(pAdapter, false);
	dm_CheckTXPowerTracking(&pHalData->odmpriv);	/* trigger thermal meter */
	PHY_LCCalibrate(pAdapter);

	pMptCtx->backup0xc50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
	pMptCtx->backup0xc58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
	pMptCtx->backup0xc30 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
	pMptCtx->backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
	pMptCtx->backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);

	/* set ant to wifi side in mp mode */
	rtw_write16(pAdapter, 0x870, 0x300);
	rtw_write16(pAdapter, 0x860, 0x110);

	if (pAdapter->registrypriv.mp_mode == 1)
		pmlmepriv->fw_state = WIFI_MP_STATE;

	return	rtStatus;
}
コード例 #5
0
ファイル: r8192C_rtl6052.c プロジェクト: keyemb/srcsaved
extern	bool
PHY_RFShadowCompare(
	struct net_device* dev,
	RF90_RADIO_PATH_E	eRFPath,
	u32				Offset)
{
	u32	reg;
	if (RF_Shadow[eRFPath][Offset].Compare == true)
	{
		reg = PHY_QueryRFReg(dev, eRFPath, Offset, bRFRegOffsetMask);
		if (RF_Shadow[eRFPath][Offset].Value != reg)
		{
			RF_Shadow[eRFPath][Offset].ErrorOrNot = true;
			RT_TRACE(COMP_INIT, 
			"PHY_RFShadowCompare RF-%d Addr%02x Err = %05x\n", 
			eRFPath, Offset, reg);
		}
		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
	}
	return false;
}	/* PHY_RFShadowCompare */
コード例 #6
0
BOOLEAN
PHY_RFShadowCompare(
	IN	PADAPTER			Adapter,
	IN	RF_RADIO_PATH_E	eRFPath,
	IN	u32				Offset)
{
	u32	reg;
	// Check if we need to check the register
	if (RF_Shadow[eRFPath][Offset].Compare == _TRUE)
	{
		reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
		// Compare shadow and real rf register for 20bits!!
		if (RF_Shadow[eRFPath][Offset].Value != reg)
		{
			// Locate error position.
			RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
			//RT_TRACE(COMP_INIT, DBG_LOUD,
			//("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n",
			//eRFPath, Offset, reg));
		}
		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
	}
	return _FALSE;
}	/* PHY_RFShadowCompare */
コード例 #7
0
ファイル: rtw_mp.c プロジェクト: Dee-UK/RK3188_KK_4.4.02_Beta
s32
MPT_InitializeAdapter(
	IN	PADAPTER			pAdapter,
	IN	u8				Channel
	)
{
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
	s32		rtStatus = _SUCCESS;
	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
	u32		ledsetting;
	struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;

	//-------------------------------------------------------------------------
	// HW Initialization for 8190 MPT.
	//-------------------------------------------------------------------------
	//-------------------------------------------------------------------------
	// SW Initialization for 8190 MP.
	//-------------------------------------------------------------------------
	pMptCtx->bMptDrvUnload = _FALSE;
	pMptCtx->bMassProdTest = _FALSE;
	pMptCtx->bMptIndexEven = _TRUE;	//default gain index is -6.0db
	pMptCtx->h2cReqNum = 0x0;
	/* Init mpt event. */
#if 0 // for Windows
	NdisInitializeEvent( &(pMptCtx->MptWorkItemEvent) );
	NdisAllocateSpinLock( &(pMptCtx->MptWorkItemSpinLock) );

	PlatformInitializeWorkItem(
		Adapter,
		&(pMptCtx->MptWorkItem),
		(RT_WORKITEM_CALL_BACK)MPT_WorkItemCallback,
		(PVOID)Adapter,
		"MptWorkItem");
#endif
	//init for BT MP
#ifdef CONFIG_RTL8723A
	pMptCtx->bMPh2c_timeout = _FALSE;
	pMptCtx->MptH2cRspEvent = _FALSE;
	pMptCtx->MptBtC2hEvent = _FALSE;
	
	_rtw_init_sema(&pMptCtx->MPh2c_Sema, 0);
	_init_timer( &pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter );

	//before the reset bt patch command,set the wifi page 0's IO to BT mac reboot.
#endif

	pMptCtx->bMptWorkItemInProgress = _FALSE;
	pMptCtx->CurrMptAct = NULL;
	//-------------------------------------------------------------------------

#if 1
	// Don't accept any packets
	rtw_write32(pAdapter, REG_RCR, 0);
#else
	// Accept CRC error and destination address
	//pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP);
	//rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
	rtw_write32(pAdapter, REG_RCR, 0x70000101);
#endif

#if 0
	// If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP.
	if (pHalData->AutoloadFailFlag == TRUE)
	{
		pHalData->RF_Type = RF_2T2R;
	}
#endif

	//ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);
	//rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS);
	
	if(IS_HARDWARE_TYPE_8192DU(pAdapter))
	{
		rtw_write32(pAdapter, REG_LEDCFG0, 0x8888);
	}
	else
	{
		//rtw_write32(pAdapter, REG_LEDCFG0, 0x08080);
		ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);
		
	#if defined (CONFIG_RTL8192C) || defined( CONFIG_RTL8192D )
			rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS);
	#endif
	}
	
	PHY_IQCalibrate(pAdapter, _FALSE);
	dm_CheckTXPowerTracking(&pHalData->odmpriv);	//trigger thermal meter
	PHY_LCCalibrate(pAdapter);

#ifdef CONFIG_PCI_HCI
	PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/);	//Wifi default use Main
#else

#ifdef CONFIG_RTL8192C
	if (pHalData->BoardType == BOARD_MINICARD)
		PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main
#endif

#endif

	pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
	pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
	pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
#ifdef CONFIG_RTL8188E
	pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
	pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
#endif
		//set ant to wifi side in mp mode
#ifdef CONFIG_RTL8723A
		rtl8723a_InitAntenna_Selection(pAdapter);	
#endif //CONFIG_RTL8723A

	//set ant to wifi side in mp mode
	rtw_write16(pAdapter, 0x870, 0x300);
	rtw_write16(pAdapter, 0x860, 0x110);

	if (pAdapter->registrypriv.mp_mode == 1)
		pmlmepriv->fw_state = WIFI_MP_STATE;

	return	rtStatus;
}
コード例 #8
0
ファイル: rtl8192d_rf6052.c プロジェクト: AxelLin/MTK5931
static int
phy_RF6052_Config_ParaFile(
	IN	PADAPTER		Adapter
	)
{
	u32	u4RegValue=0;
	u8	eRFPath;		
	BB_REGISTER_DEFINITION_T	*pPhyReg;	
	int	rtStatus = _SUCCESS;
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
	u8	*pszRadioAFile = NULL, *pszRadioBFile = NULL;
	static s8		sz92DRadioAFile[] = RTL8192D_PHY_RADIO_A;
	static s8		sz92DRadioBFile[] = RTL8192D_PHY_RADIO_B;
	static s8		sz92DRadioAintPAFile[] = RTL8192D_PHY_RADIO_A_intPA;
	static s8		sz92DRadioBintPAFile[] = RTL8192D_PHY_RADIO_B_intPA;
	BOOLEAN		bMac1NeedInitRadioAFirst = _FALSE,bMac0NeedInitRadioBFirst = _FALSE;	
	BOOLEAN     	bNeedPowerDownRadioA = _FALSE,bNeedPowerDownRadioB = _FALSE;
	BOOLEAN		bTrueBPath = _FALSE;//vivi added this for read parameter from header, 20100908
	u32	MaskforPhySet = 0; //For 92d PHY cross access, 88c must set value 0.


	pszRadioAFile = sz92DRadioAFile;
	pszRadioBFile = sz92DRadioBFile;

	if(pHalData->InternalPA5G[0])
		pszRadioAFile = sz92DRadioAintPAFile;
	if(pHalData->InternalPA5G[1])
		pszRadioBFile = sz92DRadioBintPAFile;

	//DMDP,MAC0 on G band,MAC1 on A band.
	if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY)
	{
		if(pHalData->CurrentBandType92D == BAND_ON_2_4G && pHalData->interfaceIndex == 0)
		{
			//MAC0 Need PHY1 load radio_b.txt . Driver use DBI to write.
			if(rtl8192d_PHY_EnableAnotherPHY(Adapter, _TRUE))
			{
				pHalData->NumTotalRFPath = 2;
				bMac0NeedInitRadioBFirst = _TRUE;					
			}					
			else
			{         	
				// We think if MAC1 is ON,then radio_a.txt and radio_b.txt has been load.
				return rtStatus;
			}
		}
		else if(pHalData->CurrentBandType92D == BAND_ON_5G && pHalData->interfaceIndex == 1)
		{
			//MAC1 Need PHY0 load radio_a.txt . Driver use DBI to write.
			if(rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE))
			{		                                
				pHalData->NumTotalRFPath = 2;
				bMac1NeedInitRadioAFirst = _TRUE;
			}
			else
			{         	
				// We think if MAC0 is ON,then radio_a.txt and radio_b.txt has been load.
				return rtStatus;
			}
		}
		else if(pHalData->interfaceIndex == 1)
		{					
			// MAC0 enabled, only init radia B.				
			pszRadioAFile = pszRadioBFile;
			bTrueBPath = _TRUE;  //vivi added this for read parameter from header, 20100909
		}
	}

	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_RF6052_Config_ParaFile() Radio_A:%s\n",pszRadioAFile));
	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_RF6052_Config_ParaFile() Radio_B:%s\n",pszRadioBFile));

	//3//-----------------------------------------------------------------
	//3// <2> Initialize RF
	//3//-----------------------------------------------------------------
	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
	{
		if (bMac1NeedInitRadioAFirst) //Mac1 use PHY0 write
		{
			if (eRFPath == RF_PATH_A)
			{
				bNeedPowerDownRadioA = _TRUE;
				MaskforPhySet = MAC1_ACCESS_PHY0;
			}             
			else if (eRFPath == RF_PATH_B)
			{
				MaskforPhySet = 0;
				bMac1NeedInitRadioAFirst = _FALSE;
				eRFPath = RF_PATH_A;
				bTrueBPath = _TRUE;
				pszRadioAFile = pszRadioBFile;
				pHalData->NumTotalRFPath = 1; 
			}
		}
		else  if (bMac0NeedInitRadioBFirst) //Mac0 use PHY1 write
		{
			if (eRFPath == RF_PATH_A)
			{
				MaskforPhySet = 0;
			}

			if (eRFPath == RF_PATH_B)
			{
				MaskforPhySet = MAC0_ACCESS_PHY1;
				bMac0NeedInitRadioBFirst = _FALSE;
				bNeedPowerDownRadioB = _TRUE;
				eRFPath = RF_PATH_A;
				bTrueBPath = _TRUE;		
				pszRadioAFile = pszRadioBFile;
				pHalData->NumTotalRFPath = 1; 
			}
             	}

		pPhyReg = &pHalData->PHYRegDef[eRFPath];
		
		/*----Store original RFENV control type----*/		
		switch(eRFPath)
		{
			case RF_PATH_A:
			case RF_PATH_C:
				u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV);
				break;
			case RF_PATH_B :
			case RF_PATH_D:
				u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16);
				break;
		}

		/*----Set RF_ENV enable----*/		
		PHY_SetBBReg(Adapter, pPhyReg->rfintfe|MaskforPhySet, bRFSI_RFENV<<16, 0x1);
		rtw_udelay_os(1);//PlatformStallExecution(1);
		
		/*----Set RF_ENV output high----*/
		PHY_SetBBReg(Adapter, pPhyReg->rfintfo|MaskforPhySet, bRFSI_RFENV, 0x1);
		rtw_udelay_os(1);//PlatformStallExecution(1);

		/* Set bit number of Address and Data for RF register */
		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireAddressLength, 0x0); 	// Set 1 to 4 bits for 8255
		rtw_udelay_os(1);//PlatformStallExecution(1);

		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireDataLength, 0x0);	// Set 0 to 12  bits for 8255
		rtw_udelay_os(1);//PlatformStallExecution(1);

		/*----Initialize RF fom connfiguration file----*/
		switch(eRFPath)
		{
			case RF_PATH_A:
#ifdef CONFIG_EMBEDDED_FWIMG
				//vivi added this for read parameter from header, 20100908
				if(bTrueBPath == _TRUE)
					rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radiob_txt|MaskforPhySet, (RF_RADIO_PATH_E)eRFPath);
				else
					rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radioa_txt|MaskforPhySet, (RF_RADIO_PATH_E)eRFPath);
#else
				rtStatus = rtl8192d_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
#endif
				break;
			case RF_PATH_B:
#ifdef CONFIG_EMBEDDED_FWIMG
			rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radiob_txt, (RF_RADIO_PATH_E)eRFPath);
#else			
			rtStatus = rtl8192d_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
#endif
				break;
			case RF_PATH_C:
				break;
			case RF_PATH_D:
				break;
		}

		/*----Restore RFENV control type----*/;
		switch(eRFPath)
		{
			case RF_PATH_A:
			case RF_PATH_C:
				PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV, u4RegValue);
				break;
			case RF_PATH_B :
			case RF_PATH_D:
				PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16, u4RegValue);
				break;
		}

		if(rtStatus != _SUCCESS){
			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
			goto phy_RF6052_Config_ParaFile_Fail;
		}

	}

	if (bNeedPowerDownRadioA)
	{
		// check MAC0 enable or not again now, if enabled, not power down radio A.
		rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
	}
	else  if (bNeedPowerDownRadioB)
	{
		// check MAC1 enable or not again now, if enabled, not power down radio B.
		rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _TRUE);
	}

	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
	{
#if MP_DRIVER == 1
		PHY_SetRFReg(Adapter, eRFPath, RF_RXRF_A3, bRFRegOffsetMask, 0xff456);
#endif		
		pdmpriv->RegRF3C[eRFPath] = PHY_QueryRFReg(Adapter, eRFPath, RF_RXRF_A3, bRFRegOffsetMask);
	}

	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
	return rtStatus;
	
phy_RF6052_Config_ParaFile_Fail:	
	return rtStatus;
}
コード例 #9
0
void
odm_ConfigRFReg_8723B(
	IN	PDM_ODM_T				pDM_Odm,
	IN	u4Byte					Addr,
	IN	u4Byte					Data,
	IN  ODM_RF_RADIO_PATH_E     RF_PATH,
	IN	u4Byte				    RegAddr
	)
{
    if (Addr == 0xfe || Addr == 0xffe)
	{
		msleep(50);
	}
	else
	{
		PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
		/*  Add 1us delay between BB/RF register setting. */
		udelay(1);

		/* For disable/enable test in high temperature, the B6 value will fail to fill. Suggestion by BB Stanley, 2013.06.25. */
		if (Addr == 0xb6)
		{
			u4Byte getvalue = 0;
			u1Byte	count = 0;
			getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);

			udelay(1);

			while ((getvalue>>8)!=(Data>>8))
			{
				count++;
				PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
				udelay(1);
				getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);
				ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B6] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data, count));
				if (count>5)
					break;
			}
		}

		if (Addr == 0xb2)
		{
			u4Byte getvalue = 0;
			u1Byte	count = 0;
			getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);

			udelay(1);

			while (getvalue!=Data)
			{
				count++;
				PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
				udelay(1);
				/* Do LCK againg */
				PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, 0x18, bRFRegOffsetMask, 0x0fc07);
				udelay(1);
				getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);
				ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B2] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data, count));
				if (count>5)
					break;
			}
		}
	}