uint8_t adxl345_getreg8(FAR struct adxl345_dev_s *priv, uint8_t regaddr)
{
uint8_t regval;
/* If SPI bus is shared then lock and configure it */
#ifndef CONFIG_SPI_OWNBUS
(void)SPI_LOCK(priv->spi, true);
adxl345_configspi(priv->spi);
#endif
/* Select the ADXL345 */
SPI_SELECT(priv->spi, SPIDEV_GSENSOR, true);
/* Send register to read and get the next byte */
(void)SPI_SEND(priv->spi, regaddr);
SPI_RECVBLOCK(priv->spi, ®val, 1);
/* Deselect the ADXL345 */
SPI_SELECT(priv->spi, SPIDEV_GSENSOR, false);
/* Unlock bus */
#ifndef CONFIG_SPI_OWNBUS
(void)SPI_LOCK(priv->spi, false);
#endif
#ifdef CONFIG_ADXL345_REGDEBUG
dbg("%02x->%02x\n", regaddr, regval);
#endif
return regval;
}
int
SPI::transfer(uint8_t *send, uint8_t *recv, unsigned len)
{
if ((send == nullptr) && (recv == nullptr))
return -EINVAL;
/* do common setup */
if (!up_interrupt_context())
SPI_LOCK(_dev, true);
SPI_SETFREQUENCY(_dev, _frequency);
SPI_SETMODE(_dev, _mode);
SPI_SETBITS(_dev, 8);
SPI_SELECT(_dev, _device, true);
/* do the transfer */
SPI_EXCHANGE(_dev, send, recv, len);
/* and clean up */
SPI_SELECT(_dev, _device, false);
if (!up_interrupt_context())
SPI_LOCK(_dev, false);
return OK;
}
static void ramtron_waitwritecomplete(struct ramtron_dev_s *priv)
{
uint8_t status;
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
/* Send "Read Status Register (RDSR)" command */
(void)SPI_SEND(priv->dev, RAMTRON_RDSR);
/* Loop as long as the memory is busy with a write cycle */
do
{
/* Send a dummy byte to generate the clock needed to shift out the status */
status = SPI_SEND(priv->dev, RAMTRON_DUMMY);
}
while ((status & RAMTRON_SR_WIP) != 0);
/* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
fvdbg("Complete\n");
}
static uint16_t ads7843e_sendcmd(FAR struct ads7843e_dev_s *priv, uint8_t cmd)
{
uint8_t buffer[2];
uint16_t result;
/* Select the ADS7843E */
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, true);
/* Send the command */
(void)SPI_SEND(priv->spi, cmd);
ads7843e_waitbusy(priv);
/* Read the data */
SPI_RECVBLOCK(priv->spi, buffer, 2);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
result = result >> 4;
ivdbg("cmd:%02x response:%04x\n", cmd, result);
return result;
}
static uint16_t ads7843e_sendcmd(FAR struct ads7843e_dev_s *priv, uint8_t cmd)
{
uint8_t buffer[2];
uint16_t result;
/* Select the ADS7843E */
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, true);
/* Send the command */
(void)SPI_SEND(priv->spi, cmd);
/* Wait a tiny amount to make sure that the aquisition time is complete */
up_udelay(3); /* 3 microseconds */
/* Read the 12-bit data (LS 4 bits will be padded with zero) */
SPI_RECVBLOCK(priv->spi, buffer, 2);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
result = result >> 4;
ivdbg("cmd:%02x response:%04x\n", cmd, result);
return result;
}
static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv,
uint8_t cmd, int *tags)
{
uint8_t buffer[2];
uint16_t result;
/* Select the MAX11802 */
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, true);
/* Send the command */
(void)SPI_SEND(priv->spi, cmd);
/* Read the data */
SPI_RECVBLOCK(priv->spi, buffer, 2);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
*tags = result & 0xF;
result >>= 4; /* Get rid of tags */
iinfo("cmd:%02x response:%04x\n", cmd, result);
return result;
}
void adxl345_putreg8(FAR struct adxl345_dev_s *priv, uint8_t regaddr,
uint8_t regval)
{
#ifdef CONFIG_ADXL345_REGDEBUG
dbg("%02x<-%02x\n", regaddr, regval);
#endif
/* If SPI bus is shared then lock and configure it */
#ifndef CONFIG_SPI_OWNBUS
(void)SPI_LOCK(priv->spi, true);
adxl345_configspi(priv->spi);
#endif
/* Select the ADXL345 */
SPI_SELECT(priv->spi, SPIDEV_GSENSOR, true);
/* Send register address and set the value */
(void)SPI_SEND(priv->spi, regaddr);
(void)SPI_SEND(priv->spi, regval);
/* Deselect the ADXL345 */
SPI_SELECT(priv->spi, SPIDEV_GSENSOR, false);
/* Unlock bus */
#ifndef CONFIG_SPI_OWNBUS
(void)SPI_LOCK(priv->spi, false);
#endif
}
static bool
read_fifo(uint16_t *data)
{
struct { /* status register and data as read back from the device */
uint8_t cmd;
uint8_t status;
int16_t x;
int16_t y;
int16_t z;
} __attribute__((packed)) report;
report.cmd = ADDR_STATUS_REG | DIR_READ | ADDR_INCREMENT;
/* exchange the report structure with the device */
SPI_LOCK(lis331_dev.spi, true);
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_EXCHANGE(lis331_dev.spi, &report, &report, sizeof(report));
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
SPI_LOCK(lis331_dev.spi, false);
data[0] = report.x;
data[1] = report.y;
data[2] = report.z;
return report.status & STATUS_ZYXDA;
}
static int
mpu6000_read_fifo(int16_t *data)
{
// struct { /* status register and data as read back from the device */
// uint8_t cmd;
// uint8_t temp;
// uint8_t status;
// int16_t x;
// int16_t y;
// int16_t z;
// } __attribute__((packed)) report;
//
// report.cmd = ADDR_OUT_TEMP | DIR_READ | ADDR_INCREMENT;
//
// /* exchange the report structure with the device */
// SPI_LOCK(mpu6000_dev.spi, true);
//
// SPI_SELECT(mpu6000_dev.spi, mpu6000_dev.spi_id, true);
//
// read_reg(ADDR_WHO_AM_I);
//
// SPI_EXCHANGE(mpu6000_dev.spi, &report, &report, sizeof(report));
// SPI_SELECT(mpu6000_dev.spi, mpu6000_dev.spi_id, false);
//
// SPI_LOCK(mpu6000_dev.spi, false);
//
//
//
//
// Device has MSB first at lower address (big endian)
struct { /* status register and data as read back from the device */
uint8_t cmd;
uint8_t int_status;
int16_t xacc;
int16_t yacc;
int16_t zacc;
int8_t temp;
int16_t rollspeed;
int16_t pitchspeed;
int16_t yawspeed;
} __attribute__((packed)) report;
report.cmd = 0x26 | DIR_READ | ADDR_INCREMENT;
SPI_LOCK(mpu6000_dev.spi, true);
SPI_SELECT(mpu6000_dev.spi, PX4_SPIDEV_MPU, true);
SPI_EXCHANGE(mpu6000_dev.spi, &report, &report, sizeof(report));
SPI_SELECT(mpu6000_dev.spi, PX4_SPIDEV_MPU, false);
SPI_LOCK(mpu6000_dev.spi, false);
data[0] = report.xacc;
data[1] = report.yacc;
data[2] = report.zacc;
return (report.int_status & 0x01);
}
static inline int ramtron_readid(struct ramtron_dev_s *priv)
{
uint16_t manufacturer, memory, capacity, part;
int i;
fvdbg("priv: %p\n", priv);
/* Lock the SPI bus, configure the bus, and select this FLASH part. */
ramtron_lock(priv);
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
/* Send the "Read ID (RDID)" command and read the first three ID bytes */
(void)SPI_SEND(priv->dev, RAMTRON_RDID);
for (i = 0; i < 6; i++)
{
manufacturer = SPI_SEND(priv->dev, RAMTRON_DUMMY);
/*
* Fujitsu parts such as MB85RS1MT only have 1-byte for the manufacturer
* ID. The manufacturer code is "0x4".
*/
if (manufacturer == 0x4)
break;
}
memory = SPI_SEND(priv->dev, RAMTRON_DUMMY);
capacity = SPI_SEND(priv->dev, RAMTRON_DUMMY); // fram.id1
part = SPI_SEND(priv->dev, RAMTRON_DUMMY); // fram.id2
/* Deselect the FLASH and unlock the bus */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
ramtron_unlock(priv->dev);
/* Select part from the part list */
for (priv->part = ramtron_parts;
priv->part->name != NULL && !(priv->part->id1 == capacity && priv->part->id2 == part);
priv->part++);
if (priv->part->name)
{
fvdbg("RAMTRON %s of size %d bytes (mf:%02x mem:%02x cap:%02x part:%02x)\n",
priv->part->name, priv->part->size, manufacturer, memory, capacity, part);
priv->sectorshift = RAMTRON_EMULATE_SECTOR_SHIFT;
priv->nsectors = priv->part->size / (1 << RAMTRON_EMULATE_SECTOR_SHIFT);
priv->pageshift = RAMTRON_EMULATE_PAGE_SHIFT;
priv->npages = priv->part->size / (1 << RAMTRON_EMULATE_PAGE_SHIFT);
priv->speed = priv->part->speed;
return OK;
}
fvdbg("RAMTRON device not found\n");
return -ENODEV;
}
static void
bma180_write_reg(uint8_t address, uint8_t data)
{
uint8_t cmd[2] = { address | DIR_WRITE, data };
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, true);
SPI_SNDBLOCK(bma180_dev.spi, &cmd, sizeof(cmd));
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, false);
}
static void
write_reg(uint8_t address, uint8_t data)
{
uint8_t cmd[2] = { address | DIR_WRITE, data };
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, true);
SPI_SNDBLOCK(lis331_dev.spi, &cmd, sizeof(cmd));
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, false);
}
static inline void nrf24l01_configspi(FAR struct spi_dev_s *spi)
{
/* Configure SPI for the NRF24L01 module. */
SPI_SELECT(spi, SPIDEV_WIRELESS, true); /* Useful ? */
SPI_SETMODE(spi, SPIDEV_MODE0);
SPI_SETBITS(spi, 8);
(void)SPI_HWFEATURES(spi, 0);
(void)SPI_SETFREQUENCY(spi, NRF24L01_SPIFREQ);
SPI_SELECT(spi, SPIDEV_WIRELESS, false);
}
static inline void nrf24l01_configspi(FAR struct spi_dev_s *spi)
{
/* Configure SPI for the NRF24L01 module.
* As we own the SPI bus this method is called just once.
*/
SPI_SELECT(spi, SPIDEV_WIRELESS, true); // Useful ?
SPI_SETMODE(spi, SPIDEV_MODE0);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, NRF24L01_SPIFREQ);
SPI_SELECT(spi, SPIDEV_WIRELESS, false);
}
static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t cmd)
{
spivdbg("cmd %04x\n", cmd);
/* Lock, select, send the 16-bit command, de-select, and un-lock. */
pga11x_lock(spi);
SPI_SELECT(spi, SPIDEV_MUX, true);
pga11x_send16(spi, cmd);
SPI_SELECT(spi, SPIDEV_MUX, false);
pga11x_unlock(spi);
}
static uint8_t
read_reg(uint8_t address)
{
uint8_t cmd[2] = {address | DIR_READ, 0};
uint8_t data[2];
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_EXCHANGE(lis331_dev.spi, cmd, data, sizeof(cmd));
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
return data[1];
}
static inline void ads7843e_configspi(FAR struct spi_dev_s *spi)
{
/* Configure SPI for the ADS7843. But only if we own the SPI bus. Otherwise, don't
* bother because it might change.
*/
SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, true);
SPI_SETMODE(spi, CONFIG_ADS7843E_SPIMODE);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_ADS7843E_FREQUENCY);
SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, false);
}
static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t u1cmd, uint16_t u2cmd)
{
spivdbg("U1 cmd: %04x U2 cmd: %04x\n", u1cmd, u2cmd);
/* Lock, select, send the U2 16-bit command, the U1 16-bit command, de-select,
* and un-lock.
*/
pga11x_lock(spi);
SPI_SELECT(spi, SPIDEV_MUX, true);
pga11x_send16(spi, u2cmd);
pga11x_send16(spi, u1cmd);
SPI_SELECT(spi, SPIDEV_MUX, false);
pga11x_unlock(spi);
}
static void ramtron_writeenable(struct ramtron_dev_s *priv)
{
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
/* Send "Write Enable (WREN)" command */
(void)SPI_SEND(priv->dev, RAMTRON_WREN);
/* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
fvdbg("Enabled\n");
}
static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
{
FAR struct inode *inode = filep->f_inode;
FAR struct max31855_dev_s *priv = inode->i_private;
FAR uint16_t *temp = (FAR uint16_t *) buffer;
int ret = 2;
int32_t regmsb;
int32_t regval;
/* Check for issues */
if (!buffer)
{
sndbg("Buffer is null\n");
return -EINVAL;
}
if (buflen != 2)
{
sndbg("You can't read something other than 16 bits (2 bytes)\n");
return -EINVAL;
}
/* Enable MAX31855's chip select */
SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, true);
/* Read temperature */
SPI_RECVBLOCK(priv->spi, ®msb, 4);
/* Disable MAX31855's chip select */
SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, false);
regval = (regmsb & 0xFF000000) >> 24;
regval |= (regmsb & 0xFF0000) >> 8;
regval |= (regmsb & 0xFF00) << 8;
regval |= (regmsb & 0xFF) << 24;
sndbg("Read from MAX31855 = 0x%08X\n", regval);
/* If negative, fix signal bits */
if (regval & 0x80000000)
{
*temp = 0xc000 | (regval >> 18);
}
__EXPORT int nsh_archinitialize(void)
{
/* the interruption subsystem is not initialized when stm32_boardinitialize() is called */
stm32_gpiosetevent(GPIO_FORCE_BOOTLOADER, true, false, false, _bootloader_force_pin_callback);
/* configure power supply control/sense pins */
stm32_configgpio(GPIO_VDD_5V_SENSORS_EN);
/* configure the high-resolution time/callout interface */
hrt_init();
/* configure the DMA allocator */
dma_alloc_init();
/* configure CPU load estimation */
#ifdef CONFIG_SCHED_INSTRUMENTATION
cpuload_initialize_once();
#endif
/* set up the serial DMA polling */
static struct hrt_call serial_dma_call;
struct timespec ts;
/*
* Poll at 1ms intervals for received bytes that have not triggered
* a DMA event.
*/
ts.tv_sec = 0;
ts.tv_nsec = 1000000;
hrt_call_every(&serial_dma_call,
ts_to_abstime(&ts),
ts_to_abstime(&ts),
(hrt_callout)stm32_serial_dma_poll,
NULL);
/* initial LED state */
drv_led_start();
led_off(LED_AMBER);
led_off(LED_BLUE);
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
up_ledon(LED_AMBER);
return -ENODEV;
}
/* Default SPI1 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi1, 10000000);
SPI_SETBITS(spi1, 8);
SPI_SETMODE(spi1, SPIDEV_MODE3);
SPI_SELECT(spi1, PX4_SPIDEV_MPU, false);
up_udelay(20);
return OK;
}
int
SPI::_transfer(uint8_t *send, uint8_t *recv, unsigned len)
{
SPI_SETFREQUENCY(_dev, _frequency);
SPI_SETMODE(_dev, _mode);
SPI_SETBITS(_dev, 8);
SPI_SELECT(_dev, _device, true);
/* do the transfer */
SPI_EXCHANGE(_dev, send, recv, len);
/* and clean up */
SPI_SELECT(_dev, _device, false);
return OK;
}
void cc1101_access_begin(struct cc1101_dev_s * dev)
{
(void)SPI_LOCK(dev->spi, true);
SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
SPI_SETMODE(dev->spi, SPIDEV_MODE0); /* CPOL=0, CPHA=0 */
SPI_SETBITS(dev->spi, 8);
}
static void
ramtron_attach(void)
{
/* find the right spi */
struct spi_dev_s *spi = up_spiinitialize(2);
/* this resets the spi bus, set correct bus speed again */
// xxx set in ramtron driver, leave this out
// SPI_SETFREQUENCY(spi, 4000000);
SPI_SETFREQUENCY(spi, 375000000);
SPI_SETBITS(spi, 8);
SPI_SETMODE(spi, SPIDEV_MODE3);
SPI_SELECT(spi, SPIDEV_FLASH, false);
if (spi == NULL)
errx(1, "failed to locate spi bus");
/* start the MTD driver, attempt 5 times */
for (int i = 0; i < 5; i++) {
ramtron_mtd = ramtron_initialize(spi);
if (ramtron_mtd) {
/* abort on first valid result */
if (i > 0) {
warnx("warning: ramtron needed %d attempts to attach", i+1);
}
break;
}
}
/* if last attempt is still unsuccessful, abort */
if (ramtron_mtd == NULL)
errx(1, "failed to initialize ramtron driver");
attached = true;
}
static void spi_write(int port, int addr, int frequency, int bits, int conf, char value)
{
unsigned char buf[2];
buf[0] = addr;
buf[1] = value;
SPI_LOCK(spi_dev, true);
SPI_SETFREQUENCY(spi_dev, frequency);
SPI_SETBITS(spi_dev, bits);
SPI_SETMODE(spi_dev, conf);
SPI_SELECT(spi_dev, port, true);
SPI_SNDBLOCK(spi_dev, buf, 2);
SPI_SELECT(spi_dev, port, false);
SPI_LOCK(spi_dev, false);
}
static uint8_t
read_reg(uint8_t address)
{
uint8_t cmd[2] = {address | DIR_READ, 0};
uint8_t data[2];
/* The commented lines don't seem to work since
* lis331_dev.spi_id is not set. the changed variant
* is a hack, but will have to be re-added once we merge
* with the new code XXX TODO
*/
// SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, true);
SPI_EXCHANGE(lis331_dev.spi, cmd, data, sizeof(cmd));
SPI_SELECT(lis331_dev.spi, PX4_SPIDEV_ACCEL, false);
// SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
return data[1];
}
static void ssd1351_deselect(FAR struct ssd1351_dev_s *priv)
{
FAR struct spi_dev_s *spi = priv->spi;
/* De-select the chip and relinquish the SPI bus */
gdbg("DE-SELECTED\n");
SPI_SELECT(spi, SPIDEV_DISPLAY, false);
SPI_LOCK(spi, false);
}
static char spi_read(int port, int addr, int frequency, int bits, int conf)
{
unsigned char buf[2];
buf[0] = addr | 0x80;
SPI_LOCK(spi_dev, true);
SPI_SETFREQUENCY(spi_dev, frequency);
SPI_SETBITS(spi_dev, bits);
SPI_SETMODE(spi_dev, conf);
SPI_SELECT(spi_dev, port, true);
SPI_RECVBLOCK(spi_dev, buf, 2);
SPI_SELECT(spi_dev, port, false);
SPI_LOCK(spi_dev, false);
return buf[1];
}
static void nrf24l01_lock(FAR struct spi_dev_s *spi)
{
/* Lock the SPI bus because there are multiple devices competing for the
* SPI bus
*/
(void)SPI_LOCK(spi, true);
/* We have the lock. Now make sure that the SPI bus is configured for the
* NRF24L01 (it might have gotten configured for a different device while
* unlocked)
*/
SPI_SELECT(spi, SPIDEV_WIRELESS, true);
SPI_SETMODE(spi, SPIDEV_MODE0);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, NRF24L01_SPIFREQ);
SPI_SELECT(spi, SPIDEV_WIRELESS, false);
}
static void ads7843e_lock(FAR struct spi_dev_s *spi)
{
/* Lock the SPI bus because there are multiple devices competing for the
* SPI bus
*/
(void)SPI_LOCK(spi, true);
/* We have the lock. Now make sure that the SPI bus is configured for the
* ADS7843 (it might have gotten configured for a different device while
* unlocked)
*/
SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, true);
SPI_SETMODE(spi, CONFIG_ADS7843E_SPIMODE);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_ADS7843E_FREQUENCY);
SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, false);
}
