static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size)
{
u64 mc_dpc_offset;
#ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
int error;
void *dpc_fdt_hdr;
int dpc_size;
#endif
#ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
#else
#error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
#endif
/*
* Load the MC DPC blob in the MC private DRAM block:
*/
#ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
#else
/*
* Get address and size of the DPC blob stored in flash:
*/
#ifdef CONFIG_SYS_LS_MC_DPC_IN_NOR
dpc_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPC_ADDR;
#else
#error "No CONFIG_SYS_LS_MC_DPC_IN_xxx defined"
#endif
error = fdt_check_header(dpc_fdt_hdr);
if (error != 0) {
/*
* Don't return with error here, since the MC firmware can
* still boot without a DPC
*/
printf("\nfsl-mc: WARNING: No DPC image found");
return 0;
}
dpc_size = fdt_totalsize(dpc_fdt_hdr);
if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
dpc_size);
return -EINVAL;
}
mc_copy_image("MC DPC blob",
(u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
#endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
return -EINVAL;
dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
return 0;
}
static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size)
{
u64 mc_dpl_offset;
#ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
int error;
void *dpl_fdt_hdr;
int dpl_size;
#endif
#ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
#else
#error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
#endif
/*
* Load the MC DPL blob in the MC private DRAM block:
*/
#ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
#else
/*
* Get address and size of the DPL blob stored in flash:
*/
#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
#else
#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
#endif
error = fdt_check_header(dpl_fdt_hdr);
if (error != 0) {
printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
return error;
}
dpl_size = fdt_totalsize(dpl_fdt_hdr);
if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
dpl_size);
return -EINVAL;
}
mc_copy_image("MC DPL blob",
(u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
#endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
return 0;
}
int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
{
int error = 0;
int portal_id = 0;
struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
u64 mc_ram_addr = mc_get_dram_addr();
u32 reg_gsr;
u32 reg_mcfbalr;
#ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
const void *raw_image_addr;
size_t raw_image_size = 0;
#endif
struct mc_version mc_ver_info;
u64 mc_ram_aligned_base_addr;
u8 mc_ram_num_256mb_blocks;
size_t mc_ram_size = mc_get_dram_block_size();
error = calculate_mc_private_ram_params(mc_ram_addr,
mc_ram_size,
&mc_ram_aligned_base_addr,
&mc_ram_num_256mb_blocks);
if (error != 0)
goto out;
/*
* Management Complex cores should be held at reset out of POR.
* U-boot should be the first software to touch MC. To be safe,
* we reset all cores again by setting GCR1 to 0. It doesn't do
* anything if they are held at reset. After we setup the firmware
* we kick off MC by deasserting the reset bit for core 0, and
* deasserting the reset bits for Command Portal Managers.
* The stop bits are not touched here. They are used to stop the
* cores when they are active. Setting stop bits doesn't stop the
* cores from fetching instructions when they are released from
* reset.
*/
out_le32(&mc_ccsr_regs->reg_gcr1, 0);
dmb();
#ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
#else
error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
&raw_image_size);
if (error != 0)
goto out;
/*
* Load the MC FW at the beginning of the MC private DRAM block:
*/
mc_copy_image("MC Firmware",
(u64)raw_image_addr, raw_image_size, mc_ram_addr);
#endif
dump_ram_words("firmware", (void *)mc_ram_addr);
error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
if (error != 0)
goto out;
debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
dump_mc_ccsr_regs(mc_ccsr_regs);
/*
* Tell MC what is the address range of the DRAM block assigned to it:
*/
reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
(mc_ram_num_256mb_blocks - 1);
out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
out_le32(&mc_ccsr_regs->reg_mcfbahr,
(u32)(mc_ram_aligned_base_addr >> 32));
out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
/*
* Tell the MC that we want delayed DPL deployment.
*/
out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
printf("\nfsl-mc: Booting Management Complex ... ");
/*
* Deassert reset and release MC core 0 to run
*/
out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
error = wait_for_mc(true, ®_gsr);
if (error != 0)
goto out;
/*
* TODO: need to obtain the portal_id for the root container from the
* DPL
*/
portal_id = 0;
/*
* Initialize the global default MC portal
* And check that the MC firmware is responding portal commands:
*/
root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
if (!root_mc_io) {
printf(" No memory: malloc() failed\n");
return -ENOMEM;
}
root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
portal_id, root_mc_io->mmio_regs);
error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
if (error != 0) {
printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
error);
goto out;
}
if (MC_VER_MAJOR != mc_ver_info.major) {
printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
mc_ver_info.major, MC_VER_MAJOR);
printf("fsl-mc: Update the Management Complex firmware\n");
error = -ENODEV;
goto out;
}
if (MC_VER_MINOR != mc_ver_info.minor)
printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
mc_ver_info.minor, MC_VER_MINOR);
printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
reg_gsr & GSR_FS_MASK);
out:
if (error != 0)
mc_boot_status = error;
else
mc_boot_status = 0;
return error;
}
