コード例 #1
0
ファイル: console.c プロジェクト: MinimumLaw/ravion-barebox
void console_putc(unsigned int ch, char c)
{
	if (__putc)
		__putc(putc_ctx, c);
	else
		putc_ll(c);
}
コード例 #2
0
ファイル: lowlevel.c プロジェクト: bmourit/barebox
/**
 * @brief The basic entry point for board initialization.
 *
 * This is called as part of machine init (after arch init).
 * This is again called with stack in SRAM, so not too many
 * constructs possible here.
 *
 * @return void
 */
static noinline void pcm051_board_init(void)
{
	unsigned long sdram = 0x80000000, fdt;

	/* WDT1 is already running when the bootloader gets control
	 * Disable it to avoid "random" resets
	 */
	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);

	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);

	am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);

	am335x_sdram_init(0x18B, &MT41J256M8HX15E_2x256M8_cmd,
			&MT41J256M8HX15E_2x256M8_regs,
			&MT41J256M8HX15E_2x256M8_data);

	am33xx_uart0_soft_reset();
	am33xx_enable_uart0_pin_mux();
	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
	putc_ll('>');

	/*
	 * Copy the devicetree blob to sdram so that the barebox code finds it
	 * inside valid SDRAM instead of SRAM.
	 */
	memcpy((void *)sdram, __dtb_am335x_phytec_phycore_start,
			__dtb_am335x_phytec_phycore_end -
			__dtb_am335x_phytec_phycore_start);
	fdt = sdram;

	barebox_arm_entry(sdram, SZ_512M, fdt);
}
コード例 #3
0
ファイル: console.c プロジェクト: bluecmd/barebox
void console_putc(unsigned int ch, char c)
{
	struct console_device *cdev;
	int init = initialized;

	switch (init) {
	case CONSOLE_UNINITIALIZED:
		console_init_early();
		/* fall through */

	case CONSOLE_INITIALIZED_BUFFER:
		kfifo_putc(console_output_fifo, c);
		putc_ll(c);
		return;

	case CONSOLE_INIT_FULL:
		for_each_console(cdev) {
			if (cdev->f_active & ch) {
				if (c == '\n')
					cdev->putc(cdev, '\r');
				cdev->putc(cdev, c);
			}
		}
		return;
	default:
		/* If we have problems inititalizing our data
		 * get them early
		 */
		hang();
	}
}
コード例 #4
0
ファイル: lowlevel.c プロジェクト: AshishNamdev/barebox
static inline void setup_uart(void)
{
	void __iomem *ccmbase = (void *)MX6_CCM_BASE_ADDR;
	void __iomem *uartbase = (void *)MX6_UART4_BASE_ADDR;
	void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;

	writel(0x4, iomuxbase + 0x01f8);

	writel(0xffffffff, ccmbase + 0x68);
	writel(0xffffffff, ccmbase + 0x6c);
	writel(0xffffffff, ccmbase + 0x70);
	writel(0xffffffff, ccmbase + 0x74);
	writel(0xffffffff, ccmbase + 0x78);
	writel(0xffffffff, ccmbase + 0x7c);
	writel(0xffffffff, ccmbase + 0x80);

	writel(0x00000000, uartbase + 0x80);
	writel(0x00004027, uartbase + 0x84);
	writel(0x00000704, uartbase + 0x88);
	writel(0x00000a81, uartbase + 0x90);
	writel(0x0000002b, uartbase + 0x9c);
	writel(0x00013880, uartbase + 0xb0);
	writel(0x0000047f, uartbase + 0xa4);
	writel(0x0000c34f, uartbase + 0xa8);
	writel(0x00000001, uartbase + 0x80);

	putc_ll('>');
}
コード例 #5
0
ファイル: lowlevel.c プロジェクト: cherojeong/barebox
/**
 * @brief The basic entry point for board initialization.
 *
 * This is called as part of machine init (after arch init).
 * This is again called with stack in SRAM, so not too many
 * constructs possible here.
 *
 * @return void
 */
static noinline int gf_sram_init(void)
{
	void *fdt;

	fdt = __dtb_z_am335x_afi_gf_start;

	/* WDT1 is already running when the bootloader gets control
	 * Disable it to avoid "random" resets
	 */
	__raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
	while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
	__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
	while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);

	/* Setup the PLLs and the clocks for the peripherals */
	am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_200);

	board_config_ddr();

	/*
	 * FIXME configure CAN pinmux early to avoid driving the bus
	 * with the low by default pins.
	 */
	configure_module_pin_mux(board_can_pin_mux);

	am33xx_uart_soft_reset((void *)AM33XX_UART2_BASE);
	am33xx_enable_uart2_pin_mux();
	omap_uart_lowlevel_init((void *)AM33XX_UART2_BASE);
	putc_ll('>');

	barebox_arm_entry(0x80000000, SZ_256M, fdt);
}
コード例 #6
0
ファイル: lowlevel.c プロジェクト: cloud-hot/barebox
/**
 * @brief The basic entry point for board initialization.
 *
 * This is called as part of machine init (after arch init).
 * This is again called with stack in SRAM, so not too many
 * constructs possible here.
 *
 * @return void
 */
static noinline void pcm051_board_init(void)
{
	void *fdt;

	/* WDT1 is already running when the bootloader gets control
	 * Disable it to avoid "random" resets
	 */
	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);

	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);

	am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);

	am335x_sdram_init(0x18B, &MT41J256M8HX15E_2x256M8_cmd,
			&MT41J256M8HX15E_2x256M8_regs,
			&MT41J256M8HX15E_2x256M8_data);

	am33xx_uart0_soft_reset();
	am33xx_enable_uart0_pin_mux();
	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
	putc_ll('>');

	fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset();

	barebox_arm_entry(0x80000000, SZ_512M, fdt);
}
コード例 #7
0
ファイル: lowlevel.c プロジェクト: woodsts/barebox
static inline void setup_uart(void)
{
	void __iomem *iomux = IOMEM(VF610_IOMUXC_BASE_ADDR);

	vf610_ungate_all_peripherals();
	vf610_setup_pad(iomux, VF610_PAD_PTB10__UART0_TX);
	vf610_uart_setup_ll();

	putc_ll('>');
}
コード例 #8
0
ファイル: lowlevel.c プロジェクト: cherojeong/barebox
ENTRY_FUNCTION(start_am33xx_afi_gf_sdram, r0, r1, r2)
{
	void *fdt;

	fdt = __dtb_z_am335x_afi_gf_start - get_runtime_offset();

	putc_ll('>');

	barebox_arm_entry(0x80000000, SZ_256M, fdt);
}
コード例 #9
0
ファイル: lowlevel.c プロジェクト: cherojeong/barebox
static inline void setup_uart(void)
{
	void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;

	writel(0x4, iomuxbase + 0x01f8);

	imx6_ungate_all_peripherals();
	imx6_uart_setup_ll();

	putc_ll('>');
}
コード例 #10
0
ファイル: lowlevel.c プロジェクト: MinimumLaw/ravion-barebox
static void __noreturn start_imx53_tqma53_common(void *fdt)
{
	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
		writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
		writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
		setup_uart((void *)MX53_UART2_BASE_ADDR);
		putc_ll('>');
	}

	imx53_barebox_entry(fdt);
}
コード例 #11
0
ファイル: lowlevel.c プロジェクト: ch-f/barebox
static inline void early_uart_init(void)
{
	writel(0x00000000, MX6_UART1_BASE_ADDR + 0x80);
	writel(0x00004027, MX6_UART1_BASE_ADDR + 0x84);
	writel(0x00000704, MX6_UART1_BASE_ADDR + 0x88);
	writel(0x00000a81, MX6_UART1_BASE_ADDR + 0x90);
	writel(0x0000002b, MX6_UART1_BASE_ADDR + 0x9c);
	writel(0x00013880, MX6_UART1_BASE_ADDR + 0xb0);
	writel(0x0000047f, MX6_UART1_BASE_ADDR + 0xa4);
	writel(0x0000c34f, MX6_UART1_BASE_ADDR + 0xa8);
	writel(0x00000001, MX6_UART1_BASE_ADDR + 0x80);

	putc_ll('>');
}
コード例 #12
0
ファイル: lowlevel.c プロジェクト: MinimumLaw/ravion-barebox
ENTRY_FUNCTION(start_imx6s_riotboard, r0, r1, r2)
{
	void *fdt;

	imx6_cpu_lowlevel_init();

	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
		writel(0x4, 0x020e016c);
		imx6_uart_setup_ll();
		putc_ll('a');
	}

	fdt = __dtb_imx6s_riotboard_start + get_runtime_offset();
	barebox_arm_entry(0x10000000, SZ_1G, fdt);
}
コード例 #13
0
ファイル: lowlevel.c プロジェクト: MinimumLaw/ravion-barebox
static inline void setup_uart(void)
{
	void __iomem *iomux = IOMEM(MX7_IOMUXC_BASE_ADDR);
	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);

	writel(CCM_CCGR_SETTINGn_NEEDED(0),
	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART2));
	writel(CCM_TARGET_ROOTn_ENABLE | UART2_CLK_ROOT__OSC_24M,
	       ccm + CCM_TARGET_ROOTn(UART2_CLK_ROOT));
	writel(CCM_CCGR_SETTINGn_NEEDED(0),
	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART2));

	mx7_setup_pad(iomux, MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX);

	imx7_uart_setup_ll();

	putc_ll('>');
}
コード例 #14
0
ファイル: lowlevel.c プロジェクト: vkleen/barebox-novena
static inline void setup_uart(void)
{
    void __iomem *uartbase = (void *)MX6_UART2_BASE_ADDR;
    void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;

    writel(0x1, iomuxbase + 0x2b0);

    writel(0x00000000, uartbase + 0x80);
    writel(0x00004027, uartbase + 0x84);
    writel(0x00000704, uartbase + 0x88);
    writel(0x00000a81, uartbase + 0x90);
    writel(0x0000002b, uartbase + 0x9c);
    writel(0x00013880, uartbase + 0xb0);
    writel(0x0000047f, uartbase + 0xa4);
    writel(0x0000c34f, uartbase + 0xa8);
    writel(0x00000001, uartbase + 0x80);

    putc_ll('>');
}
コード例 #15
0
ファイル: lowlevel.c プロジェクト: cherojeong/barebox
ENTRY_FUNCTION(start_imx6dl_mba6x, r0, r1, r2)
{
	void *fdt;

	imx6_cpu_lowlevel_init();

	arm_setup_stack(0x00920000 - 8);

	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
		writel(0x2, 0x020e035c);
		imx6_uart_setup_ll();
		putc_ll('a');
	}

	arm_early_mmu_cache_invalidate();

	fdt = __dtb_imx6dl_mba6x_start - get_runtime_offset();

	barebox_arm_entry(0x10000000, SZ_512M, fdt);
}
コード例 #16
0
ファイル: lowlevel.c プロジェクト: AshishNamdev/barebox
ENTRY_FUNCTION(start_imx6dl_mba6x)(void)
{
	uint32_t fdt;

	__barebox_arm_head();

	arm_cpu_lowlevel_init();

	arm_setup_stack(0x00920000 - 8);

	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
		writel(0x2, 0x020e035c);
		setup_uart();
		putc_ll('a');
	}

	arm_early_mmu_cache_invalidate();

	fdt = (uint32_t)__dtb_imx6dl_mba6x_start - get_runtime_offset();

	barebox_arm_entry(0x10000000, SZ_512M, fdt);
}
コード例 #17
0
ファイル: lowlevel.c プロジェクト: ch-f/barebox
static void sdram_init(void)
{
	writel(0x0, 0x021b0000);
	writel(0xffffffff, 0x020c4068);
	writel(0xffffffff, 0x020c406c);
	writel(0xffffffff, 0x020c4070);
	writel(0xffffffff, 0x020c4074);
	writel(0xffffffff, 0x020c4078);
	writel(0xffffffff, 0x020c407c);
	writel(0xffffffff, 0x020c4080);
	writel(0xffffffff, 0x020c4084);
	writel(0x000C0000, 0x020e0798);
	writel(0x00000000, 0x020e0758);
	writel(0x00000030, 0x020e0588);
	writel(0x00000030, 0x020e0594);
	writel(0x00000030, 0x020e056c);
	writel(0x00000030, 0x020e0578);
	writel(0x00000030, 0x020e074c);
	writel(0x00000030, 0x020e057c);
	writel(0x00000000, 0x020e058c);
	writel(0x00000030, 0x020e059c);
	writel(0x00000030, 0x020e05a0);
	writel(0x00000030, 0x020e078c);
	writel(0x00020000, 0x020e0750);
	writel(0x00000038, 0x020e05a8);
	writel(0x00000038, 0x020e05b0);
	writel(0x00000038, 0x020e0524);
	writel(0x00000038, 0x020e051c);
	writel(0x00000038, 0x020e0518);
	writel(0x00000038, 0x020e050c);
	writel(0x00000038, 0x020e05b8);
	writel(0x00000038, 0x020e05c0);
	writel(0x00020000, 0x020e0774);
	writel(0x00000030, 0x020e0784);
	writel(0x00000030, 0x020e0788);
	writel(0x00000030, 0x020e0794);
	writel(0x00000030, 0x020e079c);
	writel(0x00000030, 0x020e07a0);
	writel(0x00000030, 0x020e07a4);
	writel(0x00000030, 0x020e07a8);
	writel(0x00000030, 0x020e0748);
	writel(0x00000030, 0x020e05ac);
	writel(0x00000030, 0x020e05b4);
	writel(0x00000030, 0x020e0528);
	writel(0x00000030, 0x020e0520);
	writel(0x00000030, 0x020e0514);
	writel(0x00000030, 0x020e0510);
	writel(0x00000030, 0x020e05bc);
	writel(0x00000030, 0x020e05c4);
	writel(0xa1390003, 0x021b0800);
	writel(0x0059005C, 0x021b080c);
	writel(0x00590056, 0x021b0810);
	writel(0x002E0049, 0x021b480c);
	writel(0x001B0033, 0x021b4810);
	writel(0x434F035B, 0x021b083c);
	writel(0x033F033F, 0x021b0840);
	writel(0x4337033D, 0x021b483c);
	writel(0x03210275, 0x021b4840);
	writel(0x4C454344, 0x021b0848);
	writel(0x463F3E4A, 0x021b4848);
	writel(0x46314742, 0x021b0850);
	writel(0x4D2A4B39, 0x021b4850);
	writel(0x33333333, 0x021b081c);
	writel(0x33333333, 0x021b0820);
	writel(0x33333333, 0x021b0824);
	writel(0x33333333, 0x021b0828);
	writel(0x33333333, 0x021b481c);
	writel(0x33333333, 0x021b4820);
	writel(0x33333333, 0x021b4824);
	writel(0x33333333, 0x021b4828);
	writel(0x00000800, 0x021b08b8);
	writel(0x00000800, 0x021b48b8);
	writel(0x00020036, 0x021b0004);
	writel(0x09555050, 0x021b0008);
	writel(0x8A8F7934, 0x021b000c);
	writel(0xDB568E65, 0x021b0010);
	writel(0x01FF00DB, 0x021b0014);
	writel(0x00011740, 0x021b0018);
	writel(0x00008000, 0x021b001c);
	writel(0x000026d2, 0x021b002c);
	writel(0x008F0E21, 0x021b0030);
	writel(0x0000007f, 0x021b0040);
	writel(0x114201f0, 0x021b0400);
	writel(0x11420000, 0x021b4400);
	writel(0x841A0000, 0x021b0000);
	writel(0x04108032, 0x021b001c);
	writel(0x00028033, 0x021b001c);
	writel(0x00048031, 0x021b001c);
	writel(0x09308030, 0x021b001c);
	writel(0x04008040, 0x021b001c);
	writel(0x00005800, 0x021b0020);
	writel(0x00011117, 0x021b0818);
	writel(0x00011117, 0x021b4818);
	writel(0x00025576, 0x021b0004);
	writel(0x00011006, 0x021b0404);
	writel(0x00000000, 0x021b001c);

	/* Enable UART for lowlevel debugging purposes. Can be removed later */
	writel(0x4, 0x020e00bc);
	writel(0x4, 0x020e00c0);
	writel(0x1, 0x020e0928);
	writel(0x00000000, 0x021e8080);
	writel(0x00004027, 0x021e8084);
	writel(0x00000704, 0x021e8088);
	writel(0x00000a81, 0x021e8090);
	writel(0x0000002b, 0x021e809c);
	writel(0x00013880, 0x021e80b0);
	writel(0x0000047f, 0x021e80a4);
	writel(0x0000c34f, 0x021e80a8);
	writel(0x00000001, 0x021e8080);
	putc_ll('>');
}