void dram_4mbit_test () { unregister_all_tests(); register_test(&test_dram_4mbit_init, "Init check"); register_test(&test_dram_4mbit_range, "4MB range check"); do_tests("DRAM 4MB tests", 0, 0); }
_test_suite::~_test_suite(void) { TRACE_ENTRY(); unregister_all_tests(); TRACE_EXIT(); }
void scsp_misc_test() { scsp_minimal_init(); unregister_all_tests(); register_test(&scsp_int_on_timer_enable_test, "Int on Timer enable behaviour"); register_test(&scsp_int_on_timer_reset_test, "Int on Timer reset behaviour"); register_test(&scsp_int_dup_test, "No second Int after Timer done"); // register_test(&scsp_mcipd_test, "MCIPD bit cleared after Timer Int"); register_test(&scsp_scipd_test, "Timers start after SCIRE write"); register_test(&scsp_scipd_test, "Timers start after MCIRE write"); // DMA tests here // MSLC/CA tests here do_tests("SCSP Interrupt tests", 0, 0); }
_test_suite & _test_suite::operator=( __in const _test_suite &other ) { TRACE_ENTRY(); SERIALIZE_CALL_RECURSIVE(m_test_suite_lock); if(this != &other) { unregister_all_tests(); m_run_count = other.m_run_count; m_test_map = other.m_test_map; } TRACE_EXIT(); return *this; }
void scsp_slot_test() { scsp_minimal_init(); unregister_all_tests(); register_test(&scu_interrupt_test, "Key On/Off"); register_test(&scsp_timer_a_test, "8/16-bit/Noise samples"); register_test(&scsp_timer_a_test, "Source bit"); register_test(&scsp_timer_a_test, "Looping"); register_test(&scsp_timer_a_test, "Octaves"); // not sure I can easily test this register_test(&scsp_timer_a_test, "Attack rate"); // not sure I can easily test this register_test(&scsp_timer_a_test, "Decay rate"); // not sure I can easily test this register_test(&scsp_timer_a_test, "Decay level"); // not sure I can easily test this register_test(&scsp_timer_a_test, "Release rate"); // not sure I can easily test this register_test(&scsp_timer_a_test, "Total level"); // modulation test here // LFO tests here // direct pan/sdl tests here do_tests("SCSP Timer tests", 0, 0); }
void scsp_timing_test() { scsp_minimal_init(); unregister_all_tests(); register_test(&scu_interrupt_test, "Sound Request Interrupt"); register_test(&scsp_timer_a_test, "Timer A"); register_test(&scsp_timer_b_test, "Timer B"); register_test(&scsp_timer_c_test, "Timer C"); /* register_test(&ScspTimerTimingTest0, "Timer timing w/1 sample inc"); register_test(&ScspTimerTimingTest1, "Timer timing w/2 sample inc"); register_test(&ScspTimerTimingTest2, "Timer timing w/4 sample inc"); register_test(&ScspTimerTimingTest3, "Timer timing w/8 sample inc"); register_test(&ScspTimerTimingTest4, "Timer timing w/16 sample inc"); register_test(&ScspTimerTimingTest5, "Timer timing w/32 sample inc"); register_test(&ScspTimerTimingTest6, "Timer timing w/64 sample inc"); register_test(&ScspTimerTimingTest7, "Timer timing w/128 sample inc"); */ do_tests("SCSP Timer tests", 0, 0); }
void sh2_test() { interrupt_set_level_mask(0xF); init_iapetus(RES_320x224); // Setup a screen for us draw on vdp_rbg0_init(&test_disp_settings); vdp_set_default_palette(); // Display On vdp_disp_on(); unregister_all_tests(); register_test(&div_mirror_test, "DIV register access"); register_test(&div_operation_test, "DIV operations"); register_test(&div_interrupt_test, "DIV overflow interrupt"); do_tests("SH2 tests", 0, 0); // Other tests to do: instruction tests, check all register accesses, // onchip functions }