BufferOffset Assembler::Logical(const Register& rd, const Register& rn,
const Operand& operand, LogicalOp op)
{
VIXL_ASSERT(rd.size() == rn.size());
if (operand.IsImmediate()) {
int64_t immediate = operand.immediate();
unsigned reg_size = rd.size();
VIXL_ASSERT(immediate != 0);
VIXL_ASSERT(immediate != -1);
VIXL_ASSERT(rd.Is64Bits() || is_uint32(immediate));
// If the operation is NOT, invert the operation and immediate.
if ((op & NOT) == NOT) {
op = static_cast<LogicalOp>(op & ~NOT);
immediate = rd.Is64Bits() ? ~immediate : (~immediate & kWRegMask);
}
unsigned n, imm_s, imm_r;
if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
// Immediate can be encoded in the instruction.
return LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
} else {
// This case is handled in the macro assembler.
VIXL_UNREACHABLE();
}
} else {
VIXL_ASSERT(operand.IsShiftedRegister());
VIXL_ASSERT(operand.reg().size() == rd.size());
Instr dp_op = static_cast<Instr>(op | LogicalShiftedFixed);
return DataProcShiftedRegister(rd, rn, operand, LeaveFlags, dp_op);
}
}
void Internal8085::MCellChanged(QString str){
str = str.toUpper().rightJustified(2, QLatin1Char('0'));
int address = (H.toInt() << 8) + L.toInt();
if(address >= lowAddressLimit && address < upAddressLimit){
Register *MCell = &cells[address - lowAddressLimit];
bool ok;
uint64_t val = str.toLongLong(&ok, 16);
for(int i = 0;i < MCell->size();++i){
MCell->setBit(i,(val&(1LL<<(MCell->size() - i - 1))));
}
}
}
BufferOffset Assembler::LogicalImmediate(const Register& rd, const Register& rn,
unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op)
{
unsigned reg_size = rd.size();
Instr dest_reg = (op == ANDS) ? Rd(rd) : RdSP(rd);
return Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) |
ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg | Rn(rn));
}
void Debugger::PrintRegister(const Register& target_reg,
const char* name,
const FormatToken* format) {
const uint64_t reg_size = target_reg.size();
const uint64_t format_size = format->SizeOf() * 8;
const uint64_t count = reg_size / format_size;
const uint64_t mask = 0xffffffffffffffff >> (64 - format_size);
const uint64_t reg_value = reg<uint64_t>(target_reg.code(),
Reg31IsStackPointer);
VIXL_ASSERT(count > 0);
printf("%s = ", name);
for (uint64_t i = 1; i <= count; i++) {
uint64_t data = reg_value >> (reg_size - (i * format_size));
data &= mask;
format->PrintData(&data);
printf(" ");
}
printf("\n");
}
