bool beathead_state::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
{
UINT8 *videoram = reinterpret_cast<UINT8 *>(m_videoram);
int x, y;
/* generate the final screen */
for (y = cliprect.min_y; y <= cliprect.max_y; y++)
{
pen_t pen_base = (*m_palette_select & 0x7f) * 256;
UINT16 scanline[336];
/* blanking */
if (m_finescroll & 8)
for (x = cliprect.min_x; x <= cliprect.max_x; x++)
scanline[x] = pen_base;
/* non-blanking */
else
{
offs_t scanline_offset = m_vram_latch_offset + (m_finescroll & 3);
offs_t src = scanline_offset + cliprect.min_x;
/* unswizzle the scanline first */
for (x = cliprect.min_x; x <= cliprect.max_x; x++)
scanline[x] = pen_base | videoram[BYTE4_XOR_LE(src++)];
}
/* then draw it */
draw_scanline16(&bitmap, cliprect.min_x, y, cliprect.max_x - cliprect.min_x + 1, &scanline[cliprect.min_x], NULL);
}
return 0;
}
v60_device::v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 24, 0)
, m_fetch_xor(BYTE4_XOR_LE(0))
, m_start_pc(0xfffffff0)
{
// Set m_PIR (Processor ID) for NEC v70. LSB is reserved to NEC,
// so I don't know what it contains.
m_reg[45] = 0x00007000;
}
static OPBASE_HANDLER( psx_setopbase )
{
if( address == 0x80030000 )
{
UINT8 *p_ram;
UINT8 *p_psxexe;
UINT32 n_stack;
UINT32 n_ram;
UINT32 n_left;
UINT32 n_address;
logerror( "psx_exe_load: pc %08x\n", m_psxexe_header.pc0 );
logerror( "psx_exe_load: org %08x\n", m_psxexe_header.t_addr );
logerror( "psx_exe_load: len %08x\n", m_psxexe_header.t_size );
logerror( "psx_exe_load: sp %08x\n", m_psxexe_header.s_addr );
logerror( "psx_exe_load: len %08x\n", m_psxexe_header.s_size );
p_ram = (UINT8 *)g_p_n_psxram;
n_ram = g_n_psxramsize;
p_psxexe = m_p_psxexe;
n_address = m_psxexe_header.t_addr;
n_left = m_psxexe_header.t_size;
while( n_left != 0 )
{
p_ram[ BYTE4_XOR_LE( n_address ) % n_ram ] = *( p_psxexe );
n_address++;
p_psxexe++;
n_left--;
}
free( m_p_psxexe );
activecpu_set_reg( MIPS_PC, m_psxexe_header.pc0 );
activecpu_set_reg( MIPS_R28, m_psxexe_header.gp0 );
n_stack = m_psxexe_header.s_addr + m_psxexe_header.s_size;
if( n_stack != 0 )
{
activecpu_set_reg( MIPS_R29, n_stack );
activecpu_set_reg( MIPS_R30, n_stack );
}
memory_set_opbase_handler( 0, NULL );
mips_stop();
return ~0;
}
return address;
}
static int load_psxexe( device_t *cpu, unsigned char *p_n_file, int n_len )
{
psx_state *state = cpu->machine().driver_data<psx_state>();
struct PSXEXE_HEADER
{
UINT8 id[ 8 ];
UINT32 text; /* SCE only */
UINT32 data; /* SCE only */
UINT32 pc0;
UINT32 gp0; /* SCE only */
UINT32 t_addr;
UINT32 t_size;
UINT32 d_addr; /* SCE only */
UINT32 d_size; /* SCE only */
UINT32 b_addr; /* SCE only */
UINT32 b_size; /* SCE only */
UINT32 s_addr;
UINT32 s_size;
UINT32 SavedSP;
UINT32 SavedFP;
UINT32 SavedGP;
UINT32 SavedRA;
UINT32 SavedS0;
UINT8 dummy[ 0x800 - 76 ];
};
struct PSXEXE_HEADER *psxexe_header = (struct PSXEXE_HEADER *)p_n_file;
if( n_len >= sizeof( struct PSXEXE_HEADER ) &&
memcmp( psxexe_header->id, "PS-X EXE", 8 ) == 0 )
{
UINT8 *p_ram;
UINT8 *p_psxexe;
UINT32 n_stack;
UINT32 n_ram;
UINT32 n_address;
UINT32 n_size;
psxexe_conv32( &psxexe_header->text );
psxexe_conv32( &psxexe_header->data );
psxexe_conv32( &psxexe_header->pc0 );
psxexe_conv32( &psxexe_header->gp0 );
psxexe_conv32( &psxexe_header->t_addr );
psxexe_conv32( &psxexe_header->t_size );
psxexe_conv32( &psxexe_header->d_addr );
psxexe_conv32( &psxexe_header->d_size );
psxexe_conv32( &psxexe_header->b_addr );
psxexe_conv32( &psxexe_header->b_size );
psxexe_conv32( &psxexe_header->s_addr );
psxexe_conv32( &psxexe_header->s_size );
psxexe_conv32( &psxexe_header->SavedSP );
psxexe_conv32( &psxexe_header->SavedFP );
psxexe_conv32( &psxexe_header->SavedGP );
psxexe_conv32( &psxexe_header->SavedRA );
psxexe_conv32( &psxexe_header->SavedS0 );
/* todo: check size.. */
logerror( "psx_exe_load: pc %08x\n", psxexe_header->pc0 );
logerror( "psx_exe_load: org %08x\n", psxexe_header->t_addr );
logerror( "psx_exe_load: len %08x\n", psxexe_header->t_size );
logerror( "psx_exe_load: sp %08x\n", psxexe_header->s_addr );
logerror( "psx_exe_load: len %08x\n", psxexe_header->s_size );
p_ram = (UINT8 *)state->m_p_n_psxram;
n_ram = state->m_n_psxramsize;
p_psxexe = p_n_file + sizeof( struct PSXEXE_HEADER );
n_address = psxexe_header->t_addr;
n_size = psxexe_header->t_size;
while( n_size != 0 )
{
p_ram[ BYTE4_XOR_LE( n_address ) % n_ram ] = *( p_psxexe );
n_address++;
p_psxexe++;
n_size--;
}
cpu_set_reg( cpu, PSXCPU_PC, psxexe_header->pc0 );
cpu_set_reg( cpu, PSXCPU_R28, psxexe_header->gp0 );
n_stack = psxexe_header->s_addr + psxexe_header->s_size;
if( n_stack != 0 )
{
cpu_set_reg( cpu, PSXCPU_R29, n_stack );
cpu_set_reg( cpu, PSXCPU_R30, n_stack );
}
return 1;
}
return 0;
}
static int load_cpe( device_t *cpu, unsigned char *p_n_file, int n_len )
{
psx_state *state = cpu->machine().driver_data<psx_state>();
if( n_len >= 4 &&
memcmp( p_n_file, "CPE\001", 4 ) == 0 )
{
int n_offset = 4;
for( ;; )
{
if( n_offset >= n_len || p_n_file[ n_offset ] > 8 )
{
break;
}
switch( p_n_file[ n_offset++ ] )
{
case 0:
/* end of file */
return 1;
case 1:
/* read bytes */
{
int n_address = ( (int)p_n_file[ n_offset + 0 ] << 0 ) |
( (int)p_n_file[ n_offset + 1 ] << 8 ) |
( (int)p_n_file[ n_offset + 2 ] << 16 ) |
( (int)p_n_file[ n_offset + 3 ] << 24 );
int n_size = ( (int)p_n_file[ n_offset + 4 ] << 0 ) |
( (int)p_n_file[ n_offset + 5 ] << 8 ) |
( (int)p_n_file[ n_offset + 6 ] << 16 ) |
( (int)p_n_file[ n_offset + 7 ] << 24 );
UINT8 *p_ram = (UINT8 *)state->m_p_n_psxram;
UINT32 n_ram = state->m_n_psxramsize;
n_offset += 8;
logerror( "psx_exe_load: org %08x\n", n_address );
logerror( "psx_exe_load: len %08x\n", n_size );
while( n_size > 0 )
{
p_ram[ BYTE4_XOR_LE( n_address ) % n_ram ] = p_n_file[ n_offset++ ];
n_address++;
n_size--;
}
break;
}
case 2:
/* run address: not tested */
{
int n_value = ( (int)p_n_file[ n_offset + 2 ] << 0 ) |
( (int)p_n_file[ n_offset + 3 ] << 8 ) |
( (int)p_n_file[ n_offset + 4 ] << 16 ) |
( (int)p_n_file[ n_offset + 5 ] << 24 );
n_offset += 4;
cpe_set_register( cpu, 0x90, n_value );
break;
}
case 3:
/* set reg to longword */
{
int n_reg = ( (int)p_n_file[ n_offset + 0 ] << 0 ) |
( (int)p_n_file[ n_offset + 1 ] << 8 );
int n_value = ( (int)p_n_file[ n_offset + 2 ] << 0 ) |
( (int)p_n_file[ n_offset + 3 ] << 8 ) |
( (int)p_n_file[ n_offset + 4 ] << 16 ) |
( (int)p_n_file[ n_offset + 5 ] << 24 );
n_offset += 6;
cpe_set_register( cpu, n_reg, n_value );
break;
}
case 4:
/* set reg to word: not tested */
{
int n_reg = ( (int)p_n_file[ n_offset + 0 ] << 0 ) |
( (int)p_n_file[ n_offset + 1 ] << 8 );
int n_value = ( (int)p_n_file[ n_offset + 2 ] << 0 ) |
( (int)p_n_file[ n_offset + 3 ] << 8 );
n_offset += 4;
cpe_set_register( cpu, n_reg, n_value );
break;
}
case 5:
/* set reg to byte: not tested */
{
int n_reg = ( (int)p_n_file[ n_offset + 0 ] << 0 ) |
( (int)p_n_file[ n_offset + 1 ] << 8 );
int n_value = ( (int)p_n_file[ n_offset + 2 ] << 0 );
n_offset += 3;
cpe_set_register( cpu, n_reg, n_value );
break;
}
case 6:
/* set reg to 3-byte: not tested */
{
int n_reg = ( (int)p_n_file[ n_offset + 0 ] << 0 ) |
( (int)p_n_file[ n_offset + 1 ] << 8 );
int n_value = ( (int)p_n_file[ n_offset + 2 ] << 0 ) |
( (int)p_n_file[ n_offset + 3 ] << 8 ) |
( (int)p_n_file[ n_offset + 4 ] << 16 );
n_offset += 5;
cpe_set_register( cpu, n_reg, n_value );
break;
}
case 7:
/* workspace: not tested */
n_offset += 4;
break;
case 8:
/* unit */
{
int n_unit = p_n_file[ n_offset + 0 ];
n_offset++;
logerror( "psx_exe_load: unit %08x\n", n_unit );
}
break;
}
}
}
return 0;
}
void memory_array::write8_to_32le(int index, UINT32 data) { reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_LE(index)] = data; }
UINT32 memory_array::read8_from_32le(int index) const { return reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_LE(index)]; }
offs_t activecpu_dasm(char *buffer, offs_t pc)
{
VERIFY_ACTIVECPU(activecpu_dasm);
/* allow overrides */
if (cpu_dasm_override)
{
offs_t result = cpu_dasm_override(activecpu, buffer, pc);
if (result)
return result;
}
/* if there's no old-style assembler, do some work to make this call work with the new one */
if (!cpu[activecpu].intf.disassemble)
{
int dbwidth = activecpu_databus_width(ADDRESS_SPACE_PROGRAM);
int maxbytes = activecpu_max_instruction_bytes();
int endianness = activecpu_endianness();
UINT8 opbuf[64], argbuf[64];
int xorval = 0;
int numbytes;
/* determine the XOR to get the bytes in order */
switch (dbwidth)
{
case 8: xorval = 0; break;
case 16: xorval = (endianness == CPU_IS_LE) ? BYTE_XOR_LE(0) : BYTE_XOR_BE(0); break;
case 32: xorval = (endianness == CPU_IS_LE) ? BYTE4_XOR_LE(0) : BYTE4_XOR_BE(0); break;
case 64: xorval = (endianness == CPU_IS_LE) ? BYTE8_XOR_LE(0) : BYTE8_XOR_BE(0); break;
}
/* fetch the bytes up to the maximum */
memset(opbuf, 0xff, sizeof(opbuf));
memset(argbuf, 0xff, sizeof(argbuf));
for (numbytes = 0; numbytes < maxbytes; numbytes++)
{
offs_t physpc = pc + numbytes;
const UINT8 *ptr;
/* translate the address, set the opcode base, and apply the byte xor */
if (!cpu[activecpu].intf.translate || (*cpu[activecpu].intf.translate)(ADDRESS_SPACE_PROGRAM, &physpc))
{
memory_set_opbase(physpc);
physpc ^= xorval;
/* get pointer to data */
ptr = memory_get_op_ptr(cpu_getactivecpu(), physpc, 0);
if (ptr)
{
opbuf[numbytes] = *ptr;
ptr = memory_get_op_ptr(cpu_getactivecpu(), physpc, 1);
if (ptr)
argbuf[numbytes] = *ptr;
else
argbuf[numbytes] = opbuf[numbytes];
}
}
}
return activecpu_dasm_new(buffer, pc, opbuf, argbuf, maxbytes);
}
return (*cpu[activecpu].intf.disassemble)(buffer, pc);
}
static void
handle_mcu( void )
{
UINT8 *IORAM = (UINT8 *)namcofl_mcuram;
static int toggle;
int new_coin_state = readinputport(3)&0x30;
unsigned p1 = readinputport(0);
unsigned p2 = readinputport(2);
unsigned p3 = readinputport(1);
unsigned p4 = readinputport(3);
IORAM[BYTE4_XOR_LE(0x6000)] = p1;
IORAM[BYTE4_XOR_LE(0x6003)] = p2;
IORAM[BYTE4_XOR_LE(0x6005)] = p3;
IORAM[BYTE4_XOR_LE(0x60b8)] = p4;
IORAM[BYTE4_XOR_LE(0x6014)] = readinputport(6)-1; /* handle */
IORAM[BYTE4_XOR_LE(0x6016)] = readinputport(5); /* brake */
IORAM[BYTE4_XOR_LE(0x6018)] = readinputport(4); /* accelerator */
if (!(new_coin_state & 0x20) && (old_coin_state & 0x20))
{
credits1++;
}
if (!(new_coin_state & 0x10) && (old_coin_state & 0x10))
{
credits2++;
}
old_coin_state = new_coin_state;
IORAM[BYTE4_XOR_LE(0x601e)] = credits1;
IORAM[BYTE4_XOR_LE(0x6020)] = credits2;
IORAM[BYTE4_XOR_LE(0x6009)] = 0;
toggle ^= 1;
if (toggle)
{ /* final lap */
IORAM[BYTE4_XOR_LE(0x6000)]|=0x80;
}
else
{ /* speed racer */
IORAM[BYTE4_XOR_LE(0x6000)]&=0x7f;
}
} /* handle_mcu */
