LPH7690 ??? Nokia 6210
*/
#include "u8g.h"
#define WIDTH 96
#define HEIGHT 65
#define PAGE_HEIGHT 8
static const uint8_t u8g_dev_pcf8812_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS(1), /* enable chip */
0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
0x006, /* temp. control: b10 = 2 */
0x013, /* bias system 1:48 */
0x080 | 0x040, /* medium Vop */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c, /* display on, normal operation */
U8G_ESC_DLY(100), /* delay 100 ms */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00d, /* display on, invert */
U8G_ESC_DLY(100), /* delay 100 ms */
U8G_ESC_DLY(100), /* delay 100 ms */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c, /* display on, normal */
#define WIDTH 160
#define HEIGHT 80
#define PAGE_HEIGHT 8
/*
code ideas:
https://github.com/vsergeev/embedded-drivers/tree/master/avr-lc7981
data sheets:
http://www.lcd-module.de/eng/pdf/zubehoer/lc7981.pdf
http://www.lcd-module.de/pdf/grafik/w160-6.pdf
*/
static const uint8_t u8g_dev_lc7981_160x80_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_ADR(1), /* instruction mode */
U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_CS(1), /* enable chip */
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_ADR(1), /* instruction mode */
0x000, /* mode register */
U8G_ESC_ADR(0), /* data mode */
0x032, /* display on (bit 5), master mode on (bit 4), graphics mode on (bit 1)*/
U8G_ESC_ADR(1), /* instruction mode */
0x001, /* character/bits per pixel pitch */
U8G_ESC_ADR(0), /* data mode */
0x007, /* 8 bits per pixel */
History: Initial version 20 May 2013 [email protected] indexed device 22 May 2013 [email protected] */ #include "u8g.h" #define WIDTH 128 #define HEIGHT 128 #define PAGE_HEIGHT 8 static const uint8_t u8g_dev_ssd1351_128x128_init_seq[] PROGMEM = { U8G_ESC_CS(0), /* disable chip */ U8G_ESC_DLY(50), U8G_ESC_ADR(0), /* instruction mode */ U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */ U8G_ESC_CS(1), /* enable chip */ U8G_ESC_DLY(50), 0xfd, /* Command Lock */ U8G_ESC_ADR(1), 0x12, U8G_ESC_ADR(0), /* instruction mode */ 0xfd, U8G_ESC_ADR(1), 0xb1, /* Command Lock */ U8G_ESC_ADR(0), /* instruction mode */ 0xae, /* Set Display Off */
#include "u8g.h"
#define CMD 0
#define DAT 1
#define WIDTH 240
#define HEIGHT 160
#define PAGE_HEIGHT 8
static const uint8_t u8g_dev_st75256_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_RST(1), /* hardware reset. Min 1 ms */
U8G_ESC_DLY(1), /* Delay max 1 ms */
U8G_ESC_CS(1), /* enable chip */
U8G_ESC_ADR(CMD),
0x30, // EXT=0
0x94, // Sleep Out
0x31, // EXT=1
// 0xD7, // Autoread disable
// U8G_ESC_ADR(DAT),
// 0x9F, //
U8G_ESC_ADR(CMD),
0x32, // Analog set
U8G_ESC_ADR(DAT),
0x00, /* OSC Frequency adjustment */
0x01, /* Booster Efficiency =Level 1 */
*/
static const uint8_t u8g_dev_ili9325d_320x240_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_CS(1), /* enable chip */
U8G_ESC_DLY(50), /* delay 50 ms */
//U8G_ESC_ADR(0), 0x000, 0x0E5, /* only used for none D version: set SRAM internal timing */
//U8G_ESC_ADR(1), 0x078, 0x0f0,
U8G_ESC_ADR(0), 0x000, 0x001, /* Driver Output Control, bits 8 & 10 */
U8G_ESC_ADR(1), 0x001, 0x000,
U8G_ESC_ADR(0), 0x000, 0x002, /* LCD Driving Wave Control, bit 9: Set line inversion */
U8G_ESC_ADR(1), 0x002, 0x000, /* ITDB02 none D verion: 0x007, 0x000 */
U8G_ESC_ADR(0), 0x000, 0x003, /* Entry Mode, GRAM write direction and BGR=1 */
U8G_ESC_ADR(1), 0x010, 0x030,
U8G_ESC_ADR(0), 0x000, 0x004, /* Resize register */
U8G_ESC_ADR(1), 0x000, 0x000,
U8G_ESC_ADR(0), 0x000, 0x008, /* Display Control 2: set the back porch and front porch */
U8G_ESC_ADR(1), 0x002, 0x007,
U8G_ESC_ADR(0), 0x000, 0x009, /* Display Control 3 */
U8G_ESC_ADR(1), 0x000, 0x000,
U8G_ESC_ADR(0), 0x000, 0x00a, /* Display Control 4: FMARK */
U8G_ESC_ADR(1), 0x000, 0x000,
