static int __devinit c_can_plat_probe(struct platform_device *pdev) { int ret; void __iomem *addr; struct net_device *dev; struct c_can_priv *priv; struct resource *mem, *irq; #ifdef CONFIG_HAVE_CLK struct clk *clk; /* get the appropriate clk */ clk = clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "no clock defined\n"); ret = -ENODEV; goto exit; } #endif /* get the platform data */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!mem || (irq <= 0)) { ret = -ENODEV; goto exit_free_clk; } if (!request_mem_region(mem->start, resource_size(mem), KBUILD_MODNAME)) { dev_err(&pdev->dev, "resource unavailable\n"); ret = -ENODEV; goto exit_free_clk; } addr = ioremap(mem->start, resource_size(mem)); if (!addr) { dev_err(&pdev->dev, "failed to map can port\n"); ret = -ENOMEM; goto exit_release_mem; } /* allocate the c_can device */ dev = alloc_c_can_dev(); if (!dev) { ret = -ENOMEM; goto exit_iounmap; } priv = netdev_priv(dev); dev->irq = irq->start; priv->regs = addr; #ifdef CONFIG_HAVE_CLK priv->can.clock.freq = clk_get_rate(clk); priv->priv = clk; #endif switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { case IORESOURCE_MEM_32BIT: priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; break; case IORESOURCE_MEM_16BIT: default: priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; break; } platform_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); ret = register_c_can_dev(dev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", KBUILD_MODNAME, ret); goto exit_free_device; } dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", KBUILD_MODNAME, priv->regs, dev->irq); return 0; exit_free_device: platform_set_drvdata(pdev, NULL); free_c_can_dev(dev); exit_iounmap: iounmap(addr); exit_release_mem: release_mem_region(mem->start, resource_size(mem)); exit_free_clk: #ifdef CONFIG_HAVE_CLK clk_put(clk); exit: #endif dev_err(&pdev->dev, "probe failed\n"); return ret; }
static int c_can_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct c_can_pci_data *c_can_pci_data = (void *)ent->driver_data; struct c_can_priv *priv; struct net_device *dev; void __iomem *addr; int ret; ret = pci_enable_device(pdev); if (ret) { dev_err(&pdev->dev, "pci_enable_device FAILED\n"); goto out; } ret = pci_request_regions(pdev, KBUILD_MODNAME); if (ret) { dev_err(&pdev->dev, "pci_request_regions FAILED\n"); goto out_disable_device; } ret = pci_enable_msi(pdev); if (!ret) { dev_info(&pdev->dev, "MSI enabled\n"); pci_set_master(pdev); } addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0)); if (!addr) { dev_err(&pdev->dev, "device has no PCI memory resources, " "failing adapter\n"); ret = -ENOMEM; goto out_release_regions; } /* allocate the c_can device */ dev = alloc_c_can_dev(); if (!dev) { ret = -ENOMEM; goto out_iounmap; } priv = netdev_priv(dev); pci_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); dev->irq = pdev->irq; priv->base = addr; if (!c_can_pci_data->freq) { dev_err(&pdev->dev, "no clock frequency defined\n"); ret = -ENODEV; goto out_free_c_can; } else { priv->can.clock.freq = c_can_pci_data->freq; } /* Configure CAN type */ switch (c_can_pci_data->type) { case BOSCH_C_CAN: priv->regs = reg_map_c_can; break; case BOSCH_D_CAN: priv->regs = reg_map_d_can; priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES; break; default: ret = -EINVAL; goto out_free_c_can; } priv->type = c_can_pci_data->type; /* Configure access to registers */ switch (c_can_pci_data->reg_align) { case C_CAN_REG_ALIGN_32: priv->read_reg = c_can_pci_read_reg_aligned_to_32bit; priv->write_reg = c_can_pci_write_reg_aligned_to_32bit; break; case C_CAN_REG_ALIGN_16: priv->read_reg = c_can_pci_read_reg_aligned_to_16bit; priv->write_reg = c_can_pci_write_reg_aligned_to_16bit; break; default: ret = -EINVAL; goto out_free_c_can; } ret = register_c_can_dev(dev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", KBUILD_MODNAME, ret); goto out_free_c_can; } dev_dbg(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", KBUILD_MODNAME, priv->regs, dev->irq); return 0; out_free_c_can: free_c_can_dev(dev); out_iounmap: pci_iounmap(pdev, addr); out_release_regions: pci_disable_msi(pdev); pci_clear_master(pdev); pci_release_regions(pdev); out_disable_device: pci_disable_device(pdev); out: return ret; }
static int c_can_plat_probe(struct platform_device *pdev) { int ret; void __iomem *addr; struct rtcan_device *dev; struct c_can_priv *priv; const struct of_device_id *match; const struct platform_device_id *id; struct pinctrl *pinctrl; struct resource *mem, *res; int irq; struct clk *clk; if (pdev->dev.of_node) { match = of_match_device(c_can_of_table, &pdev->dev); if (!match) { dev_err(&pdev->dev, "Failed to find matching dt id\n"); ret = -EINVAL; goto exit; } id = match->data; } else { id = platform_get_device_id(pdev); } pinctrl = devm_pinctrl_get_select_default(&pdev->dev); if (IS_ERR(pinctrl)) dev_warn(&pdev->dev, "failed to configure pins from driver\n"); /* get the appropriate clk */ clk = clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "no clock defined\n"); ret = -ENODEV; goto exit; } dev_info(&pdev->dev, "setting up step 1: platform_get_resource\n"); /* get the platform data */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); if (!mem || irq <= 0) { ret = -ENODEV; goto exit_free_clk; } dev_info(&pdev->dev, "setting up step 2: request mem region. Start %x, size %d\n", mem->start, resource_size(mem)); if (!request_mem_region(mem->start, resource_size(mem), "c_can")) { dev_err(&pdev->dev, "resource unavailable\n"); ret = -ENODEV; goto exit_free_clk; } dev_info(&pdev->dev, "setting up step 3: ioremap. Start %x, size %d\n", mem->start, resource_size(mem)); addr = ioremap(mem->start, resource_size(mem)); if (!addr) { dev_err(&pdev->dev, "failed to map can port\n"); ret = -ENOMEM; goto exit_release_mem; } dev_info(&pdev->dev, "alloc dev...\n"); /* allocate the c_can device */ dev = alloc_c_can_dev(); if (!dev) { ret = -ENOMEM; goto exit_iounmap; } priv = rtcan_priv(dev); switch (id->driver_data) { case BOSCH_C_CAN: priv->regs = reg_map_c_can; switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { case IORESOURCE_MEM_32BIT: priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; break; case IORESOURCE_MEM_16BIT: default: priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; break; } break; case BOSCH_D_CAN: priv->regs = reg_map_d_can; priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; if (pdev->dev.of_node) priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can"); else priv->instance = pdev->id; dev_info(&pdev->dev, "platform_get_resource...\n"); res = platform_get_resource(pdev, IORESOURCE_MEM, 1); dev_info(&pdev->dev, "devm request and ioremap..\n"); priv->raminit_ctrlreg = devm_request_and_ioremap(&pdev->dev, res); if (!priv->raminit_ctrlreg || priv->instance < 0) dev_info(&pdev->dev, "control memory is not used for raminit\n"); else priv->raminit = c_can_hw_raminit; break; default: ret = -EINVAL; goto exit_free_device; } priv->irq = irq; priv->base = addr; priv->device = &pdev->dev; priv->priv = clk; priv->type = id->driver_data; platform_set_drvdata(pdev, dev); dev->ctrl_name = c_can_ctrl_name; dev->board_name = my_board_name; dev->base_addr = (unsigned long)addr; dev->can_sys_clock = clk_get_rate(clk); dev->hard_start_xmit = c_can_start_xmit; dev->do_set_mode = c_can_set_mode; dev->do_set_bit_time = c_can_save_bit_time; dev->bittiming_const = &c_can_bittiming_const; dev->state = CAN_STATE_STOPPED; /* Give device an interface name */ strncpy(dev->name, DEV_NAME, IFNAMSIZ); ret = register_c_candev(dev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", "c_can", ret); goto exit_free_device; } dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", "c_can", priv->base, priv->irq); return 0; exit_free_device: platform_set_drvdata(pdev, NULL); exit_iounmap: iounmap(addr); exit_release_mem: release_mem_region(mem->start, resource_size(mem)); exit_free_clk: clk_put(clk); exit: dev_err(&pdev->dev, "probe failed\n"); return ret; }
static int c_can_plat_probe(struct platform_device *pdev) { int ret; void __iomem *addr; struct net_device *dev; struct c_can_priv *priv; const struct of_device_id *match; const struct platform_device_id *id; struct resource *mem, *res; int irq; struct clk *clk; if (pdev->dev.of_node) { match = of_match_device(c_can_of_table, &pdev->dev); if (!match) { dev_err(&pdev->dev, "Failed to find matching dt id\n"); ret = -EINVAL; goto exit; } id = match->data; } else { id = platform_get_device_id(pdev); } /* get the appropriate clk */ clk = clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "no clock defined\n"); ret = -ENODEV; goto exit; } /* get the platform data */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); if (!mem || irq <= 0) { ret = -ENODEV; goto exit_free_clk; } if (!request_mem_region(mem->start, resource_size(mem), KBUILD_MODNAME)) { dev_err(&pdev->dev, "resource unavailable\n"); ret = -ENODEV; goto exit_free_clk; } addr = ioremap(mem->start, resource_size(mem)); if (!addr) { dev_err(&pdev->dev, "failed to map can port\n"); ret = -ENOMEM; goto exit_release_mem; } /* allocate the c_can device */ dev = alloc_c_can_dev(); if (!dev) { ret = -ENOMEM; goto exit_iounmap; } priv = netdev_priv(dev); switch (id->driver_data) { case BOSCH_C_CAN: priv->regs = reg_map_c_can; switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { case IORESOURCE_MEM_32BIT: priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; break; case IORESOURCE_MEM_16BIT: default: priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; break; } break; case BOSCH_D_CAN: priv->regs = reg_map_d_can; priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES; priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; if (pdev->dev.of_node) priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can"); else priv->instance = pdev->id; res = platform_get_resource(pdev, IORESOURCE_MEM, 1); priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0) dev_info(&pdev->dev, "control memory is not used for raminit\n"); else priv->raminit = c_can_hw_raminit; break; default: ret = -EINVAL; goto exit_free_device; } dev->irq = irq; priv->base = addr; priv->device = &pdev->dev; priv->can.clock.freq = clk_get_rate(clk); priv->priv = clk; priv->type = id->driver_data; platform_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); ret = register_c_can_dev(dev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", KBUILD_MODNAME, ret); goto exit_free_device; } dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", KBUILD_MODNAME, priv->base, dev->irq); return 0; exit_free_device: free_c_can_dev(dev); exit_iounmap: iounmap(addr); exit_release_mem: release_mem_region(mem->start, resource_size(mem)); exit_free_clk: clk_put(clk); exit: dev_err(&pdev->dev, "probe failed\n"); return ret; }
static int __devinit c_can_plat_probe(struct platform_device *pdev) { int ret; void __iomem *addr; struct net_device *dev; struct c_can_priv *priv; const struct platform_device_id *id; struct resource *mem; int irq; struct clk *clk; /* get the appropriate clk */ clk = clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "no clock defined\n"); ret = -ENODEV; goto exit; } /* get the platform data */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); if (!mem || irq <= 0) { ret = -ENODEV; goto exit_free_clk; } if (!request_mem_region(mem->start, resource_size(mem), KBUILD_MODNAME)) { dev_err(&pdev->dev, "resource unavailable\n"); ret = -ENODEV; goto exit_free_clk; } addr = ioremap(mem->start, resource_size(mem)); if (!addr) { dev_err(&pdev->dev, "failed to map can port\n"); ret = -ENOMEM; goto exit_release_mem; } /* allocate the c_can device */ dev = alloc_c_can_dev(); if (!dev) { ret = -ENOMEM; goto exit_iounmap; } priv = netdev_priv(dev); id = platform_get_device_id(pdev); switch (id->driver_data) { case C_CAN_DEVTYPE: priv->regs = reg_map_c_can; switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { case IORESOURCE_MEM_32BIT: priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; break; case IORESOURCE_MEM_16BIT: default: priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; break; } break; case D_CAN_DEVTYPE: priv->regs = reg_map_d_can; priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES; priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; break; default: ret = -EINVAL; goto exit_free_device; } dev->irq = irq; priv->base = addr; priv->can.clock.freq = clk_get_rate(clk); priv->priv = clk; platform_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); ret = register_c_can_dev(dev); if (ret) { dev_err(&pdev->dev, "registering %s failed (err=%d)\n", KBUILD_MODNAME, ret); goto exit_free_device; } dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", KBUILD_MODNAME, priv->base, dev->irq); return 0; exit_free_device: platform_set_drvdata(pdev, NULL); free_c_can_dev(dev); exit_iounmap: iounmap(addr); exit_release_mem: release_mem_region(mem->start, resource_size(mem)); exit_free_clk: clk_put(clk); exit: dev_err(&pdev->dev, "probe failed\n"); return ret; }