예제 #1
0
static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
{
	fdt_addr_t addr;
	unsigned int node;
	int depth;

	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_EHCI);
	if (node <= 0) {
		debug("EHCI: Can't get device node for ehci\n");
		return -ENODEV;
	}

	/*
	 * Get the base address for EHCI controller from the device node
	 */
	addr = fdtdec_get_addr(blob, node, "reg");
	if (addr == FDT_ADDR_T_NONE) {
		debug("Can't get the EHCI register address\n");
		return -ENXIO;
	}

	exynos->hcd = (struct ehci_hccr *)addr;

	/* Vbus gpio */
	gpio_request_by_name_nodev(blob, node, "samsung,vbus-gpio", 0,
				   &exynos->vbus_gpio, GPIOD_IS_OUT);

	depth = 0;
	node = fdtdec_next_compatible_subnode(blob, node,
					COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth);
	if (node <= 0) {
		debug("EHCI: Can't get device node for usb-phy controller\n");
		return -ENODEV;
	}

	/*
	 * Get the base address for usbphy from the device node
	 */
	exynos->usb = (struct exynos_usb_phy *)fdtdec_get_addr(blob, node,
								"reg");
	if (exynos->usb == NULL) {
		debug("Can't get the usbphy register address\n");
		return -ENXIO;
	}

	return 0;
}
예제 #2
0
static int exynos_usb3_parse_dt(const void *blob, struct exynos_xhci *exynos)
{
	fdt_addr_t addr;
	unsigned int node;
	int depth;

	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_XHCI);
	if (node <= 0) {
		debug("XHCI: Can't get device node for xhci\n");
		return -ENODEV;
	}

	/*
	 * Get the base address for XHCI controller from the device node
	 */
	addr = fdtdec_get_addr(blob, node, "reg");
	if (addr == FDT_ADDR_T_NONE) {
		debug("Can't get the XHCI register base address\n");
		return -ENXIO;
	}
	exynos->hcd = (struct xhci_hccr *)addr;

	/* Vbus gpio */
	fdtdec_decode_gpio(blob, node, "samsung,vbus-gpio", &exynos->vbus_gpio);

	depth = 0;
	node = fdtdec_next_compatible_subnode(blob, node,
				COMPAT_SAMSUNG_EXYNOS5_USB3_PHY, &depth);
	if (node <= 0) {
		debug("XHCI: Can't get device node for usb3-phy controller\n");
		return -ENODEV;
	}

	/*
	 * Get the base address for usbphy from the device node
	 */
	exynos->usb3_phy = (struct exynos_usb3_phy *)fdtdec_get_addr(blob, node,
								"reg");
	if (exynos->usb3_phy == NULL) {
		debug("Can't get the usbphy register address\n");
		return -ENXIO;
	}

	return 0;
}
예제 #3
0
static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
{
	struct exynos_xhci_platdata *plat = dev_get_platdata(dev);
	const void *blob = gd->fdt_blob;
	unsigned int node;
	int depth;

	/*
	 * Get the base address for XHCI controller from the device node
	 */
	plat->hcd_base = dev_get_addr(dev);
	if (plat->hcd_base == FDT_ADDR_T_NONE) {
		debug("Can't get the XHCI register base address\n");
		return -ENXIO;
	}

	depth = 0;
	node = fdtdec_next_compatible_subnode(blob, dev_of_offset(dev),
				COMPAT_SAMSUNG_EXYNOS5_USB3_PHY, &depth);
	if (node <= 0) {
		debug("XHCI: Can't get device node for usb3-phy controller\n");
		return -ENODEV;
	}

	/*
	 * Get the base address for usbphy from the device node
	 */
	plat->phy_base = fdtdec_get_addr(blob, node, "reg");
	if (plat->phy_base == FDT_ADDR_T_NONE) {
		debug("Can't get the usbphy register address\n");
		return -ENXIO;
	}

	/* Vbus gpio */
	gpio_request_by_name(dev, "samsung,vbus-gpio", 0,
			     &plat->vbus_gpio, GPIOD_IS_OUT);

	return 0;
}
예제 #4
0
파일: emc.c 프로젝트: AshishNamdev/u-boot
/**
 * Decode the EMC node of the device tree, returning a pointer to the emc
 * controller and the table to be used for the given rate.
 *
 * @param blob	Device tree blob
 * @param rate	Clock speed of memory controller in Hz (=2x memory bus rate)
 * @param emcp	Returns address of EMC controller registers
 * @param tablep Returns pointer to table to program into EMC. There are
 *		TEGRA_EMC_NUM_REGS entries, destined for offsets as per the
 *		emc_reg_addr array.
 * @return 0 if ok, otherwise a -ve error code which will allow someone to
 * figure out roughly what went wrong by looking at this code.
 */
static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp,
		      const u32 **tablep)
{
	struct apb_misc_pp_ctlr *pp =
		(struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE;
	int ram_code;
	int depth;
	int node;

	ram_code = (readl(&pp->strapping_opt_a) & RAM_CODE_MASK)
			>> RAM_CODE_SHIFT;
	/*
	 * The EMC clock rate is twice the bus rate, and the bus rate is
	 * measured in kHz
	 */
	rate = rate / 2 / 1000;

	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC);
	if (node < 0) {
		debug("%s: No EMC node found in FDT\n", __func__);
		return ERR_NO_EMC_NODE;
	}
	*emcp = (struct emc_ctlr *)fdtdec_get_addr(blob, node, "reg");
	if (*emcp == (struct emc_ctlr *)FDT_ADDR_T_NONE) {
		debug("%s: No EMC node reg property\n", __func__);
		return ERR_NO_EMC_REG;
	}

	/* Work out the parent node which contains our EMC tables */
	node = find_emc_tables(blob, node, ram_code & 3);
	if (node < 0)
		return node;

	depth = 0;
	for (;;) {
		int node_rate;

		node = fdtdec_next_compatible_subnode(blob, node,
				COMPAT_NVIDIA_TEGRA20_EMC_TABLE, &depth);
		if (node < 0)
			break;
		node_rate = fdtdec_get_int(blob, node, "clock-frequency", -1);
		if (node_rate == -1) {
			debug("%s: Missing clock-frequency\n", __func__);
			return ERR_NO_FREQ; /* we expect this property */
		}

		if (node_rate == rate)
			break;
	}
	if (node < 0) {
		debug("%s: No node found for clock frequency %d\n", __func__,
		      rate);
		return ERR_FREQ_NOT_FOUND;
	}

	*tablep = fdtdec_locate_array(blob, node, "nvidia,emc-registers",
				      TEGRA_EMC_NUM_REGS);
	if (!*tablep) {
		debug("%s: node '%s' array missing / wrong size\n", __func__,
		      fdt_get_name(blob, node, NULL));
		return ERR_BAD_REGS;
	}

	/* All seems well */
	return 0;
}