/**
* @brief Enable access to registers and initialize RTC if BKP domain
* was previously reseted.
* @note: Cold start time of LSE oscillator on STM32 platform
* takes about 3 seconds.
*
* @notapi
*/
void rtc_lld_init(void){
/* Required because access to PRL.*/
rtc_lld_apb1_sync();
/* Writes preload register only if its value is not equal to desired value.*/
if (STM32_RTCCLK != (((uint32_t)(RTC->PRLH)) << 16) +
((uint32_t)RTC->PRLL) + 1) {
rtc_lld_acquire();
RTC->PRLH = (uint16_t)((STM32_RTCCLK - 1) >> 16);
RTC->PRLL = (uint16_t)((STM32_RTCCLK - 1) & 0xFFFF);
rtc_lld_release();
}
/**
* @brief Get current time.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] timespec pointer to a @p RTCTime structure
*
* @notapi
*/
void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) {
(void)rtcp;
uint32_t time_frac;
/* Required because access to CNT and DIV.*/
rtc_lld_apb1_sync();
/* Loops until two consecutive read returning the same value.*/
do {
timespec->tv_sec = ((uint32_t)(RTC->CNTH) << 16) + RTC->CNTL;
time_frac = (((uint32_t)RTC->DIVH) << 16) + (uint32_t)RTC->DIVL;
} while ((timespec->tv_sec) != (((uint32_t)(RTC->CNTH) << 16) + RTC->CNTL));
timespec->tv_msec = (uint16_t)(((STM32_RTCCLK - 1 - time_frac) * 1000) /
STM32_RTCCLK);
}
/**
* @brief Initialize RTC.
*
* @notapi
*/
void rtc_lld_init(void){
/* RSF bit must be cleared by software after an APB1 reset or an APB1 clock
stop. Otherwise its value will not be actual. */
RTC->CRL &= ~RTC_CRL_RSF;
/* Required because access to PRL.*/
rtc_lld_apb1_sync();
/* All interrupts initially disabled.*/
rtc_lld_wait_write();
RTC->CRH = 0;
/* Callback initially disabled.*/
RTCD1.callback = NULL;
/* IRQ vector permanently assigned to this driver.*/
nvicEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));
}