/* LW */
void test_lw() {
word location1 = 0x00001000;
word w = 0xFFFFFFFF;
storeWord(w, location1);
T1 = location1;
test_execute(create_itype_hex(0x0000, I_T0, I_T1, OC_LW));
assert(T0 == w);
w =0x12345678;
storeWord(w, location1 + 0x0001);
T1 = location1;
test_execute(create_itype_hex(0x0001, I_T0, I_T1, OC_LW));
assert(T0 == w);
}
/* LW */
void test_lw() {
word location1 = 0x00001230;
word location2 = 0x00001234;
word w = 0xFFFFFFFF;
storeWord(w, location1);
T1 = location1;
test_execute(create_itype_hex(0x0000, I_T0, I_T1, OC_LW));
assert(T0 == w);
w = 0x87654321;
storeWord(w, location2);
T1 = location1;
test_execute(create_itype_hex(0x0004, I_T0, I_T1, OC_LW));
assert(T0 == w);
}
/* LW */
void test_lw() {
word location = 0x000000FF;
word save = 0xDEADBEEF;
storeWord(save, location);
T1 = location;
test_execute(create_itype_hex(0x0000, I_T0, I_T1, OC_LW));
assert(T0 == save);
}
void test_execute(word instr) {
word w;
Instruction *instruction;
/* Store the executable word */
storeWord(instr, pc);
/* Fetch the next Instruction */
w = loadWord(pc);
instruction = (Instruction *) &w;
pc += 4;
/* Execute the fetched instruction*/
operations[instruction->i.opcode].operation(instruction);
assert(ZERO == 0);
}
/**
* Decode opcode and address from 'opAddr' member.
*
* Decodes operation and executes it immediately if possible; otherwise, stores
* the decoded operation and address.
*
* @returns New state
*/
EEPROM93C46::State EEPROM93C46::opDecode()
{
switch (m_u16Word>>6) {
case 3: /* ERASE */
storeWord(m_u16Word & ADDR_MASK, 0xFFFF);
return WAITING_CS_FALL;
case 2: /* READ */
m_eOp = OP_READ;
m_u16Addr = m_u16Word & ADDR_MASK;
return opRead(); /* Load first word */
case 1: /* WRITE */
m_eOp = OP_WRITE;
m_u16Addr = m_u16Word & ADDR_MASK;
m_u16Word = 0;
m_u16Mask = DATA_MSB;
return READING_DI;
case 0:
switch (m_u16Word>>4) {
case 0: /* ERASE/WRITE DISABLE */
m_fWriteEnabled = false;
return STANDBY;
case 1: /* WRITE ALL */
m_eOp = OP_WRITE_ALL;
m_u16Word = 0;
m_u16Mask = DATA_MSB;
return READING_DI;
case 2: /* ERASE ALL */
/* Re-use opWriteAll */
m_u16Word = 0xFFFF;
return opWriteAll();
case 3: /* ERASE/WRITE ENABLE */
m_fWriteEnabled = true;
return STANDBY;
}
}
return m_eState;
}
/* SW */
void mips_sw(Instruction *instruction) {
InstructionTypeI i = instruction->i;
storeWord(registers[i.rt], registers[i.rs] + (signed)signExtend(i.immediate));
}
/**
* Overwrite the entire contents of EEPROM with the value of m_u16Word.
*
* @returns New state
*
* @remarks Need to wait for CS lower/raise to show busy/ready indication.
*/
EEPROM93C46::State EEPROM93C46::opWriteAll()
{
for (int i = 0; i < SIZE; i++)
storeWord(i, m_u16Word);
return WAITING_CS_FALL;
}
/**
* Write the value of m_u16Word to the location specified by m_u16Addr.
*
* @returns New state
*
* @remarks Need to wait for CS lower/raise to show busy/ready indication.
*/
EEPROM93C46::State EEPROM93C46::opWrite()
{
storeWord(m_u16Addr, m_u16Word);
return WAITING_CS_FALL;
}
