bool udd_ep_set_halt(udd_ep_id_t ep) { bool b_dir_in = ep & USB_EP_DIR_IN; uint8_t ep_index = ep & USB_EP_ADDR_MASK; udd_ep_job_t *ptr_job = &udd_ep_job[ep_index - 1]; irqflags_t flags; if (USB_DEVICE_MAX_EP < ep_index) { return false; } flags = cpu_irq_save(); if (b_dir_in && (Is_udd_transmit_ready(ep_index) || ptr_job->bank > 1)) { // Halt until banks sent ptr_job->b_stall_requested = true; udd_enable_endpoint_interrupt(ep_index); cpu_irq_restore(flags); return true; } else { // Stall endpoint udd_enable_stall_handshake(ep_index); udd_enable_endpoint_interrupt(ep_index); cpu_irq_restore(flags); } return true; }
bool udd_ep_set_halt(udd_ep_id_t ep) { udd_ep_job_t *ptr_job; uint8_t index = ep & USB_EP_ADDR_MASK; if (USB_DEVICE_MAX_EP < index) { return false; } ptr_job = &udd_ep_job[index - 1]; if (Is_udd_endpoint_stall_requested(index) // Endpoint stalled || ptr_job->stall_requested) { // Endpoint stall is requested return true; // Already STALL } if (ptr_job->busy == true) { return false; // Job on going, stall impossible } if ((ep & USB_EP_DIR_IN) && (0 != udd_nb_busy_bank(index))) { // Delay the stall after the end of IN transfer on USB line ptr_job->stall_requested = true; udd_enable_bank_interrupt(index); udd_enable_endpoint_interrupt(index); return true; } // Stall endpoint immediately udd_disable_endpoint_bank_autoswitch(index); udd_ack_stall(index); udd_enable_stall_handshake(index); return true; }
static void udd_reset_ep_ctrl(void) { irqflags_t flags; // Reset USB address to 0 udd_configure_address(0); udd_enable_address(); // Alloc and configure control endpoint udd_configure_endpoint(0, USB_EP_TYPE_CONTROL, 0, USB_DEVICE_EP_CTRL_SIZE, AVR32_USBC_UECFG0_EPBK_SINGLE); // Use internal buffer for endpoint control udd_udesc_set_buf0_addr(0, udd_ctrl_buffer); // don't use multipacket on endpoint control udd_udesc_rst_buf0_size(0); udd_enable_endpoint(0); udd_disable_busy_bank0(0); flags = cpu_irq_save(); udd_enable_setup_received_interrupt(0); udd_enable_out_received_interrupt(0); udd_enable_endpoint_interrupt(0); cpu_irq_restore(flags); }
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback) { udd_ep_job_t *ptr_job; irqflags_t flags; bool b_dir_in = ep & USB_EP_DIR_IN; ep &= USB_EP_ADDR_MASK; if (USB_DEVICE_MAX_EP < ep) { return false; } // Get job about endpoint ptr_job = &udd_ep_job[ep - 1]; if ((!Is_udd_endpoint_enabled(ep)) || ptr_job->b_stall_requested || Is_udd_endpoint_stall_requested(ep)) { return false; // Endpoint is halted } flags = cpu_irq_save(); if (ptr_job->busy == true) { cpu_irq_restore(flags); return false; // Job already on going } ptr_job->busy = true; cpu_irq_restore(flags); // No job running. Let's setup a new one. ptr_job->buf = buf; ptr_job->buf_size = buf_size; ptr_job->buf_cnt = 0; ptr_job->call_trans = callback; ptr_job->b_shortpacket = b_shortpacket || (buf_size == 0); ptr_job->b_buf_end = false; flags = cpu_irq_save(); udd_enable_endpoint_interrupt(ep); // Request first transfer if (b_dir_in) { if (Is_udd_in_pending(ep)) { // Append more data (handled in interrupt service) } else { // Start new, try to fill 1~2 banks before handling status if (udd_ep_in_sent(ep, true)) { // Over one bank udd_ep_in_sent(ep, false); } else { // Less than one bank } } } else { // Waiting for OUT received interrupt } cpu_irq_restore(flags); return true; }
static bool udd_ep_interrupt(void) { udd_ep_id_t ep; udd_ep_job_t *ptr_job; // For each endpoint different of control endpoint (0) for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { // Check DMA event if (Is_udd_endpoint_dma_interrupt_enabled(ep) && Is_udd_endpoint_dma_interrupt(ep)) { uint32_t nb_remaining; udd_disable_endpoint_dma_interrupt(ep); // Save number of data no transfered nb_remaining = (udd_endpoint_dma_get_status(ep) & AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_MASK) >> AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_OFFSET; // Get job corresponding at endpoint ptr_job = &udd_ep_job[ep - 1]; // Update number of data transfered ptr_job->buf_size -= nb_remaining; if (!Is_udd_endpoint_in(ep)) { // Disable autoswitch bank on OUT udd_disable_endpoint_bank_autoswitch(ep); } else { // Wait end of background transfer on IN endpoint before disabled autoswitch bank udd_enable_endpoint_interrupt(ep); udd_enable_bank_interrupt(ep); } // Call callback to signal end of transfer udd_ep_finish_job(&udd_ep_job[ep - 1], false); return true; } // Check empty bank interrupt event if (Is_udd_endpoint_interrupt_enabled(ep) && (0 == udd_nb_busy_bank(ep))) { // End of background transfer on IN endpoint udd_disable_bank_interrupt(ep); udd_disable_endpoint_interrupt(ep); // If no new transfer running then disable autoswitch bank if (!udd_ep_job[ep - 1].busy) { udd_disable_endpoint_bank_autoswitch(ep); } // If a stall has been requested during backgound transfer then execute it if (udd_ep_job[ep - 1].stall_requested) { udd_ep_job[ep - 1].stall_requested = false; udd_enable_stall_handshake(ep); udd_reset_data_toggle(ep); } return true; } }
static void udd_reset_ep_ctrl(void) { irqflags_t flags; // Reset USB address to 0 udd_enable_address(); udd_configure_address(0); // Alloc and configure control endpoint in OUT direction udd_configure_endpoint(0, USB_EP_TYPE_CONTROL, 0); udd_enable_endpoint(0); flags = cpu_irq_save(); udd_enable_endpoint_interrupt(0); cpu_irq_restore(flags); }
static void udd_reset_ep_ctrl(void) { irqflags_t flags; // Reset USB address to 0 udd_configure_address(0); udd_enable_address(); // Alloc and configure control endpoint udd_configure_endpoint(0, USB_EP_TYPE_CONTROL, 0, USB_DEVICE_EP_CTRL_SIZE, AVR32_USBB_UECFG0_EPBK_SINGLE); udd_allocate_memory(0); udd_enable_endpoint(0); flags = cpu_irq_save(); udd_enable_setup_received_interrupt(0); udd_enable_out_received_interrupt(0); udd_enable_endpoint_interrupt(0); cpu_irq_restore(flags); }
static void udd_ep_trans_done(udd_ep_id_t ep) { uint32_t udd_dma_ctrl = 0; udd_ep_job_t *ptr_job; iram_size_t next_trans; irqflags_t flags; // Get job corresponding at endpoint ptr_job = &udd_ep_job[ep - 1]; if (!ptr_job->busy) { return; // No job is running, then ignore it (system error) } if (ptr_job->nb_trans != ptr_job->buf_size) { // Need to send or receive other data next_trans = ptr_job->buf_size - ptr_job->nb_trans; if (UDD_ENDPOINT_MAX_TRANS < next_trans) { // The USB hardware support a maximum // transfer size of UDD_ENDPOINT_MAX_TRANS Bytes next_trans = UDD_ENDPOINT_MAX_TRANS; // Set 0 to transfer the maximum udd_dma_ctrl = (0 << AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; } else { udd_dma_ctrl = (next_trans << AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; } if (Is_udd_endpoint_in(ep)) { if (0 != next_trans % udd_get_endpoint_size(ep)) { // Enable short packet option // else the DMA transfer is accepted // and interrupt DMA valid but nothing is sent. udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_DMAEND_EN_MASK; // No need to request another ZLP ptr_job->b_shortpacket = false; } } else { if ((USB_EP_TYPE_ISOCHRONOUS != udd_get_endpoint_type(ep)) || (next_trans <= udd_get_endpoint_size(ep))) { // Enable short packet reception udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOT_IRQ_EN_MASK | AVR32_USBB_UDDMA1_CONTROL_BUFF_CLOSE_IN_EN_MASK; } } // Start USB DMA to fill or read fifo of the selected endpoint udd_endpoint_dma_set_addr(ep, (U32) &ptr_job->buf[ptr_job->nb_trans]); udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOBUFF_IRQ_EN_MASK | AVR32_USBB_UDDMA1_CONTROL_CH_EN_MASK; // Disable IRQs to have a short sequence // between read of EOT_STA and DMA enable flags = cpu_irq_save(); if ( !(udd_endpoint_dma_get_status(ep) & AVR32_USBB_UDDMA1_STATUS_EOT_STA_MASK)) { udd_endpoint_dma_set_control(ep, udd_dma_ctrl); ptr_job->nb_trans += next_trans; udd_enable_endpoint_dma_interrupt(ep); cpu_irq_restore(flags); return; } cpu_irq_restore(flags); // Here a ZLP has been received // and the DMA transfer must be not started. // It is the end of transfer ptr_job->buf_size = ptr_job->nb_trans; } if (Is_udd_endpoint_in(ep)) { if (ptr_job->b_shortpacket) { // Need to send a ZLP (No possible with USB DMA) // enable interrupt to wait a free bank to sent ZLP udd_ack_in_send(ep); if (Is_udd_write_enabled(ep)) { // Force interrupt in case of ep already free udd_raise_in_send(ep); } udd_enable_in_send_interrupt(ep); udd_enable_endpoint_interrupt(ep); return; } } // Call callback to signal end of transfer udd_ep_finish_job(ptr_job, false, ep); }
static void udd_ep_trans_done(udd_ep_id_t ep) { udd_ep_job_t *ptr_job; uint16_t ep_size, nb_trans; uint16_t next_trans; udd_ep_id_t ep_num; irqflags_t flags; ep_num = ep & USB_EP_ADDR_MASK; ep_size = udd_get_endpoint_size(ep_num); // Get job corresponding at endpoint ptr_job = &udd_ep_job[ep_num - 1]; // Disable interrupt of endpoint flags = cpu_irq_save(); udd_disable_endpoint_interrupt(ep_num); cpu_irq_restore(flags); if (!ptr_job->busy) { return; // No job is running, then ignore it (system error) } if (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)) { // Transfer complete on IN nb_trans = udd_udesc_get_buf0_size(ep_num); // Lock emission of new IN packet udd_enable_busy_bank0(ep_num); // Ack interrupt udd_ack_in_send(ep_num); if (0 == nb_trans) { if (0 == udd_nb_busy_bank(ep_num)) { // All byte are transfered than take nb byte requested nb_trans = udd_udesc_get_buf0_ctn(ep_num); } } // Update number of data transfered ptr_job->nb_trans += nb_trans; // Need to send other data if ((ptr_job->nb_trans != ptr_job->buf_size) || ptr_job->b_shortpacket) { next_trans = ptr_job->buf_size - ptr_job->nb_trans; if (UDD_ENDPOINT_MAX_TRANS < next_trans) { // The USB hardware support a maximum // transfer size of UDD_ENDPOINT_MAX_TRANS Bytes next_trans = UDD_ENDPOINT_MAX_TRANS - (UDD_ENDPOINT_MAX_TRANS % ep_size); udd_udesc_set_buf0_autozlp(ep_num, false); } else { // Need ZLP, if requested and last packet is not a short packet udd_udesc_set_buf0_autozlp(ep_num, ptr_job->b_shortpacket); ptr_job->b_shortpacket = false; // No need to request another ZLP } udd_udesc_set_buf0_ctn(ep_num, next_trans); udd_udesc_rst_buf0_size(ep_num); // Link the user buffer directly on USB hardware DMA udd_udesc_set_buf0_addr(ep_num, &ptr_job->buf[ptr_job->nb_trans]); // Start transfer udd_ack_fifocon(ep_num); udd_disable_busy_bank0(ep_num); // Enable interrupt flags = cpu_irq_save(); udd_enable_in_send_interrupt(ep_num); udd_enable_endpoint_interrupt(ep_num); cpu_irq_restore(flags); return; } } else { // Transfer complete on OUT nb_trans = udd_udesc_get_buf0_ctn(ep_num); // Lock reception of new OUT packet udd_enable_busy_bank0(ep_num); // Ack interrupt udd_ack_out_received(ep_num); udd_ack_fifocon(ep_num); // Can be necessary to copy data receive from cache buffer to user buffer if (ptr_job->b_use_out_cache_buffer) { memcpy(&ptr_job->buf[ptr_job->nb_trans], udd_ep_out_cache_buffer[ep_num - 1], ptr_job->buf_size % ep_size); } // Update number of data transfered ptr_job->nb_trans += nb_trans; if (ptr_job->nb_trans > ptr_job->buf_size) { ptr_job->nb_trans = ptr_job->buf_size; } // If all previous data requested are received and user buffer not full // then need to receive other data if ((nb_trans == udd_udesc_get_buf0_size(ep_num)) && (ptr_job->nb_trans != ptr_job->buf_size)) { next_trans = ptr_job->buf_size - ptr_job->nb_trans; if (UDD_ENDPOINT_MAX_TRANS < next_trans) { // The USB hardware support a maximum transfer size // of UDD_ENDPOINT_MAX_TRANS Bytes next_trans = UDD_ENDPOINT_MAX_TRANS - (UDD_ENDPOINT_MAX_TRANS % ep_size); } else { next_trans -= next_trans % ep_size; } udd_udesc_rst_buf0_ctn(ep_num); if (next_trans < ep_size) { // Use the cache buffer for Bulk or Interrupt size endpoint ptr_job->b_use_out_cache_buffer = true; udd_udesc_set_buf0_addr(ep_num, udd_ep_out_cache_buffer[ep_num-1]); udd_udesc_set_buf0_size(ep_num, ep_size); } else { // Link the user buffer directly on USB hardware DMA udd_udesc_set_buf0_addr(ep_num, &ptr_job->buf[ptr_job->nb_trans]); udd_udesc_set_buf0_size(ep_num, next_trans); } // Start transfer udd_disable_busy_bank0(ep_num); // Enable interrupt flags = cpu_irq_save(); udd_enable_out_received_interrupt(ep_num); udd_enable_endpoint_interrupt(ep_num); cpu_irq_restore(flags); return; } } // Job complete then call callback ptr_job->busy = false; if (NULL != ptr_job->call_trans) { ptr_job->call_trans(UDD_EP_TRANSFER_OK, ptr_job->nb_trans, ep); } return; }
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback) { uint16_t ep_size, trans_size, short_packet; bool b_dir_in; udd_ep_job_t *ptr_job; irqflags_t flags; b_dir_in = (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)); ep &= USB_EP_ADDR_MASK; if (USB_DEVICE_MAX_EP < ep) return false; // Get job about endpoint ptr_job = &udd_ep_job[ep - 1]; if ((!Is_udd_endpoint_enabled(ep)) || Is_udd_endpoint_stall_requested(ep)) return false; // Endpoint is halted flags = cpu_irq_save(); if (ptr_job->busy == true) { cpu_irq_restore(flags); return false; // Job already on going } ptr_job->busy = true; cpu_irq_restore(flags); // No job running. Let's setup a new one. // // The USB hardware support a maximum transfer size of 0x7FFF Bytes ep_size = udd_get_endpoint_size(ep); if (0x7FFF < buf_size) { trans_size = 0x7FFF - (0x7FFF % ep_size); short_packet = 0; } else { trans_size = buf_size; short_packet = trans_size % ep_size; } if (b_dir_in) { // Need ZLP, if requested and last packet is not a short packet udd_udesc_set_buf0_autozlp(ep, b_shortpacket); udd_udesc_set_buf0_ctn(ep, trans_size); udd_udesc_rst_buf0_size(ep); // Link the user buffer directly on USB hardware DMA udd_udesc_set_buf0_addr(ep, buf); } else { udd_udesc_rst_buf0_ctn(ep); ptr_job->nb_trans = 0; if (trans_size < ep_size) { // The user buffer is smaller than endpoint size if (AVR32_USBC_PTYPE_ISOCHRONOUS == udd_get_endpoint_type(ep)) { ptr_job->busy = false; return false; // The user must use a buffer corresponding at isochrnous endpoint size } // Use the cache buffer for Bulk or Interrupt size endpoint ptr_job->b_use_out_cache_buffer = true; udd_udesc_set_buf0_addr(ep, udd_ep_out_cache_buffer[ep - 1]); udd_udesc_set_buf0_size(ep, ep_size); } else { // Link the user buffer directly on USB hardware DMA ptr_job->b_use_out_cache_buffer = false; udd_udesc_set_buf0_addr(ep, buf); udd_udesc_set_buf0_size(ep, trans_size - short_packet); } } // Update Job information ptr_job->buf = buf; ptr_job->buf_size = trans_size; ptr_job->call_trans = callback; ptr_job->busy = true; // Start transfer udd_disable_busy_bank0(ep); // Enable interrupt flags = cpu_irq_save(); if (b_dir_in) { udd_ack_fifocon(ep); udd_ack_in_send(ep); udd_enable_in_send_interrupt(ep); } else { udd_enable_out_received_interrupt(ep); } udd_enable_endpoint_interrupt(ep); cpu_irq_restore(flags); return true; }