/*******************************************************************************
* Function Name : SCU_GetRCLKFreqValue
* Description : Gets the current RCLK frequency
* Input : None
* Output : None
* Return : RCLK frequency (KHz)
*******************************************************************************/
u32 SCU_GetRCLKFreqValue(void)
{
u8 RCLK_Div;
RCLK_Div = (SCU->CLKCNTR&0x1C)>>2;
if (RCLK_Div==0x5) RCLK_Div=10;
return (u32)(SCU_GetMCLKFreqValue() >>RCLK_Div);
}
/*******************************************************************************
* Function Name : UART_Init
* Description : Initializes the UARTx peripheral according to the specified
* parameters in the UART_InitStruct .
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
* - UART_InitStruct: pointer to a UART_InitTypeDef structure
* that contains the configuration information for the
* specified UART peripheral.
* Output : None
* Return : None
*******************************************************************************/
void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
{
u64 UART_MainClock = 0;
u32 IntegerDivider = 0;
u32 FractionalDivider = 0;
/* Clear the LCR[6:5] bits */
UARTx->LCR &= UART_WordLength_Mask;
/* Set the LCR[6:5] bits according to UART_WordLength value */
UARTx->LCR |= UART_InitStruct->UART_WordLength;
/* Choose Stop Bits */
if(UART_InitStruct->UART_StopBits == UART_StopBits_2)
{
/* 2 Stop Bit */
UARTx->LCR |= UART_StopBits_2;
}
else
{
/* One Stop Bits */
UARTx->LCR &= UART_StopBits_1;
}
/* Configure the Parity */
/* Clear the LCR[7]and LCR[2:1] bits */
UARTx->LCR &= UART_Parity_Mask;
/* Set the LCR[7]and LCR[2:1] bits according to UART_Parity value */
UARTx->LCR |= UART_InitStruct->UART_Parity;
/* Configure the BaudRate */
UART_MainClock = (SCU_GetMCLKFreqValue())*1000;
if((SCU->CLKCNTR & 0x200) != 0x200)
{
UART_MainClock = UART_MainClock/2;
}
/* Determine the integer part */
IntegerDivider = ((100) * (UART_MainClock) / (16 * (UART_InitStruct->UART_BaudRate)));
UARTx->IBRD = IntegerDivider / 100;
/* Determine the fractional part */
FractionalDivider = IntegerDivider - (100 * (UARTx->IBRD));
UARTx->FBRD = ((((FractionalDivider * 64) + 50) / 100));
/* Choose the Hardware Flow Control */
/* Clear the CR[15:14] bits */
UARTx->CR &= UART_HardwareFlowControl_Mask;
/* Set the CR[15:14] bits according to UART_HardwareFlowControl value */
UARTx->CR |= UART_InitStruct->UART_HardwareFlowControl;
/* Configure the UART mode */
/* Clear the CR[9:8] bits */
UARTx->CR &= UART_Mode_Mask;
/* Set the CR[9:8] bits according to UART_Mode value */
UARTx->CR |= UART_InitStruct->UART_Mode;
/* Enable or disable the FIFOs */
/* Set the FIFOs Levels */
if(UART_InitStruct->UART_FIFO == UART_FIFO_Enable)
{
/* Enable the FIFOs */
UARTx->LCR |= UART_FIFO_Enable;
/* Clear TXIFLSEL and RXIFLSEL bits */
UARTx->IFLS &= UART_TxRxFIFOLevel_Mask;
/* Set RXIFLSEL bits according to UART_RxFIFOLevel value */
UARTx->IFLS |= (UART_InitStruct->UART_RxFIFOLevel << 3);
/* Set TXIFLSEL bits according to UART_TxFIFOLevel value */
UARTx->IFLS |= UART_InitStruct->UART_TxFIFOLevel;
}
else
{
/* Disable the FIFOs */
UARTx->LCR &= UART_FIFO_Disable;
}
}
