/**Function*************************************************************
Synopsis [Convert TT to GIA via DSD.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Dsm_ManTruthToGia( void * p, word * pTruth, Vec_Int_t * vLeaves, Vec_Int_t * vCover )
{
int fUseMuxes = 0;
int fDelayBalance = 1;
Gia_Man_t * pGia = (Gia_Man_t *)p;
int nSizeNonDec;
char pDsd[1000];
m_Calls++;
assert( Vec_IntSize(vLeaves) <= DAU_DSD_MAX_VAR );
// collect delay information
if ( fDelayBalance && fUseMuxes )
{
int i, iLit, pVarLevels[DAU_DSD_MAX_VAR];
Vec_IntForEachEntry( vLeaves, iLit, i )
pVarLevels[i] = Gia_ObjLevelId( pGia, Abc_Lit2Var(iLit) );
nSizeNonDec = Dau_DsdDecomposeLevel( pTruth, Vec_IntSize(vLeaves), fUseMuxes, 1, pDsd, pVarLevels );
}
else
nSizeNonDec = Dau_DsdDecompose( pTruth, Vec_IntSize(vLeaves), fUseMuxes, 1, pDsd );
if ( nSizeNonDec )
m_NonDsd++;
// printf( "%s\n", pDsd );
if ( fDelayBalance )
return Dau_DsdToGia( pGia, pDsd, Vec_IntArray(vLeaves), vCover );
else
return Dau_DsdToGia2( pGia, pDsd, Vec_IntArray(vLeaves), vCover );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Sat_ProofResolve( Vec_Vec_t * vClauses, int Result, int Clause1, int Clause2 )
{
Vec_Int_t * vResult = Vec_VecEntry( vClauses, Result );
Vec_Int_t * vClause1 = Vec_VecEntry( vClauses, Clause1 );
Vec_Int_t * vClause2 = Vec_VecEntry( vClauses, Clause2 );
int Entry1, Entry2, ResVar;
int i, j, Counter = 0;
Vec_IntForEachEntry( vClause1, Entry1, i )
Vec_IntForEachEntry( vClause2, Entry2, j )
if ( Entry1 == -Entry2 )
{
ResVar = Entry1;
Counter++;
}
if ( Counter != 1 )
{
printf( "Error: Clause %d = Resolve(%d, %d): The number of pivot vars is %d.\n",
Result, Clause1, Clause2, Counter );
Sat_PrintClause( vClauses, Clause1 );
Sat_PrintClause( vClauses, Clause2 );
return 0;
}
// create new clause
assert( Vec_IntSize(vResult) == 0 );
Vec_IntForEachEntry( vClause1, Entry1, i )
if ( Entry1 != ResVar && Entry1 != -ResVar )
Vec_IntPushUnique( vResult, Entry1 );
assert( Vec_IntSize(vResult) + 1 == Vec_IntSize(vClause1) );
Vec_IntForEachEntry( vClause2, Entry2, i )
if ( Entry2 != ResVar && Entry2 != -ResVar )
Vec_IntPushUnique( vResult, Entry2 );
return 1;
}
static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pObj )
{
Vec_Int_t * vId2Vars = p->pvId2Vars + Aig_ObjId(pObj);
assert( p->pCnf2->pObj2Count[Aig_ObjId(pObj)] >= 0 );
if ( Vec_IntSize(vId2Vars) == 0 )
Vec_IntGrow(vId2Vars, 2 * k + 1);
if ( Vec_IntGetEntry(vId2Vars, k) == 0 )
{
sat_solver * pSat = Pdr_ManSolver(p, k);
Vec_Int_t * vVar2Ids = (Vec_Int_t *)Vec_PtrEntry(&p->vVar2Ids, k);
int iVarNew = Vec_IntSize( vVar2Ids );
assert( iVarNew > 0 );
Vec_IntPush( vVar2Ids, Aig_ObjId(pObj) );
Vec_IntWriteEntry( vId2Vars, k, iVarNew << 2 );
sat_solver_setnvars( pSat, iVarNew + 1 );
if ( k == 0 && Saig_ObjIsLo(p->pAig, pObj) ) // initialize the register output
{
int Lit = toLitCond( iVarNew, 1 );
int RetValue = sat_solver_addclause( pSat, &Lit, &Lit + 1 );
assert( RetValue == 1 );
(void) RetValue;
sat_solver_compress( pSat );
}
}
return Vec_IntEntry( vId2Vars, k );
}
void Gia_ManPrintTents( Gia_Man_t * p )
{
Vec_Int_t * vObjs;
Gia_Obj_t * pObj;
int t, i, iObjId, nSizePrev, nSizeCurr;
assert( Gia_ManPoNum(p) > 0 );
vObjs = Vec_IntAlloc( 100 );
// save constant class
Gia_ManIncrementTravId( p );
Gia_ObjSetTravIdCurrent( p, Gia_ManConst0(p) );
Vec_IntPush( vObjs, 0 );
// create starting root
nSizePrev = Vec_IntSize(vObjs);
Gia_ManForEachPo( p, pObj, i )
Gia_ManPrintTents_rec( p, pObj, vObjs );
// build tents
printf( "Tents: " );
for ( t = 1; nSizePrev < Vec_IntSize(vObjs); t++ )
{
nSizeCurr = Vec_IntSize(vObjs);
Vec_IntForEachEntryStartStop( vObjs, iObjId, i, nSizePrev, nSizeCurr )
if ( Gia_ObjIsRo(p, Gia_ManObj(p, iObjId)) )
Gia_ManPrintTents_rec( p, Gia_ObjRoToRi(p, Gia_ManObj(p, iObjId)), vObjs );
printf( "%d=%d ", t, nSizeCurr - nSizePrev );
nSizePrev = nSizeCurr;
}
printf( " Unused=%d\n", Gia_ManObjNum(p) - Vec_IntSize(vObjs) );
Vec_IntFree( vObjs );
// the remaining objects are PIs without fanout
// Gia_ManForEachObj( p, pObj, i )
// if ( !Gia_ObjIsTravIdCurrent(p, pObj) )
// Gia_ObjPrint( p, pObj );
}
static inline int Gia_ObjCheckMffc( Gia_Man_t * p, Gia_Obj_t * pRoot, int Limit, Vec_Int_t * vNodes, Vec_Int_t * vLeaves, Vec_Int_t * vInners )
{
int RetValue, iObj, i;
Vec_IntClear( vNodes );
RetValue = Gia_ObjCheckMffc_rec( p, pRoot, Limit, vNodes );
if ( RetValue )
{
Vec_IntClear( vLeaves );
Vec_IntClear( vInners );
Vec_IntSort( vNodes, 0 );
Vec_IntForEachEntry( vNodes, iObj, i )
if ( Gia_ObjRefNumId(p, iObj) > 0 || Gia_ObjIsCi(Gia_ManObj(p, iObj)) )
{
if ( !Vec_IntSize(vLeaves) || Vec_IntEntryLast(vLeaves) != iObj )
Vec_IntPush( vLeaves, iObj );
}
else
{
if ( !Vec_IntSize(vInners) || Vec_IntEntryLast(vInners) != iObj )
Vec_IntPush( vInners, iObj );
}
Vec_IntPush( vInners, Gia_ObjId(p, pRoot) );
}
Vec_IntForEachEntry( vNodes, iObj, i )
Gia_ObjRefIncId( p, iObj );
return RetValue;
}
/**Function*************************************************************
Synopsis [Implements the retiming on the sequential AIG.]
Description [Split the retiming into forward and backward.]
SideEffects []
SeeAlso []
***********************************************************************/
int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose )
{
Vec_Int_t * vSteps;
Vec_Ptr_t * vMoves;
int RetValue;
// forward retiming
vSteps = Abc_NtkUtilRetimingSplit( vLags, 1 );
// translate each set of steps into moves
if ( fVerbose )
printf( "The number of forward steps = %6d.\n", Vec_IntSize(vSteps) );
vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 1 );
if ( fVerbose )
printf( "The number of forward moves = %6d.\n", Vec_PtrSize(vMoves) );
// implement this retiming
Seq_NtkImplementRetimingForward( pNtk, vMoves );
Vec_IntFree( vSteps );
Vec_PtrFree( vMoves );
// backward retiming
vSteps = Abc_NtkUtilRetimingSplit( vLags, 0 );
// translate each set of steps into moves
if ( fVerbose )
printf( "The number of backward steps = %6d.\n", Vec_IntSize(vSteps) );
vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 0 );
if ( fVerbose )
printf( "The number of backward moves = %6d.\n", Vec_PtrSize(vMoves) );
// implement this retiming
RetValue = Seq_NtkImplementRetimingBackward( pNtk, vMoves, fVerbose );
Vec_IntFree( vSteps );
Vec_PtrFree( vMoves );
return RetValue;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManTisPrintMffc( Gia_Man_t * p, int Id, Vec_Int_t * vMffc, Vec_Int_t * vLeaves )
{
Gia_Obj_t * pObj;
int i;
printf( "MFFC %d has %d nodes and %d leaves:\n", Id, Vec_IntSize(vMffc), Vec_IntSize(vLeaves) );
Gia_ManForEachObjVecReverse( vMffc, p, pObj, i )
{
printf( "Node %2d : ", Vec_IntSize(vMffc) - 1 - i );
Gia_ObjPrint( p, pObj );
}
/**Function*************************************************************
Synopsis [Saves variables corresponding to latch outputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int * Fra_ClauCreateMapping( Vec_Int_t * vSatVarsFrom, Vec_Int_t * vSatVarsTo, int nVarsMax )
{
int * pMapping, Var, i;
assert( Vec_IntSize(vSatVarsFrom) == Vec_IntSize(vSatVarsTo) );
pMapping = ABC_ALLOC( int, nVarsMax );
for ( i = 0; i < nVarsMax; i++ )
pMapping[i] = -1;
Vec_IntForEachEntry( vSatVarsFrom, Var, i )
pMapping[Var] = Vec_IntEntry(vSatVarsTo,i);
return pMapping;
}
/**Function*************************************************************
Synopsis [Load CNF for the cone.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Bmc_LoadGetSatVar( Bmc_Load_t * p, int Id )
{
Gia_Obj_t * pObj = Gia_ManObj( p->pGia, Id );
if ( pObj->Value == 0 )
{
pObj->Value = Vec_IntSize( p->vSat2Id );
Vec_IntPush( p->vSat2Id, Id );
sat_solver_setnvars( p->pSat, Vec_IntSize(p->vSat2Id) );
}
return pObj->Value;
}
/**Function*************************************************************
Synopsis [Splits off second half and returns it as a new vector.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static Vec_Int_t * Vec_IntSplitHalf( Vec_Int_t * vVec )
{
Vec_Int_t * vPart;
int Entry, i;
assert( Vec_IntSize(vVec) > 1 );
vPart = Vec_IntAlloc( Vec_IntSize(vVec) / 2 + 1 );
Vec_IntForEachEntryStart( vVec, Entry, i, Vec_IntSize(vVec) / 2 )
Vec_IntPush( vPart, Entry );
Vec_IntShrink( vVec, Vec_IntSize(vVec) / 2 );
return vPart;
}
void Prs_ManWriteVerilogArray2( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs )
{
int i, FormId, ActSig;
assert( Vec_IntSize(vSigs) % 2 == 0 );
Vec_IntForEachEntryDouble( vSigs, FormId, ActSig, i )
{
fprintf( pFile, "." );
fprintf( pFile, "%s", Prs_NtkStr(p, FormId) );
fprintf( pFile, "(" );
Prs_ManWriteVerilogSignal( pFile, p, ActSig );
fprintf( pFile, ")%s", (i == Vec_IntSize(vSigs) - 2) ? "" : ", " );
}
/**Function*************************************************************
Synopsis [Solve the enumeration problem.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Bmc_EcoSolve( sat_solver * pSat, int Root, Vec_Int_t * vVars )
{
int nBTLimit = 1000000;
Vec_Int_t * vLits = Vec_IntAlloc( Vec_IntSize(vVars) );
int status, i, Div, iVar, nFinal, * pFinal, nIter = 0, RetValue = 0;
int pLits[2], nVars = sat_solver_nvars( pSat );
sat_solver_setnvars( pSat, nVars + 1 );
pLits[0] = Abc_Var2Lit( Root, 0 ); // F = 1
pLits[1] = Abc_Var2Lit( nVars, 0 ); // iNewLit
while ( 1 )
{
// find onset minterm
status = sat_solver_solve( pSat, pLits, pLits + 2, nBTLimit, 0, 0, 0 );
if ( status == l_Undef )
{ RetValue = -1; break; }
if ( status == l_False )
{ RetValue = 1; break; }
assert( status == l_True );
// collect divisor literals
Vec_IntClear( vLits );
Vec_IntPush( vLits, Abc_LitNot(pLits[0]) ); // F = 0
Vec_IntForEachEntry( vVars, Div, i )
Vec_IntPush( vLits, sat_solver_var_literal(pSat, Div) );
// check against offset
status = sat_solver_solve( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits), nBTLimit, 0, 0, 0 );
if ( status == l_Undef )
{ RetValue = -1; break; }
if ( status == l_True )
break;
assert( status == l_False );
// compute cube and add clause
nFinal = sat_solver_final( pSat, &pFinal );
Vec_IntClear( vLits );
Vec_IntPush( vLits, Abc_LitNot(pLits[1]) ); // NOT(iNewLit)
printf( "Cube %d : ", nIter );
for ( i = 0; i < nFinal; i++ )
{
if ( pFinal[i] == pLits[0] )
continue;
Vec_IntPush( vLits, pFinal[i] );
iVar = Vec_IntFind( vVars, Abc_Lit2Var(pFinal[i]) ); assert( iVar >= 0 );
printf( "%s%d ", Abc_LitIsCompl(pFinal[i]) ? "+":"-", iVar );
}
printf( "\n" );
status = sat_solver_addclause( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits) );
assert( status );
nIter++;
}
// assert( status == l_True );
Vec_IntFree( vLits );
return RetValue;
}
void Wlc_ObjAddFanins( Wlc_Ntk_t * p, Wlc_Obj_t * pObj, Vec_Int_t * vFanins )
{
assert( pObj->nFanins == 0 );
pObj->nFanins = Vec_IntSize(vFanins);
if ( Wlc_ObjHasArray(pObj) )
pObj->pFanins[0] = (int *)Mem_FlexEntryFetch( p->pMemFanin, Vec_IntSize(vFanins) * sizeof(int) );
memcpy( Wlc_ObjFanins(pObj), Vec_IntArray(vFanins), sizeof(int) * Vec_IntSize(vFanins) );
// special treatment of CONST, SELECT and TABLE
if ( pObj->Type == WLC_OBJ_CONST )
pObj->nFanins = 0;
else if ( pObj->Type == WLC_OBJ_BIT_SELECT || pObj->Type == WLC_OBJ_TABLE )
pObj->nFanins = 1;
}
void Cba_NtkObjOrder( Cba_Ntk_t * p, Vec_Int_t * vObjs, Vec_Int_t * vNameIds )
{
char Buffer[1000], * pName;
Vec_Ptr_t * vNames;
int i, iObj;
if ( Vec_IntSize(vObjs) < 2 )
return;
vNames = Vec_PtrAlloc( Vec_IntSize(vObjs) );
Vec_IntForEachEntry( vObjs, iObj, i )
{
char * pTypeName = Cba_NtkTypeName( p, Cba_ObjType(p, iObj) );
char * pInstName = vNameIds ? Cba_NtkStr(p, Vec_IntEntry(vNameIds, i)) : Cba_ObjNameStr(p, iObj);
sprintf( Buffer, "%s_%s_%d", pTypeName, pInstName, iObj );
Vec_PtrPush( vNames, Abc_UtilStrsav(Buffer) );
}
// pProgress = Bar_ProgressStart( stdout, Aig_ManCoNum(p) );
Aig_ManForEachCo( p, pObj, i )
{
// Bar_ProgressUpdate( pProgress, i, NULL );
// get old supports
vSup = Vec_VecEntryInt( vSupps, i );
if ( Vec_IntSize(vSup) < 2 )
continue;
// compute new supports
CountOver = CountQuant = 0;
vSupNew = Vec_IntDup( vSup );
// go through the nodes where the first var appears
Aig_ManForEachCo( p, pObj, k )
// iVar = Vec_IntEntry( vSup, 0 );
// vSupIn = Vec_VecEntry( vSuppsIn, iVar );
// Vec_IntForEachEntry( vSupIn, Entry, k )
{
// pObj = Aig_ManObj( p, Entry );
// get support of this output
// vSup2 = (Vec_Int_t *)pObj->pNext;
vSup2 = Vec_VecEntryInt( vSupps, k );
// count the number of common vars
nCommon = Vec_IntTwoCountCommon(vSup, vSup2);
if ( nCommon < 2 )
continue;
if ( nCommon > nComLim )
{
vSupNew = Vec_IntTwoMerge( vTemp = vSupNew, vSup2 );
Vec_IntFree( vTemp );
CountOver++;
}
else
CountQuant++;
}
/**Function*************************************************************
Synopsis [Establishes relationship between nodes using pairing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
{
Aig_Obj_t * pObj0, * pObj1;
int i;
// create matching
Aig_ManCleanData( p0 );
Aig_ManCleanData( p1 );
for ( i = 0; i < Vec_IntSize(vPairs); i += 2 )
{
pObj0 = Aig_ManObj( p0, Vec_IntEntry(vPairs, i) );
pObj1 = Aig_ManObj( p1, Vec_IntEntry(vPairs, i+1) );
assert( pObj0->pData == NULL );
assert( pObj1->pData == NULL );
pObj0->pData = pObj1;
pObj1->pData = pObj0;
}
// make sure constants are matched
pObj0 = Aig_ManConst1( p0 );
pObj1 = Aig_ManConst1( p1 );
assert( pObj0->pData == pObj1 );
assert( pObj1->pData == pObj0 );
// make sure PIs are matched
Saig_ManForEachPi( p0, pObj0, i )
{
pObj1 = Aig_ManPi( p1, i );
assert( pObj0->pData == pObj1 );
assert( pObj1->pData == pObj0 );
}
/**Function*************************************************************
Synopsis [Duplicates while ORing the POs of sequential circuit.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs )
{
Aig_Man_t * pAigNew;
Aig_Obj_t * pObj, * pObj2, * pMiter;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Aig_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
Aig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create POs
assert( Vec_IntSize(vPairs) % 2 == 0 );
Aig_ManForEachNodeVec( pAig, vPairs, pObj, i )
{
pObj2 = Aig_ManObj( pAig, Vec_IntEntry(vPairs, ++i) );
pMiter = Aig_Exor( pAigNew, (Aig_Obj_t *)pObj->pData, (Aig_Obj_t *)pObj2->pData );
pMiter = Aig_NotCond( pMiter, pObj->fPhase ^ pObj2->fPhase );
Aig_ObjCreatePo( pAigNew, pMiter );
}
/**Function*************************************************************
Synopsis [Expands cubes against the offset given as an AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_ObjExpandCubesTry( Vec_Str_t * vSop, sat_solver * pSat, Vec_Int_t * vVars )
{
extern int Bmc_CollapseExpandRound( sat_solver * pSat, sat_solver * pSatOn, Vec_Int_t * vLits, Vec_Int_t * vNums, Vec_Int_t * vTemp, int nBTLimit, int fCanon, int fOnOffSetLit );
char * pCube, * pSop = Vec_StrArray(vSop);
int nCubes = Abc_SopGetCubeNum(pSop);
int nVars = Abc_SopGetVarNum(pSop);
Vec_Int_t * vLits = Vec_IntAlloc( nVars );
Vec_Int_t * vTemp = Vec_IntAlloc( nVars );
assert( nVars == Vec_IntSize(vVars) );
assert( Vec_StrSize(vSop) == nCubes * (nVars + 3) + 1 );
Bmc_SopForEachCube( pSop, nVars, pCube )
{
int k, Entry;
// collect literals and clean cube
Vec_IntFill( vLits, nVars, -1 );
for ( k = 0; k < nVars; k++ )
{
if ( pCube[k] == '-' )
continue;
Vec_IntWriteEntry( vLits, k, Abc_Var2Lit(Vec_IntEntry(vVars, k), pCube[k] == '0') );
pCube[k] = '-';
}
// expand cube
Bmc_CollapseExpandRound( pSat, NULL, vLits, NULL, vTemp, 0, 0, -1 );
// insert literals
Vec_IntForEachEntry( vLits, Entry, k )
if ( Entry != -1 )
pCube[k] = '1' - Abc_LitIsCompl(Entry);
}
/**Function*************************************************************
Synopsis [Create cube with singleton variables.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Llb_NonlinCreateCube1( Llb_Mgr_t * p, Llb_Prt_t * pPart )
{
DdNode * bCube, * bTemp;
Llb_Var_t * pVar;
int i, TimeStop;
TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
bCube = Cudd_ReadOne(p->dd); Cudd_Ref( bCube );
Llb_PartForEachVar( p, pPart, pVar, i )
{
assert( Vec_IntSize(pVar->vParts) > 0 );
if ( Vec_IntSize(pVar->vParts) != 1 )
continue;
assert( Vec_IntEntry(pVar->vParts, 0) == pPart->iPart );
bCube = Cudd_bddAnd( p->dd, bTemp = bCube, Cudd_bddIthVar(p->dd, pVar->iVar) ); Cudd_Ref( bCube );
Cudd_RecursiveDeref( p->dd, bTemp );
}
Gia_Man_t * Gia_ManDomDerive( Gia_Man_t * p, Gia_Obj_t * pRoot, Vec_Int_t * vSupp, int nVars )
{
Gia_Man_t * pNew, * pTemp;
int nMints = 1 << nVars;
int i, m, iResLit;
assert( nVars >= 0 && nVars <= 5 );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Gia_ManConst0(p)->Value = 0;
Gia_ManHashAlloc( pNew );
for ( i = 0; i < Vec_IntSize(vSupp); i++ )
Gia_ManAppendCi(pNew);
for ( m = 0; m < nMints; m++ )
{
Gia_Obj_t * pObj;
Gia_ManIncrementTravId( p );
Gia_ManForEachObjVec( vSupp, p, pObj, i )
{
if ( i < nVars )
pObj->Value = (m >> i) & 1;
else
pObj->Value = Gia_ObjToLit(pNew, Gia_ManCi(pNew, i));
Gia_ObjSetTravIdCurrent( p, pObj );
}
iResLit = Gia_ManDomDerive_rec( pNew, p, pRoot );
Gia_ManAppendCo( pNew, iResLit );
}
Gia_Man_t * Gia_ManFromMiniAig( Mini_Aig_t * p )
{
Gia_Man_t * pGia, * pTemp;
Vec_Int_t * vCopies;
int i, iGiaLit, nNodes;
// get the number of nodes
nNodes = Mini_AigNodeNum(p);
// create ABC network
pGia = Gia_ManStart( nNodes );
pGia->pName = Abc_UtilStrsav( "MiniAig" );
// create mapping from MiniAIG objects into ABC objects
vCopies = Vec_IntAlloc( nNodes );
Vec_IntPush( vCopies, 0 );
// iterate through the objects
Gia_ManHashAlloc( pGia );
for ( i = 1; i < nNodes; i++ )
{
if ( Mini_AigNodeIsPi( p, i ) )
iGiaLit = Gia_ManAppendCi(pGia);
else if ( Mini_AigNodeIsPo( p, i ) )
iGiaLit = Gia_ManAppendCo(pGia, Gia_ObjFromMiniFanin0Copy(pGia, vCopies, p, i));
else if ( Mini_AigNodeIsAnd( p, i ) )
iGiaLit = Gia_ManHashAnd(pGia, Gia_ObjFromMiniFanin0Copy(pGia, vCopies, p, i), Gia_ObjFromMiniFanin1Copy(pGia, vCopies, p, i));
else assert( 0 );
Vec_IntPush( vCopies, iGiaLit );
}
Gia_ManHashStop( pGia );
assert( Vec_IntSize(vCopies) == nNodes );
Vec_IntFree( vCopies );
Gia_ManSetRegNum( pGia, Mini_AigRegNum(p) );
pGia = Gia_ManCleanup( pTemp = pGia );
Gia_ManStop( pTemp );
return pGia;
}
static inline int Agi_ManAppendCi( Agi_Man_t * p )
{
int iObj = Agi_ManAppendObj( p );
p->pObjs[iObj] = AGI_PI | (word)Vec_IntSize(&p->vCis);
Vec_IntPush( &p->vCis, iObj );
return Abc_Var2Lit( iObj, 0 ); // return lit
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Writing parser state into a file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Prs_ManWriteVerilogConcat( FILE * pFile, Prs_Ntk_t * p, int Con )
{
extern void Prs_ManWriteVerilogArray( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs, int Start, int Stop, int fOdd );
Vec_Int_t * vSigs = Prs_CatSignals(p, Con);
fprintf( pFile, "{" );
Prs_ManWriteVerilogArray( pFile, p, vSigs, 0, Vec_IntSize(vSigs), 0 );
fprintf( pFile, "}" );
}
/**Function*************************************************************
Synopsis [Derives CNF for the mapping.]
Description [The last argument shows the number of last outputs
of the manager, which will not be converted into clauses but the
new variables for which will be introduced.]
SideEffects []
SeeAlso []
***********************************************************************/
Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
{
Aig_Obj_t * pObj;
Cnf_Dat_t * pCnf;
Cnf_Cut_t * pCut;
Vec_Int_t * vCover, * vSopTemp;
int OutVar, PoVar, pVars[32], * pLits, ** pClas;
unsigned uTruth;
int i, k, nLiterals, nClauses, Cube, Number;
// count the number of literals and clauses
nLiterals = 1 + Aig_ManPoNum( p->pManAig ) + 3 * nOutputs;
nClauses = 1 + Aig_ManPoNum( p->pManAig ) + nOutputs;
Vec_PtrForEachEntry( vMapped, pObj, i )
{
assert( Aig_ObjIsNode(pObj) );
pCut = Cnf_ObjBestCut( pObj );
// positive polarity of the cut
if ( pCut->nFanins < 5 )
{
uTruth = 0xFFFF & *Cnf_CutTruth(pCut);
nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
assert( p->pSopSizes[uTruth] >= 0 );
nClauses += p->pSopSizes[uTruth];
}
else
{
nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[1], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[1]);
nClauses += Vec_IntSize(pCut->vIsop[1]);
}
// negative polarity of the cut
if ( pCut->nFanins < 5 )
{
uTruth = 0xFFFF & ~*Cnf_CutTruth(pCut);
nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
assert( p->pSopSizes[uTruth] >= 0 );
nClauses += p->pSopSizes[uTruth];
}
else
{
nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[0], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[0]);
nClauses += Vec_IntSize(pCut->vIsop[0]);
}
//printf( "%d ", nClauses-(1 + Aig_ManPoNum( p->pManAig )) );
}
void Cba_PrsWriteBlifArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
{
int FormId, NameId, i;
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntryDouble( vFanins, FormId, NameId, i )
fprintf( pFile, " %s=%s", Cba_NtkStr(p, FormId), Cba_NtkStr(p, NameId) );
fprintf( pFile, "\n" );
}
/**Function*************************************************************
Synopsis [Computes partitioning of registers.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManRegCreatePart( Gia_Man_t * p, Vec_Int_t * vPart, int * pnCountPis, int * pnCountRegs, int ** ppMapBack )
{
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
Vec_Int_t * vNodes, * vRoots;
int i, iOut, nCountPis, nCountRegs;
int * pMapBack;
// collect/mark nodes/PIs in the DFS order from the roots
Gia_ManIncrementTravId( p );
vRoots = Vec_IntAlloc( Vec_IntSize(vPart) );
Vec_IntForEachEntry( vPart, iOut, i )
Vec_IntPush( vRoots, Gia_ObjId(p, Gia_ManCo(p, Gia_ManPoNum(p)+iOut)) );
vNodes = Gia_ManCollectNodesCis( p, Vec_IntArray(vRoots), Vec_IntSize(vRoots) );
Vec_IntFree( vRoots );
// unmark register outputs
Vec_IntForEachEntry( vPart, iOut, i )
Gia_ObjSetTravIdPrevious( p, Gia_ManCi(p, Gia_ManPiNum(p)+iOut) );
// count pure PIs
nCountPis = nCountRegs = 0;
Gia_ManForEachPi( p, pObj, i )
nCountPis += Gia_ObjIsTravIdCurrent(p, pObj);
// count outputs of other registers
Gia_ManForEachRo( p, pObj, i )
nCountRegs += Gia_ObjIsTravIdCurrent(p, pObj); // should be !Gia_... ???
if ( pnCountPis )
*pnCountPis = nCountPis;
if ( pnCountRegs )
*pnCountRegs = nCountRegs;
// clean old manager
Gia_ManFillValue(p);
Gia_ManConst0(p)->Value = 0;
// create the new manager
pNew = Gia_ManStart( Vec_IntSize(vNodes) );
// create the PIs
Gia_ManForEachCi( p, pObj, i )
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
pObj->Value = Gia_ManAppendCi(pNew);
// add variables for the register outputs
// create fake POs to hold the register outputs
Vec_IntForEachEntry( vPart, iOut, i )
{
pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
pObj->Value = Gia_ManAppendCi(pNew);
Gia_ManAppendCo( pNew, pObj->Value );
Gia_ObjSetTravIdCurrent( p, pObj ); // added
}
void Cba_PrsWriteBlifNtk( FILE * pFile, Cba_Ntk_t * p )
{
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, ".model %s\n", Cba_NtkName(p) );
if ( Vec_IntSize(&p->vInouts) )
fprintf( pFile, ".inouts" );
if ( Vec_IntSize(&p->vInouts) )
Cba_PrsWriteBlifArray( pFile, p, &p->vInouts, 0 );
fprintf( pFile, ".inputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vInputs, 0 );
fprintf( pFile, ".outputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vOutputs, 0 );
// write objects
Cba_PrsWriteBlifLines( pFile, p );
fprintf( pFile, ".end\n\n" );
}
int Gia_Iso3Unique( Vec_Int_t * vSign )
{
int nUnique;
Vec_Int_t * vCopy = Vec_IntDup( vSign );
Vec_IntUniqify( vCopy );
nUnique = Vec_IntSize(vCopy);
Vec_IntFree( vCopy );
return nUnique;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Computes MFFCs of all qualifying nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ObjCheckMffc_rec( Gia_Man_t * p,Gia_Obj_t * pObj, int Limit, Vec_Int_t * vNodes )
{
int iFanin;
if ( Gia_ObjIsCi(pObj) )
return 1;
assert( Gia_ObjIsAnd(pObj) );
iFanin = Gia_ObjFaninId0p(p, pObj);
Vec_IntPush( vNodes, iFanin );
if ( !Gia_ObjRefDecId(p, iFanin) && (Vec_IntSize(vNodes) > Limit || !Gia_ObjCheckMffc_rec(p, Gia_ObjFanin0(pObj), Limit, vNodes)) )
return 0;
iFanin = Gia_ObjFaninId1p(p, pObj);
Vec_IntPush( vNodes, iFanin );
if ( !Gia_ObjRefDecId(p, iFanin) && (Vec_IntSize(vNodes) > Limit || !Gia_ObjCheckMffc_rec(p, Gia_ObjFanin1(pObj), Limit, vNodes)) )
return 0;
if ( !Gia_ObjIsMux(p, pObj) )
return 1;
iFanin = Gia_ObjFaninId2p(p, pObj);
Vec_IntPush( vNodes, iFanin );
if ( !Gia_ObjRefDecId(p, iFanin) && (Vec_IntSize(vNodes) > Limit || !Gia_ObjCheckMffc_rec(p, Gia_ObjFanin2(p, pObj), Limit, vNodes)) )
return 0;
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Wlc_NtkGetInv( Wlc_Ntk_t * pNtk, Vec_Int_t * vInv, Vec_Str_t * vSop, int fVerbose )
{
Wlc_Obj_t * pObj;
int i, k, nNum, nRange, nBits = 0;
Abc_Ntk_t * pMainNtk = NULL;
Abc_Obj_t * pMainObj, * pMainTemp;
char Buffer[5000];
// start the network
pMainNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
// duplicate the name and the spec
pMainNtk->pName = Extra_UtilStrsav(pNtk->pName);
// create primary inputs
Wlc_NtkForEachCi( pNtk, pObj, i )
{
if ( pObj->Type != WLC_OBJ_FO )
continue;
nRange = Wlc_ObjRange(pObj);
for ( k = 0; k < nRange; k++ )
{
nNum = Vec_IntEntry(vInv, nBits + k);
if ( nNum )
break;
}
if ( k == nRange )
{
nBits += nRange;
continue;
}
//printf( "%s[%d:%d] : ", Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), pObj->End, pObj->Beg );
for ( k = 0; k < nRange; k++ )
{
nNum = Vec_IntEntry( vInv, nBits + k );
if ( nNum == 0 )
continue;
//printf( " [%d] -> %d", k, nNum );
pMainObj = Abc_NtkCreatePi( pMainNtk );
sprintf( Buffer, "%s[%d]", Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), k );
Abc_ObjAssignName( pMainObj, Buffer, NULL );
}
//printf( "\n");
nBits += nRange;
}
//printf( "%d %d\n", Vec_IntSize(vInv), nBits );
assert( Vec_IntSize(vInv) == nBits );
// create node
pMainObj = Abc_NtkCreateNode( pMainNtk );
Abc_NtkForEachPi( pMainNtk, pMainTemp, i )
Abc_ObjAddFanin( pMainObj, pMainTemp );
pMainObj->pData = Abc_SopRegister( (Mem_Flex_t *)pMainNtk->pManFunc, Vec_StrArray(vSop) );
// create PO
pMainTemp = Abc_NtkCreatePo( pMainNtk );
Abc_ObjAddFanin( pMainTemp, pMainObj );
Abc_ObjAssignName( pMainTemp, "inv", NULL );
return pMainNtk;
}