int
init_platform()
{
#if __MICROBLAZE__ || __PPC__
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
#ifdef __arm__
if (Init_ScuTimer() != XST_SUCCESS) while(1);
SetupIntrSystem(&TimerInstance, TIMER_IRPT_INTR);
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
return 0;
}
int main(void)
{
int Status;
#ifdef XPAR_XUARTNS550_NUM_INSTANCES
XUartNs550_SetBaud(STDIN_BASEADDRESS, XPAR_XUARTNS550_CLOCK_HZ, 115200);
XUartNs550_mSetLineControlReg(STDIN_BASEADDRESS, XUN_LCR_8_DATA_BITS);
#endif
/*
* Call the Temac SGDMA interrupt example , specify the parameters generated
* in xparameters.h
*/
Status = TemacSgDmaIntrExample(&IntcInstance,
&TemacInstance,
&DmaInstance,
TEMAC_DEVICE_ID,
TEMAC_IRPT_INTR,
DMA_RX_IRPT_INTR, DMA_TX_IRPT_INTR);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Failure in Examples");
return XST_FAILURE;
}
TemacUtilErrorTrap("Success in Examples");
return XST_SUCCESS;
}
inline void xuart16550_init(void)
{
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(XLB_STDIO_BASEADDR, XLB_XILINX_UART16550_0_CLOCK_HZ,
XLB_STDIO_BAUDRATE);
XUartNs550_mSetLineControlReg(XLB_STDIO_BASEADDR, XUN_LCR_8_DATA_BITS);
}
int main (void)
{
CPU_INT08U err;
//printf("Stack addr is 0x%x - 0x%x", &FirstTaskStk[0], &FirstTaskStk[TASK_STK_SIZE - 1] );
BSP_IntDisAll();
OSInit(); /* Initialize uC/OS-II */
/* Initialize RS232_Uart_1 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_UART_1_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(XPAR_RS232_UART_1_BASEADDR, XUN_LCR_8_DATA_BITS);
//err = printf("Hello World\n");
OSTaskCreateExt(FirstTask,
(void *)0,
&FirstTaskStk[TASK_STK_SIZE - 1],
TASK1_ID,
TASK1_PRIO,
&FirstTaskStk[0],
TASK_STK_SIZE,
(void *)0,
OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
OSTaskNameSet(TASK1_PRIO, (CPU_INT08U *)"FirstTask", &err);
OSStart(); /* Start Multitasking */
return 0; /* Process should never reach this point */
}
void
init_uart()
{
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, UART_BAUD);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
}
/*
* This function setup the baudrate to 9600 and data bits to 8 in Uart16550
*
* @param None
*
* @return None
*
* @note None.
*
******************************************************************************/
static void Uart550_Setup(void)
{
XUartNs550_SetBaud(XPAR_UARTNS550_0_BASEADDR,
XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(XPAR_UARTNS550_0_BASEADDR,
XUN_LCR_8_DATA_BITS);
}
/**
* @brief init_uart() - Initialize UARTs
*/
void init_uart()
{
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ,
UART_BAUD);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
/* Bootrom/BSP configures PS7/PSU UART to 115200 bps */
}
/*
* This function setup the baudrate to 9600 and data bits to 8 in Uart16550
*
* @param None
*
* @return None
*
* @note None
*
******************************************************************************/
static void Uart550_Setup(void)
{
/* Set the baudrate to be predictable
*/
XUartNs550_SetBaud(XPAR_UARTNS550_0_BASEADDR,
XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(XPAR_UARTNS550_0_BASEADDR,
XUN_LCR_8_DATA_BITS);
}
void
init_platform()
{
enable_caches();
/* if we have a uart 16550, then that needs to be initialized */
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
}
void init_platform()
{
enable_caches();
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
}
/**
*
* This function does a minimal test on the UART device using the low-level
* driver macros and functions. This function sends data and expects to receive
* the data thru the UART. A physical loopback must be done by the user with the
* tranmit and receive signals of the UART.
*
* @param UartBaseAddress is the base address of the UARTNS550 device
* and is the XPAR_<UARTNS550_instance>_BASEADDR value from
* xparameters.h.
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful.
*
* @note None.
*
****************************************************************************/
int XUartNs550_LowLevelExample(u32 UartBaseAddress)
{
int Index;
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = Index + '0';
RecvBuffer[Index] = 0;
}
/*
* Set the baud rate and number of stop bits
*/
XUartNs550_SetBaud(UartBaseAddress, UART_CLOCK_HZ, UART_BAUDRATE);
XUartNs550_SetLineControlReg(UartBaseAddress, XUN_LCR_8_DATA_BITS);
/*
* Enable the FIFOs for 16550 mode since the defaults is NO FIFOs
*/
XUartNs550_WriteReg(UartBaseAddress, XUN_FCR_OFFSET, XUN_FIFO_ENABLE);
/*
* Send the entire transmit buffer
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
XUartNs550_SendByte(UartBaseAddress, SendBuffer[Index]);
}
/*
* Receive the entire buffer's worth. Note that the RecvByte function
* blocks waiting for a character
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
RecvBuffer[Index] = XUartNs550_RecvByte(UartBaseAddress);
}
/*
* Check the receive buffer data against the send buffer and verify the
* data was correctly received
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
if (SendBuffer[Index] != RecvBuffer[Index]) {
return XST_FAILURE;
}
}
return XST_SUCCESS;
}
void
init_uart()
{
#ifdef STDOUT_IS_PS7_UART
/* Use the PS UART for Zynq devices */
XUartPs Uart_Ps_0;
XUartPs_Config *Config_0 = XUartPs_LookupConfig(UART_DEVICE_ID);
XUartPs_CfgInitialize(&Uart_Ps_0, Config_0, Config_0->BaseAddress);
XUartPs_SetBaudRate(&Uart_Ps_0, UART_BAUD);
#elif defined(STDOUT_IS_16550)
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, UART_BAUD);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
}
int main(void)
{
int Status;
#ifdef XPAR_XUARTNS550_NUM_INSTANCES
XUartNs550_SetBaud(STDIN_BASEADDRESS, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDIN_BASEADDRESS, XUN_LCR_8_DATA_BITS);
#endif
#if XPAR_MICROBLAZE_USE_ICACHE
Xil_ICacheInvalidate();
Xil_ICacheEnable();
#endif
#if XPAR_MICROBLAZE_USE_DCACHE
Xil_DCacheInvalidate();
Xil_DCacheEnable();
#endif
AxiEthernetUtilErrorTrap("\r\n--- Enter main() ---");
AxiEthernetUtilErrorTrap("This test may take several minutes to finish");
/*
* Call the Axi Ethernet vlan example main function
*/
Status = AxiEthernetExtVlanExample(&IntcInstance,
&AxiEthernetInstance,
&DmaInstance,
AXIETHERNET_DEVICE_ID,
AXIDMA_DEVICE_ID,
AXIETHERNET_IRPT_INTR,
DMA_RX_IRPT_INTR,
DMA_TX_IRPT_INTR);
if (Status != XST_SUCCESS) {
AxiEthernetUtilErrorTrap("Failed test intr sgdma");
AxiEthernetUtilErrorTrap("--- Exiting main() ---");
return XST_FAILURE;
}
AxiEthernetUtilErrorTrap("Test passed");
AxiEthernetUtilErrorTrap("--- Exiting main() ---");
return XST_SUCCESS;
}
int
init_platform()
{
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
return 0;
}
void BSP_Init (void)
{
CPU_IntDis(); /* Disable all interrupts. */
Xil_ICacheEnable(); /* Enable the instruction cache. */
Xil_DCacheEnable(); /* Enable the Data cache. */
CSP_IntInit(); /* Initialize Interrupt controller module. */
#ifdef STDOUT_IS_PS7_UART
XUartPs Uart_Ps_0; /* Use the PS UART for Zynq devices. */
XUartPs_Config *Config_0;
Config_0 = XUartPs_LookupConfig(UART_DEVICE_ID);
XUartPs_CfgInitialize(&Uart_Ps_0, Config_0, Config_0->BaseAddress);
XUartPs_SetBaudRate(&Uart_Ps_0, 115200);
#elif defined(STDOUT_IS_16550)
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, UART_BAUD);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
}
int main (void) {
XUartNs550_SetBaud(UART_BASEADDR, UART_CLOCK, UART_BAUDRATE);
XUartNs550_SetLineControlReg(UART_BASEADDR, XUN_LCR_8_DATA_BITS);
xil_printf("\n\r********************************************************");
xil_printf("\n\r********************************************************");
xil_printf("\n\r** ML605 - UART Test **");
xil_printf("\n\r********************************************************");
xil_printf("\n\r********************************************************\r\n");
xil_printf("Testing UART\r\n");
xil_printf("%d,8,N,1\r\n", UART_BAUDRATE);
xil_printf("Hello world!\r\n");
xil_printf("UART Test Passed\r\n\r\n");
return_to_loader();
return 0;
}
int main (void) {
XCache_EnableICache(0x80000001);
XCache_EnableDCache(0x80000000);
/* Initialize RS232 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_mSetLineControlReg(XPAR_RS232_BASEADDR, XUN_LCR_8_DATA_BITS);
print("-- Entering main() --\r\n");
/*
* MemoryTest routine will not be run for the memory at
* 0x81000000 (FLASH_8Mx16)
* because it is a read-only memory
*/
/*
* MemoryTest routine will not be run for the memory at
* 0x00000000 (DDR_SDRAM_1)
* because it is being used to hold a part of this application program
*/
/*
* MemoryTest routine will not be run for the memory at
* 0xfffff000 (plb_bram_if_cntlr_1)
* because it is being used to hold a part of this application program
*/
print("-- Exiting main() --\r\n");
XCache_DisableDCache();
XCache_DisableICache();
return 0;
}
int
init_platform()
{
enable_caches();
/* if we have a uart 16550, then that needs to be initialized */
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
/* Get DMA configs */
ddc_dma_attr.AxiDmaConfig = XAxiDma_LookupConfig(BPM_DDC_DMA_DEV_ID);
fmc150_adc_dma_attr.AxiDmaConfig = XAxiDma_LookupConfig(BPM_ADC_DMA_DEV_ID);
// Initialize DMA engine
if(XAxiDma_CfgInitialize(&ddc_dma_attr.AxiDma, ddc_dma_attr.AxiDmaConfig) != XST_SUCCESS){
xil_printf("init_platform: Error initializing BPM DDC DMA\n");
return -1;
}
if(XAxiDma_CfgInitialize(&fmc150_adc_dma_attr.AxiDma, fmc150_adc_dma_attr.AxiDmaConfig) != XST_SUCCESS){
xil_printf("init_platform: Error initializing FMC150 ADC DMA\n");
return -1;
}
/* Enable DMA interrupts */
/*XAxiDma_IntrEnable(&ddc_dma_attr.AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DEVICE_TO_DMA);
XAxiDma_IntrEnable(&fmc150_adc_dma_attr.AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DEVICE_TO_DMA);
XAxiDma_Reset(&ddc_dma_attr.AxiDma);
XAxiDma_Reset(&fmc150_adc_dma_attr.AxiDma);*/
/*if(enable_ext_clk() < 0){
xil_printf("Error enabling ext_clk!\n");
return -1;
}*/
/* Init cdce72010 to FMC150 registers */
init_cdce72010();
/* Update delay accordingly to PLL output frequency */
//init_fmc150_delay();
/* Enable low (< 80MSPS)/hi(>80MSPS) speed for the ADS62P49
* depending on cdce72010 register values*/
init_ads62p49();
//write_fmc150_register(CHIPSELECT_ADS62P49, 0x020, 0x04);
/* Adjust ADC delay */
// For ADC sampling clock = 145.76 MHz
//if(update_fmc150_adc_delay(0x00, 0x18, 0x18) < 0){
// For ADC sampling clock = 122.88 MHz
//update_fmc150_adc_delay(0x00, 0x5, 0x5);
init_fmc150_delay();
if(check_mmcm_lock() < 0){
xil_printf("init_platform: Error trying to lock MMCM\n");
return -1;
}
xil_printf("init_platform: MMCM Locked!\n");
if(check_ext_lock() < 0){
xil_printf("init_platform: Error trying to lock PLL\n");
return -1;
}
xil_printf("init_platform: cdce72010 PLL Locked!\n");
//dump_cdce72010_regs();
#ifdef INIT_DEBUG
//calibrate_adc_delay();
#endif
return 0;
}
int main (void) {
static XIntc intc;
/*
* Enable and initialize cache
*/
#if XPAR_MICROBLAZE_0_USE_ICACHE
Xil_ICacheInvalidate();
Xil_ICacheEnable();
#endif
#if XPAR_MICROBLAZE_0_USE_DCACHE
Xil_DCacheInvalidate();
Xil_DCacheEnable();
#endif
static XLlTemac Hard_Ethernet_MAC_LlTemac;
static XLlDma Hard_Ethernet_MAC_LlDma;
/* Initialize RS232_Uart_1 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_UART_1_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(XPAR_RS232_UART_1_BASEADDR, XUN_LCR_8_DATA_BITS);
static XUartNs550 RS232_Uart_2_UartNs550;
static XTmrCtr xps_timer_0_Timer;
print("-- Entering main() --\r\n");
{
int status;
print("\r\n Running IntcSelfTestExample() for xps_intc_0...\r\n");
status = IntcSelfTestExample(XPAR_XPS_INTC_0_DEVICE_ID);
if (status == 0) {
print("IntcSelfTestExample PASSED\r\n");
}
else {
print("IntcSelfTestExample FAILED\r\n");
}
}
{
int Status;
Status = IntcInterruptSetup(&intc, XPAR_XPS_INTC_0_DEVICE_ID);
if (Status == 0) {
print("Intc Interrupt Setup PASSED\r\n");
}
else {
print("Intc Interrupt Setup FAILED\r\n");
}
}
{
u32 status;
print("\r\nRunning GpioOutputExample() for LEDs_8Bit...\r\n");
status = GpioOutputExample(XPAR_LEDS_8BIT_DEVICE_ID,8);
if (status == 0) {
print("GpioOutputExample PASSED.\r\n");
}
else {
print("GpioOutputExample FAILED.\r\n");
}
}
{
u32 status;
print("\r\nRunning GpioOutputExample() for LEDs_Positions...\r\n");
status = GpioOutputExample(XPAR_LEDS_POSITIONS_DEVICE_ID,5);
if (status == 0) {
print("GpioOutputExample PASSED.\r\n");
}
else {
print("GpioOutputExample FAILED.\r\n");
}
}
{
u32 status;
print("\r\nRunning GpioInputExample() for Push_Buttons_5Bit...\r\n");
u32 DataRead;
status = GpioInputExample(XPAR_PUSH_BUTTONS_5BIT_DEVICE_ID, &DataRead);
if (status == 0) {
xil_printf("GpioInputExample PASSED. Read data:0x%X\r\n", DataRead);
}
else {
print("GpioInputExample FAILED.\r\n");
}
}
{
u32 status;
print("\r\nRunning GpioInputExample() for DIP_Switches_8Bit...\r\n");
u32 DataRead;
status = GpioInputExample(XPAR_DIP_SWITCHES_8BIT_DEVICE_ID, &DataRead);
if (status == 0) {
xil_printf("GpioInputExample PASSED. Read data:0x%X\r\n", DataRead);
}
else {
print("GpioInputExample FAILED.\r\n");
}
}
{
int status;
print("\r\n Running IicSelfTestExample() for IIC_EEPROM...\r\n");
status = IicSelfTestExample(XPAR_IIC_EEPROM_DEVICE_ID);
if (status == 0) {
print("IicSelfTestExample PASSED\r\n");
}
else {
print("IicSelfTestExample FAILED\r\n");
}
}
/* TemacPolledExample does not support SGDMA
{
XStatus status;
print("\r\n Running TemacPolledExample() for Hard_Ethernet_MAC...\r\n");
status = TemacPolledExample( XPAR_HARD_ETHERNET_MAC_CHAN_0_DEVICE_ID,
);
if (status == 0) {
print("TemacPolledExample PASSED\r\n");
}
else {
print("TemacPolledExample FAILED\r\n");
}
}
*/
{
XStatus Status;
print("\r\nRunning TemacSgDmaIntrExample() for Hard_Ethernet_MAC...\r\n");
Status = TemacSgDmaIntrExample(&intc, &Hard_Ethernet_MAC_LlTemac,
&Hard_Ethernet_MAC_LlDma,
XPAR_HARD_ETHERNET_MAC_CHAN_0_DEVICE_ID,
XPAR_XPS_INTC_0_HARD_ETHERNET_MAC_TEMACINTC0_IRPT_INTR,
XPAR_LLTEMAC_0_LLINK_CONNECTED_DMARX_INTR,
XPAR_LLTEMAC_0_LLINK_CONNECTED_DMATX_INTR);
if (Status == 0) {
print("Temac Interrupt Test PASSED.\r\n");
}
else {
print("Temac Interrupt Test FAILED.\r\n");
}
}
{
int status;
print("\r\nRunning SysAceSelfTestExample() for SysACE_CompactFlash...\r\n");
status = SysAceSelfTestExample(XPAR_SYSACE_COMPACTFLASH_DEVICE_ID);
if (status == 0) {
print("SysAceSelfTestExample PASSED\r\n");
}
else {
print("SysAceSelfTestExample FAILED\r\n");
}
}
/*
* Peripheral SelfTest will not be run for RS232_Uart_1
* because it has been selected as the STDOUT device
*/
{
XStatus status;
print("\r\nRunning UartNs550SelfTestExample() for RS232_Uart_2...\r\n");
status = UartNs550SelfTestExample(XPAR_RS232_UART_2_DEVICE_ID);
if (status == 0) {
print("UartNs550SelfTestExample PASSED\r\n");
}
else {
print("UartNs550SelfTestExample FAILED\r\n");
}
}
{
XStatus Status;
print("\r\n Running Interrupt Test for RS232_Uart_2...\r\n");
Status = UartNs550IntrExample(&intc, &RS232_Uart_2_UartNs550, \
XPAR_RS232_UART_2_DEVICE_ID, \
XPAR_XPS_INTC_0_RS232_UART_2_IP2INTC_IRPT_INTR);
if (Status == 0) {
print("UartNs550 Interrupt Test PASSED\r\n");
}
else {
print("UartNs550 Interrupt Test FAILED\r\n");
}
}
{
int status;
print("\r\n Running TmrCtrSelfTestExample() for xps_timer_0...\r\n");
status = TmrCtrSelfTestExample(XPAR_XPS_TIMER_0_DEVICE_ID, 0x0);
if (status == 0) {
print("TmrCtrSelfTestExample PASSED\r\n");
}
else {
print("TmrCtrSelfTestExample FAILED\r\n");
}
}
{
int Status;
print("\r\n Running Interrupt Test for xps_timer_0...\r\n");
Status = TmrCtrIntrExample(&intc, &xps_timer_0_Timer, \
XPAR_XPS_TIMER_0_DEVICE_ID, \
XPAR_XPS_INTC_0_XPS_TIMER_0_INTERRUPT_INTR, 0);
if (Status == 0) {
print("Timer Interrupt Test PASSED\r\n");
}
else {
print("Timer Interrupt Test FAILED\r\n");
}
}
{
int status;
print("\r\nRunning UartLiteSelfTestExample() for mdm_0...\r\n");
status = UartLiteSelfTestExample(XPAR_MDM_0_DEVICE_ID);
if (status == 0) {
print("UartLiteSelfTestExample PASSED\r\n");
}
else {
print("UartLiteSelfTestExample FAILED\r\n");
}
}
/*
* Disable cache and reinitialize it so that other
* applications can be run with no problems
*/
#if XPAR_MICROBLAZE_0_USE_DCACHE
Xil_DCacheDisable();
Xil_DCacheInvalidate();
#endif
#if XPAR_MICROBLAZE_0_USE_ICACHE
Xil_ICacheDisable();
Xil_ICacheInvalidate();
#endif
print("-- Exiting main() --\r\n");
return 0;
}
int main(void)
{
int Status;
/*
* Enable and initialize cache
*/
#if !SIM
#if XPAR_MICROBLAZE_0_USE_ICACHE
microblaze_invalidate_icache();
microblaze_enable_icache();
#endif
#if XPAR_MICROBLAZE_0_USE_DCACHE
microblaze_invalidate_dcache();
microblaze_enable_dcache();
#endif
#endif
XUartNs550_SetBaud(UART_BASEADDR, UART_CLOCK, UART_BAUDRATE);
XUartNs550_SetLineControlReg(UART_BASEADDR, XUN_LCR_8_DATA_BITS);
xil_printf("\n\r********************************************************");
xil_printf("\n\r********************************************************");
xil_printf("\n\r** SP605 - Temac Test **");
xil_printf("\n\r********************************************************");
xil_printf("\n\r********************************************************\r\n");
printf("Setting Temac and DMA\r\n");
printf("\r\n");
/*
* Call the Temac SGDMA interrupt example , specify the parameters generated
* in xparameters.h
*/
Status = TemacSgDmaIntrExample(&IntcInstance,
&TemacInstance,
&DmaInstance,
TEMAC_DEVICE_ID,
TEMAC_IRPT_INTR,
DMA_RX_IRPT_INTR, DMA_TX_IRPT_INTR);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Failure in Examples");
return XST_FAILURE;
}
printf("Received Packet!\r\n");
printf("\r\n");
#if !SIM
#if XPAR_MICROBLAZE_0_USE_DCACHE
microblaze_disable_dcache();
microblaze_invalidate_dcache();
#endif
#if XPAR_MICROBLAZE_0_USE_ICACHE
microblaze_disable_icache();
microblaze_invalidate_icache();
#endif
#endif
return_to_loader();
return 0;
}
int main (void) {
XCache_EnableICache(0x80000001);
XCache_EnableDCache(0x80000001);
/* Initialize RS232 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_mSetLineControlReg(XPAR_RS232_BASEADDR, XUN_LCR_8_DATA_BITS);
print("-- Entering main() --\r\n");
/*
* MemoryTest routine will not be run for the memory at
* 0xffff0000 (xps_bram_if_cntlr_1)
* because it is being used to hold a part of this application program
*/
/*
* MemoryTest routine will not be run for the memory at
* 0x86000000 (FLASH_8Mx16)
* because it is a read-only memory
*/
/* Testing Memory (DDR2_SDRAM_16Mx32)*/
{
XStatus status;
print("Starting MemoryTest for DDR2_SDRAM_16Mx32:\r\n");
print(" Running 32-bit test...");
status = XUtil_MemoryTest32((Xuint32*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 1024, 0xAAAA5555, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
print(" Running 16-bit test...");
status = XUtil_MemoryTest16((Xuint16*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 2048, 0xAA55, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
print(" Running 8-bit test...");
status = XUtil_MemoryTest8((Xuint8*)XPAR_DDR2_SDRAM_16MX32_MEM_BASEADDR, 4096, 0xA5, XUT_ALLMEMTESTS);
if (status == XST_SUCCESS) {
print("PASSED!\r\n");
}
else {
print("FAILED!\r\n");
}
}
print("-- Exiting main() --\r\n");
XCache_DisableDCache();
XCache_DisableICache();
return 0;
}
int main()
{
SYSACE_FILE *srec_file;
char file_name[20];
char *p;
uint8_t ret;
int choice, bytes, total_bytes;
/* Set a well-known "return to loader" vector*/
set_ret_to_loader_vec();
/* Initialize RS232_Uart_1 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_UART_1_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ,
9600);
XUartNs550_SetLineControlReg(XPAR_RS232_UART_1_BASEADDR,
XUN_LCR_8_DATA_BITS);
print("\n\r********************************************************");
print("\n\r********************************************************");
print("\n\r** Xilinx Virtex-6 FPGA ML605 Evaluation Kit **");
print("\n\r********************************************************");
print("\n\r********************************************************\r\n");
do {
print("Choose Feature to Test:\r\n");
print("1: UART Test\r\n");
print("2: LED Test\r\n");
print("3: Timer Test\r\n");
print("4: FLASH Test\r\n");
print("5: IIC Test\r\n");
print("6: Ethernet Loopback Test\r\n");
print("7: Switch Test\r\n");
print("8: External Memory Test\r\n");
print("9: System Monitor Test\r\n");
print("A: PushButton Test\r\n");
print("B: LCD Test\r\n");
print("C: System ACE CF Test\r\n");
print("D: DVI/VGA Test\r\n");
choice = inbyte();
if (isalpha(choice)) {
choice = toupper(choice);
}
} while (!isdigit(choice) && (choice < 'A' || choice > 'D')) ;
xil_printf("%c\r\n", choice);
sprintf(file_name, "bist\\%c.rec", choice);
srec_file = sysace_fopen(file_name, "r");
if (srec_file == 0) {
printf("\r\nUnable to open %s\r\n", file_name);
return 1;
}
/*
* Read the SRECORDS in the selected file into RAM.
*/
flbuf = (char*)(XPAR_DDR3_SDRAM_MPMC_BASEADDR + 0x100000);
p = flbuf;
total_bytes = 0;
xil_printf("Reading SRECORDS from Compact Flash file %s:\r\n", file_name);
do {
bytes = sysace_fread(p, 1, 0x100000, srec_file);
p += bytes;
total_bytes += bytes;
} while (bytes > 0);
sysace_fclose(srec_file);
xil_printf("\r\n%d bytes read from file. SRECORDS at: 0x%x\r\n",
total_bytes, (unsigned)flbuf);
ret = load_exec ();
/* If we reach here, we are in error */
#ifdef VERBOSE
if (ret > LD_SREC_LINE_ERROR) {
print ("ERROR in SREC line: ");
putnum (srec_line);
print (errors[ret]);
} else {
print ("ERROR: ");
print (errors[ret]);
}
#endif
return ret;
}
int main()
{
uint8_t ret;
int choice;
//int bytes;
//int total_bytes;
/* Set a well-known "return to loader" vector*/
set_ret_to_loader_vec();
/* Initialize RS232_Uart_1 - Set baudrate and number of stop bits */
XUartNs550_SetBaud(XPAR_RS232_UART_1_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ,
9600);
XUartNs550_SetLineControlReg(XPAR_RS232_UART_1_BASEADDR,
XUN_LCR_8_DATA_BITS);
print("\n\r********************************************************");
print("\n\r********************************************************");
print("\n\r** Xilinx Virtex-6 FPGA ML605 Evaluation Kit **");
print("\n\r********************************************************");
print("\n\r********************************************************\r\n");
do {
print("Choose Feature to Test:\r\n");
print("1: UART Test\r\n");
print("2: LED Test\r\n");
print("3: Timer Test\r\n");
print("4: FLASH Test\r\n");
print("5: IIC Test\r\n");
print("6: Ethernet Loopback Test\r\n");
print("7: Switch Test\r\n");
print("8: External Memory Test\r\n");
print("9: System Monitor Test\r\n");
print("A: PushButton Test\r\n");
print("B: LCD Test\r\n");
print("C: System ACE CF Test\r\n");
print("D: DVI/VGA Test\r\n");
choice = inbyte();
if (isalpha(choice)) {
choice = toupper(choice);
}
} while (!isdigit(choice) && (choice < 'A' || choice > 'D')) ;
xil_printf("%c\r\n", choice);
if (choice < 'A') {
choice -= '0';
} else {
choice -= 'A';
choice += 10;
}
flbuf = (uint8_t*)(FLASH_IMAGE_BASEADDR + (choice * SECTOR_SIZE));
/*
* Read the SRECORDS in the selected file into RAM.
*/
xil_printf("Reading SRECORDS from Linear BPI Flash at: 0x%x\r\n", (unsigned)flbuf);
ret = load_exec ();
/* If we reach here, we are in error */
#ifdef VERBOSE
if (ret > LD_SREC_LINE_ERROR) {
print ("ERROR in SREC line: ");
putnum (srec_line);
print (errors[ret]);
} else {
print ("ERROR: ");
print (errors[ret]);
}
#endif
return ret;
}
