struct net_device *gether_setup_name_default(const char *netname)
{
struct net_device *net;
struct eth_dev *dev;
net = alloc_etherdev(sizeof(*dev));
if (!net)
return ERR_PTR(-ENOMEM);
dev = netdev_priv(net);
spin_lock_init(&dev->lock);
spin_lock_init(&dev->req_lock);
INIT_WORK(&dev->work, eth_work);
INIT_LIST_HEAD(&dev->tx_reqs);
INIT_LIST_HEAD(&dev->rx_reqs);
skb_queue_head_init(&dev->rx_frames);
/* network device setup */
dev->net = net;
dev->qmult = QMULT_DEFAULT;
snprintf(net->name, sizeof(net->name), "%s%%d", netname);
eth_random_addr(dev->dev_mac);
pr_warn("using random %s ethernet address\n", "self");
eth_random_addr(dev->host_mac);
pr_warn("using random %s ethernet address\n", "host");
net->netdev_ops = ð_netdev_ops;
net->ethtool_ops = &ops;
SET_NETDEV_DEVTYPE(net, &gadget_type);
return net;
}
void
mt76_eeprom_override(struct mt76_dev *dev)
{
#ifdef CONFIG_OF
struct device_node *np = dev->dev->of_node;
const __be32 *val;
const u8 *mac;
int size;
if (!np)
return;
val = of_get_property(np, "mediatek,2ghz", &size);
if (val)
dev->cap.has_2ghz = be32_to_cpup(val);
val = of_get_property(np, "mediatek,5ghz", &size);
if (val)
dev->cap.has_5ghz = be32_to_cpup(val);
mac = of_get_mac_address(np);
if (mac)
memcpy(dev->macaddr, mac, ETH_ALEN);
#endif
if (!is_valid_ether_addr(dev->macaddr)) {
eth_random_addr(dev->macaddr);
dev_printk(KERN_INFO, dev->dev,
"Invalid MAC address, using random address %pM\n",
dev->macaddr);
}
}
static void board_init_enetaddr(uchar *mac_addr)
{
#ifdef CONFIG_SYS_NO_FLASH
# define USE_MAC_IN_FLASH 0
#else
# define USE_MAC_IN_FLASH 1
#endif
bool valid_mac = false;
if (USE_MAC_IN_FLASH) {
/* we cram the MAC in the last flash sector */
uchar *board_mac_addr = (uchar *)0x203F0096;
if (is_valid_ether_addr(board_mac_addr)) {
memcpy(mac_addr, board_mac_addr, 6);
valid_mac = true;
}
}
if (!valid_mac) {
puts("Warning: Generating 'random' MAC address\n");
eth_random_addr(mac_addr);
}
eth_setenv_enetaddr("ethaddr", mac_addr);
}
/*
* Setup the MAC address for SoC ethernet devices.
*
* Before calling this function, the ethernet driver will have
* initialized the addr with local-mac-address from the device
* tree (if found). Allow command line to override, but not
* the fused address.
*/
int soc_mac_addr(unsigned int index, u8 *addr)
{
int i, have_dt_mac = 0, have_cmdline_mac = 0, have_fuse_mac = 0;
for (i = 0; i < 6; i++) {
if (cmdline_mac[i])
have_cmdline_mac = 1;
if (c6x_fuse_mac[i])
have_fuse_mac = 1;
if (addr[i])
have_dt_mac = 1;
}
/* cmdline overrides all */
if (have_cmdline_mac)
memcpy(addr, cmdline_mac, 6);
else if (!have_dt_mac) {
if (have_fuse_mac)
memcpy(addr, c6x_fuse_mac, 6);
else
eth_random_addr(addr);
}
/* adjust for specific EMAC device */
addr[5] += index * c6x_num_cores;
return 1;
}
static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
{
char name[5], *mac;
sprintf(name, "mac%c", 'a' + instance);
mac = prom_getenv(name);
if (!mac && instance) {
sprintf(name, "mac%c", 'a');
mac = prom_getenv(name);
}
if (mac) {
if (!mac_pton(mac, dev_addr)) {
pr_warn("cannot parse mac address, using random address\n");
eth_random_addr(dev_addr);
}
} else
eth_random_addr(dev_addr);
}
static int xusbatm_atm_start(struct usbatm_data *usbatm,
struct atm_dev *atm_dev)
{
atm_dbg(usbatm, "%s entered\n", __func__);
/* use random MAC as we've no way to get it from the device */
eth_random_addr(atm_dev->esi);
return 0;
}
int
i40e_pf_host_init(struct rte_eth_dev *dev)
{
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
struct i40e_hw *hw = I40E_PF_TO_HW(pf);
int ret, i;
uint32_t val;
PMD_INIT_FUNC_TRACE();
/**
* return if SRIOV not enabled, VF number not configured or
* no queue assigned.
*/
if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
return I40E_SUCCESS;
/* Allocate memory to store VF structure */
pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
if(pf->vfs == NULL)
return -ENOMEM;
/* Disable irq0 for VFR event */
i40e_pf_disable_irq0(hw);
/* Disable VF link status interrupt */
val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
I40E_WRITE_FLUSH(hw);
for (i = 0; i < pf->vf_num; i++) {
pf->vfs[i].pf = pf;
pf->vfs[i].state = I40E_VF_INACTIVE;
pf->vfs[i].vf_idx = i;
ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
if (ret != I40E_SUCCESS)
goto fail;
eth_random_addr(pf->vfs[i].mac_addr.addr_bytes);
}
/* restore irq0 */
i40e_pf_enable_irq0(hw);
return I40E_SUCCESS;
fail:
rte_free(pf->vfs);
i40e_pf_enable_irq0(hw);
return ret;
}
static int owl_mac_set_macaddr(struct eth_device *dev)
{
u8 *mac = dev->enetaddr;
if(!is_valid_ether_addr(mac)){
printf("Warning:Bad address,use ramdom address instead\n");
eth_random_addr(dev->enetaddr);
mac = dev->enetaddr;
}
printf("Update MAC: %pM\n", dev->enetaddr);
writel((mac[0] << 0) | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24), MAC_CSR16);
writel((mac[4] << 0) | (mac[5] << 8), MAC_CSR17);
return 0;
}
static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
{
char name[5], *mac;
sprintf(name, "mac%c", 'a' + instance);
mac = prom_getenv(name);
if (!mac && instance) {
sprintf(name, "mac%c", 'a');
mac = prom_getenv(name);
}
if (mac) {
if (sscanf(mac, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
&dev_addr[0], &dev_addr[1],
&dev_addr[2], &dev_addr[3],
&dev_addr[4], &dev_addr[5]) != 6) {
pr_warning("cannot parse mac address, "
"using random address\n");
eth_random_addr(dev_addr);
}
} else
eth_random_addr(dev_addr);
}
/**
* Fetch MAC address
*
* @v smsc95xx SMSC95xx device
* @v hw_addr Hardware address to fill in
* @ret rc Return status code
*/
static int smsc95xx_fetch_mac ( struct smsc95xx_device *smsc95xx,
uint8_t *hw_addr ) {
int rc;
/* Read MAC address from EEPROM, if present */
if ( ( rc = smsc95xx_fetch_mac_eeprom ( smsc95xx, hw_addr ) ) == 0 )
return 0;
/* Construct MAC address for Honeywell VM3, if applicable */
if ( ( rc = smsc95xx_fetch_mac_vm3 ( smsc95xx, hw_addr ) ) == 0 )
return 0;
/* Otherwise, generate a random MAC address */
eth_random_addr ( hw_addr );
DBGC ( smsc95xx, "SMSC95XX %p using random MAC %s\n",
smsc95xx, eth_ntoa ( hw_addr ) );
return 0;
}
static int get_ether_addr(const char *str, u8 *dev_addr)
{
if (str) {
unsigned i;
for (i = 0; i < 6; i++) {
unsigned char num;
if ((*str == '.') || (*str == ':'))
str++;
num = hex_to_bin(*str++) << 4;
num |= hex_to_bin(*str++);
dev_addr [i] = num;
}
if (is_valid_ether_addr(dev_addr))
return 0;
}
eth_random_addr(dev_addr);
return 1;
}
static int mv88e6060_setup_addr(struct dsa_switch *ds)
{
u8 addr[ETH_ALEN];
u16 val;
eth_random_addr(addr);
val = addr[0] << 8 | addr[1];
/* The multicast bit is always transmitted as a zero, so the switch uses
* bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
*/
val &= 0xfeff;
REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val);
REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);
REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
return 0;
}
static int
avf_dev_init(struct rte_eth_dev *eth_dev)
{
struct avf_adapter *adapter =
AVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private);
struct avf_hw *hw = AVF_DEV_PRIVATE_TO_HW(adapter);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
PMD_INIT_FUNC_TRACE();
/* assign ops func pointer */
eth_dev->dev_ops = &avf_eth_dev_ops;
eth_dev->rx_pkt_burst = &avf_recv_pkts;
eth_dev->tx_pkt_burst = &avf_xmit_pkts;
eth_dev->tx_pkt_prepare = &avf_prep_pkts;
/* For secondary processes, we don't initialise any further as primary
* has already done this work. Only check if we need a different RX
* and TX function.
*/
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
avf_set_rx_function(eth_dev);
avf_set_tx_function(eth_dev);
return 0;
}
rte_eth_copy_pci_info(eth_dev, pci_dev);
hw->vendor_id = pci_dev->id.vendor_id;
hw->device_id = pci_dev->id.device_id;
hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
hw->bus.bus_id = pci_dev->addr.bus;
hw->bus.device = pci_dev->addr.devid;
hw->bus.func = pci_dev->addr.function;
hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
hw->back = AVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private);
adapter->eth_dev = eth_dev;
if (avf_init_vf(eth_dev) != 0) {
PMD_INIT_LOG(ERR, "Init vf failed");
return -1;
}
/* copy mac addr */
eth_dev->data->mac_addrs = rte_zmalloc(
"avf_mac",
ETHER_ADDR_LEN * AVF_NUM_MACADDR_MAX,
0);
if (!eth_dev->data->mac_addrs) {
PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
" store MAC addresses",
ETHER_ADDR_LEN * AVF_NUM_MACADDR_MAX);
return -ENOMEM;
}
/* If the MAC address is not configured by host,
* generate a random one.
*/
if (!is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
eth_random_addr(hw->mac.addr);
ether_addr_copy((struct ether_addr *)hw->mac.addr,
ð_dev->data->mac_addrs[0]);
/* register callback func to eal lib */
rte_intr_callback_register(&pci_dev->intr_handle,
avf_dev_interrupt_handler,
(void *)eth_dev);
/* enable uio intr after callback register */
rte_intr_enable(&pci_dev->intr_handle);
/* configure and enable device interrupt */
avf_enable_irq0(hw);
return 0;
}
static void board_init_enetaddr(uchar *mac_addr)
{
puts("Warning: Generating 'random' MAC address\n");
eth_random_addr(mac_addr);
eth_setenv_enetaddr("ethaddr", mac_addr);
}
int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
{
struct p54_common *priv = dev->priv;
struct eeprom_pda_wrap *wrap;
struct pda_entry *entry;
unsigned int data_len, entry_len;
void *tmp;
int err;
u8 *end = (u8 *)eeprom + len;
u16 synth = 0;
u16 crc16 = ~0;
wrap = (struct eeprom_pda_wrap *) eeprom;
entry = (void *)wrap->data + le16_to_cpu(wrap->len);
/* verify that at least the entry length/code fits */
while ((u8 *)entry <= end - sizeof(*entry)) {
entry_len = le16_to_cpu(entry->len);
data_len = ((entry_len - 1) << 1);
/* abort if entry exceeds whole structure */
if ((u8 *)entry + sizeof(*entry) + data_len > end)
break;
switch (le16_to_cpu(entry->code)) {
case PDR_MAC_ADDRESS:
if (data_len != ETH_ALEN)
break;
SET_IEEE80211_PERM_ADDR(dev, entry->data);
break;
case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
if (priv->output_limit)
break;
err = p54_convert_output_limits(dev, entry->data,
data_len);
if (err)
goto err;
break;
case PDR_PRISM_PA_CAL_CURVE_DATA: {
struct pda_pa_curve_data *curve_data =
(struct pda_pa_curve_data *)entry->data;
if (data_len < sizeof(*curve_data)) {
err = -EINVAL;
goto err;
}
switch (curve_data->cal_method_rev) {
case 0:
err = p54_convert_rev0(dev, curve_data);
break;
case 1:
err = p54_convert_rev1(dev, curve_data);
break;
default:
wiphy_err(dev->wiphy,
"unknown curve data revision %d\n",
curve_data->cal_method_rev);
err = -ENODEV;
break;
}
if (err)
goto err;
}
break;
case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
priv->iq_autocal = kmemdup(entry->data, data_len,
GFP_KERNEL);
if (!priv->iq_autocal) {
err = -ENOMEM;
goto err;
}
priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
break;
case PDR_DEFAULT_COUNTRY:
p54_parse_default_country(dev, entry->data, data_len);
break;
case PDR_INTERFACE_LIST:
tmp = entry->data;
while ((u8 *)tmp < entry->data + data_len) {
struct exp_if *exp_if = tmp;
if (exp_if->if_id == cpu_to_le16(IF_ID_ISL39000))
synth = le16_to_cpu(exp_if->variant);
tmp += sizeof(*exp_if);
}
break;
case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
if (data_len < 2)
break;
priv->version = *(u8 *)(entry->data + 1);
break;
case PDR_RSSI_LINEAR_APPROXIMATION:
case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
err = p54_parse_rssical(dev, entry->data, data_len,
le16_to_cpu(entry->code));
if (err)
goto err;
break;
case PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2: {
struct pda_custom_wrapper *pda = (void *) entry->data;
__le16 *src;
u16 *dst;
int i;
if (priv->rssi_db || data_len < sizeof(*pda))
break;
priv->rssi_db = p54_convert_db(pda, data_len);
if (!priv->rssi_db)
break;
src = (void *) priv->rssi_db->data;
dst = (void *) priv->rssi_db->data;
for (i = 0; i < priv->rssi_db->entries; i++)
*(dst++) = (s16) le16_to_cpu(*(src++));
}
break;
case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM: {
struct pda_custom_wrapper *pda = (void *) entry->data;
if (priv->output_limit || data_len < sizeof(*pda))
break;
priv->output_limit = p54_convert_db(pda, data_len);
}
break;
case PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM: {
struct pda_custom_wrapper *pda = (void *) entry->data;
if (priv->curve_data || data_len < sizeof(*pda))
break;
priv->curve_data = p54_convert_db(pda, data_len);
}
break;
case PDR_END:
crc16 = ~crc_ccitt(crc16, (u8 *) entry, sizeof(*entry));
if (crc16 != le16_to_cpup((__le16 *)entry->data)) {
wiphy_err(dev->wiphy, "eeprom failed checksum "
"test!\n");
err = -ENOMSG;
goto err;
} else {
goto good_eeprom;
}
break;
default:
break;
}
crc16 = crc_ccitt(crc16, (u8 *)entry, (entry_len + 1) * 2);
entry = (void *)entry + (entry_len + 1) * 2;
}
wiphy_err(dev->wiphy, "unexpected end of eeprom data.\n");
err = -ENODATA;
goto err;
good_eeprom:
if (!synth || !priv->iq_autocal || !priv->output_limit ||
!priv->curve_data) {
wiphy_err(dev->wiphy,
"not all required entries found in eeprom!\n");
err = -EINVAL;
goto err;
}
priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
err = p54_generate_channel_lists(dev);
if (err)
goto err;
if (priv->rxhw == PDR_SYNTH_FRONTEND_XBOW)
p54_init_xbow_synth(priv);
if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
dev->wiphy->bands[IEEE80211_BAND_2GHZ] =
priv->band_table[IEEE80211_BAND_2GHZ];
if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
dev->wiphy->bands[IEEE80211_BAND_5GHZ] =
priv->band_table[IEEE80211_BAND_5GHZ];
if ((synth & PDR_SYNTH_RX_DIV_MASK) == PDR_SYNTH_RX_DIV_SUPPORTED)
priv->rx_diversity_mask = 3;
if ((synth & PDR_SYNTH_TX_DIV_MASK) == PDR_SYNTH_TX_DIV_SUPPORTED)
priv->tx_diversity_mask = 3;
if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
u8 perm_addr[ETH_ALEN];
wiphy_warn(dev->wiphy,
"Invalid hwaddr! Using randomly generated MAC addr\n");
eth_random_addr(perm_addr);
SET_IEEE80211_PERM_ADDR(dev, perm_addr);
}
priv->cur_rssi = &p54_rssi_default;
wiphy_info(dev->wiphy, "hwaddr %pM, MAC:isl38%02x RF:%s\n",
dev->wiphy->perm_addr, priv->version,
p54_rf_chips[priv->rxhw]);
return 0;
err:
kfree(priv->iq_autocal);
kfree(priv->output_limit);
kfree(priv->curve_data);
kfree(priv->rssi_db);
kfree(priv->survey);
priv->iq_autocal = NULL;
priv->output_limit = NULL;
priv->curve_data = NULL;
priv->rssi_db = NULL;
priv->survey = NULL;
wiphy_err(dev->wiphy, "eeprom parse failed!\n");
return err;
}
/*
* drv_init() - a device potentially for us
*
* notes: drv_init() is called when the bus driver has located a card
* for us to support.
* We accept the new device by returning 0.
*/
static struct rtw_adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj,
struct usb_interface *pusb_intf,
const struct usb_device_id *pdid)
{
struct rtw_adapter *padapter = NULL;
struct net_device *pnetdev = NULL;
int status = _FAIL;
pnetdev = rtw_init_netdev23a(padapter);
if (!pnetdev)
goto free_adapter;
padapter = netdev_priv(pnetdev);
padapter->dvobj = dvobj;
padapter->bDriverStopped = true;
dvobj->if1 = padapter;
dvobj->padapters[dvobj->iface_nums++] = padapter;
padapter->iface_id = IFACE_ID0;
rtl8723au_set_hw_type(padapter);
SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj));
if (rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)))
goto free_adapter;
/* step 2. allocate HalData */
padapter->HalData = kzalloc(sizeof(struct hal_data_8723a), GFP_KERNEL);
if (!padapter->HalData)
goto free_wdev;
/* step read_chip_version */
rtl8723a_read_chip_version(padapter);
/* step usb endpoint mapping */
if (!rtl8723au_chip_configure(padapter))
goto free_hal_data;
/* step read efuse/eeprom data and get mac_addr */
rtl8723a_read_adapter_info(padapter);
/* step 5. */
if (rtw_init_drv_sw23a(padapter) == _FAIL) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
("Initialize driver software resource Failed!\n"));
goto free_hal_data;
}
#ifdef CONFIG_PM
if (padapter->pwrctrlpriv.bSupportRemoteWakeup) {
dvobj->pusbdev->do_remote_wakeup = 1;
pusb_intf->needs_remote_wakeup = 1;
device_init_wakeup(&pusb_intf->dev, 1);
DBG_8723A("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~~~~\n");
DBG_8723A("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~[%d]~~~\n",
device_may_wakeup(&pusb_intf->dev));
}
#endif
/* 2012-07-11 Move here to prevent the 8723AS-VAU BT
* auto suspend influence
*/
if (usb_autopm_get_interface(pusb_intf) < 0)
DBG_8723A("can't get autopm:\n");
#ifdef CONFIG_8723AU_BT_COEXIST
padapter->pwrctrlpriv.autopm_cnt = 1;
#endif
/* If the eeprom mac address is corrupted, assign a random address */
if (is_broadcast_ether_addr(padapter->eeprompriv.mac_addr) ||
is_zero_ether_addr(padapter->eeprompriv.mac_addr))
eth_random_addr(padapter->eeprompriv.mac_addr);
DBG_8723A("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n",
padapter->bDriverStopped, padapter->bSurpriseRemoved,
padapter->bup, padapter->hw_init_completed
);
status = _SUCCESS;
free_hal_data:
if (status != _SUCCESS)
kfree(padapter->HalData);
free_wdev:
if (status != _SUCCESS) {
rtw_wdev_unregister(padapter->rtw_wdev);
rtw_wdev_free(padapter->rtw_wdev);
}
free_adapter:
if (status != _SUCCESS) {
if (pnetdev)
free_netdev(pnetdev);
padapter = NULL;
}
return padapter;
}
static int bgmac_fixed_phy_register(struct bgmac *bgmac)
{
struct fixed_phy_status fphy_status = {
.link = 1,
.speed = SPEED_1000,
.duplex = DUPLEX_FULL,
};
struct phy_device *phy_dev;
int err;
phy_dev = fixed_phy_register(PHY_POLL, &fphy_status, -1, NULL);
if (!phy_dev || IS_ERR(phy_dev)) {
bgmac_err(bgmac, "Failed to register fixed PHY device\n");
return -ENODEV;
}
err = phy_connect_direct(bgmac->net_dev, phy_dev, bgmac_adjust_link,
PHY_INTERFACE_MODE_MII);
if (err) {
bgmac_err(bgmac, "Connecting PHY failed\n");
return err;
}
bgmac->phy_dev = phy_dev;
return err;
}
static int bgmac_mii_register(struct bgmac *bgmac)
{
struct mii_bus *mii_bus;
struct phy_device *phy_dev;
char bus_id[MII_BUS_ID_SIZE + 3];
int err = 0;
if (bgmac_is_bcm4707_family(bgmac))
return bgmac_fixed_phy_register(bgmac);
mii_bus = mdiobus_alloc();
if (!mii_bus)
return -ENOMEM;
mii_bus->name = "bgmac mii bus";
sprintf(mii_bus->id, "%s-%d-%d", "bgmac", bgmac->core->bus->num,
bgmac->core->core_unit);
mii_bus->priv = bgmac;
mii_bus->read = bgmac_mii_read;
mii_bus->write = bgmac_mii_write;
mii_bus->parent = &bgmac->core->dev;
mii_bus->phy_mask = ~(1 << bgmac->phyaddr);
err = mdiobus_register(mii_bus);
if (err) {
bgmac_err(bgmac, "Registration of mii bus failed\n");
goto err_free_bus;
}
bgmac->mii_bus = mii_bus;
/* Connect to the PHY */
snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, mii_bus->id,
bgmac->phyaddr);
phy_dev = phy_connect(bgmac->net_dev, bus_id, &bgmac_adjust_link,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(phy_dev)) {
bgmac_err(bgmac, "PHY connection failed\n");
err = PTR_ERR(phy_dev);
goto err_unregister_bus;
}
bgmac->phy_dev = phy_dev;
return err;
err_unregister_bus:
mdiobus_unregister(mii_bus);
err_free_bus:
mdiobus_free(mii_bus);
return err;
}
static void bgmac_mii_unregister(struct bgmac *bgmac)
{
struct mii_bus *mii_bus = bgmac->mii_bus;
mdiobus_unregister(mii_bus);
mdiobus_free(mii_bus);
}
/**************************************************
* BCMA bus ops
**************************************************/
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipattach */
static int bgmac_probe(struct bcma_device *core)
{
struct net_device *net_dev;
struct bgmac *bgmac;
struct ssb_sprom *sprom = &core->bus->sprom;
u8 *mac;
int err;
switch (core->core_unit) {
case 0:
mac = sprom->et0mac;
break;
case 1:
mac = sprom->et1mac;
break;
case 2:
mac = sprom->et2mac;
break;
default:
pr_err("Unsupported core_unit %d\n", core->core_unit);
return -ENOTSUPP;
}
if (!is_valid_ether_addr(mac)) {
dev_err(&core->dev, "Invalid MAC addr: %pM\n", mac);
eth_random_addr(mac);
dev_warn(&core->dev, "Using random MAC: %pM\n", mac);
}
/* This (reset &) enable is not preset in specs or reference driver but
* Broadcom does it in arch PCI code when enabling fake PCI device.
*/
bcma_core_enable(core, 0);
/* Allocation and references */
net_dev = alloc_etherdev(sizeof(*bgmac));
if (!net_dev)
return -ENOMEM;
net_dev->netdev_ops = &bgmac_netdev_ops;
net_dev->irq = core->irq;
net_dev->ethtool_ops = &bgmac_ethtool_ops;
bgmac = netdev_priv(net_dev);
bgmac->net_dev = net_dev;
bgmac->core = core;
bcma_set_drvdata(core, bgmac);
/* Defaults */
memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
/* On BCM4706 we need common core to access PHY */
if (core->id.id == BCMA_CORE_4706_MAC_GBIT &&
!core->bus->drv_gmac_cmn.core) {
bgmac_err(bgmac, "GMAC CMN core not found (required for BCM4706)\n");
err = -ENODEV;
goto err_netdev_free;
}
bgmac->cmn = core->bus->drv_gmac_cmn.core;
switch (core->core_unit) {
case 0:
bgmac->phyaddr = sprom->et0phyaddr;
break;
case 1:
bgmac->phyaddr = sprom->et1phyaddr;
break;
case 2:
bgmac->phyaddr = sprom->et2phyaddr;
break;
}
bgmac->phyaddr &= BGMAC_PHY_MASK;
if (bgmac->phyaddr == BGMAC_PHY_MASK) {
bgmac_err(bgmac, "No PHY found\n");
err = -ENODEV;
goto err_netdev_free;
}
bgmac_info(bgmac, "Found PHY addr: %d%s\n", bgmac->phyaddr,
bgmac->phyaddr == BGMAC_PHY_NOREGS ? " (NOREGS)" : "");
if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
bgmac_err(bgmac, "PCI setup not implemented\n");
err = -ENOTSUPP;
goto err_netdev_free;
}
bgmac_chip_reset(bgmac);
/* For Northstar, we have to take all GMAC core out of reset */
if (bgmac_is_bcm4707_family(bgmac)) {
struct bcma_device *ns_core;
int ns_gmac;
/* Northstar has 4 GMAC cores */
for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
/* As Northstar requirement, we have to reset all GMACs
* before accessing one. bgmac_chip_reset() call
* bcma_core_enable() for this core. Then the other
* three GMACs didn't reset. We do it here.
*/
ns_core = bcma_find_core_unit(core->bus,
BCMA_CORE_MAC_GBIT,
ns_gmac);
if (ns_core && !bcma_core_is_enabled(ns_core))
bcma_core_enable(ns_core, 0);
}
}
err = bgmac_dma_alloc(bgmac);
if (err) {
bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
goto err_netdev_free;
}
bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
/* TODO: reset the external phy. Specs are needed */
bgmac_phy_reset(bgmac);
bgmac->has_robosw = !!(core->bus->sprom.boardflags_lo &
BGMAC_BFL_ENETROBO);
if (bgmac->has_robosw)
bgmac_warn(bgmac, "Support for Roboswitch not implemented\n");
if (core->bus->sprom.boardflags_lo & BGMAC_BFL_ENETADM)
bgmac_warn(bgmac, "Support for ADMtek ethernet switch not implemented\n");
netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
err = bgmac_mii_register(bgmac);
if (err) {
bgmac_err(bgmac, "Cannot register MDIO\n");
goto err_dma_free;
}
net_dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
net_dev->hw_features = net_dev->features;
net_dev->vlan_features = net_dev->features;
err = register_netdev(bgmac->net_dev);
if (err) {
bgmac_err(bgmac, "Cannot register net device\n");
goto err_mii_unregister;
}
netif_carrier_off(net_dev);
return 0;
err_mii_unregister:
bgmac_mii_unregister(bgmac);
err_dma_free:
bgmac_dma_free(bgmac);
err_netdev_free:
bcma_set_drvdata(core, NULL);
free_netdev(net_dev);
return err;
}
static void bgmac_remove(struct bcma_device *core)
{
struct bgmac *bgmac = bcma_get_drvdata(core);
unregister_netdev(bgmac->net_dev);
bgmac_mii_unregister(bgmac);
netif_napi_del(&bgmac->napi);
bgmac_dma_free(bgmac);
bcma_set_drvdata(core, NULL);
free_netdev(bgmac->net_dev);
}
static struct bcma_driver bgmac_bcma_driver = {
.name = KBUILD_MODNAME,
.id_table = bgmac_bcma_tbl,
.probe = bgmac_probe,
.remove = bgmac_remove,
};
static int __init bgmac_init(void)
{
int err;
err = bcma_driver_register(&bgmac_bcma_driver);
if (err)
return err;
pr_info("Broadcom 47xx GBit MAC driver loaded\n");
return 0;
}
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipattach */
static int bgmac_probe(struct bcma_device *core)
{
struct net_device *net_dev;
struct bgmac *bgmac;
struct ssb_sprom *sprom = &core->bus->sprom;
u8 *mac = core->core_unit ? sprom->et1mac : sprom->et0mac;
int err;
/* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
if (core->core_unit > 1) {
pr_err("Unsupported core_unit %d\n", core->core_unit);
return -ENOTSUPP;
}
if (!is_valid_ether_addr(mac)) {
dev_err(&core->dev, "Invalid MAC addr: %pM\n", mac);
eth_random_addr(mac);
dev_warn(&core->dev, "Using random MAC: %pM\n", mac);
}
/* Allocation and references */
net_dev = alloc_etherdev(sizeof(*bgmac));
if (!net_dev)
return -ENOMEM;
net_dev->netdev_ops = &bgmac_netdev_ops;
net_dev->irq = core->irq;
SET_ETHTOOL_OPS(net_dev, &bgmac_ethtool_ops);
bgmac = netdev_priv(net_dev);
bgmac->net_dev = net_dev;
bgmac->core = core;
bcma_set_drvdata(core, bgmac);
/* Defaults */
memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
/* On BCM4706 we need common core to access PHY */
if (core->id.id == BCMA_CORE_4706_MAC_GBIT &&
!core->bus->drv_gmac_cmn.core) {
bgmac_err(bgmac, "GMAC CMN core not found (required for BCM4706)\n");
err = -ENODEV;
goto err_netdev_free;
}
bgmac->cmn = core->bus->drv_gmac_cmn.core;
bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
sprom->et0phyaddr;
bgmac->phyaddr &= BGMAC_PHY_MASK;
if (bgmac->phyaddr == BGMAC_PHY_MASK) {
bgmac_err(bgmac, "No PHY found\n");
err = -ENODEV;
goto err_netdev_free;
}
bgmac_info(bgmac, "Found PHY addr: %d%s\n", bgmac->phyaddr,
bgmac->phyaddr == BGMAC_PHY_NOREGS ? " (NOREGS)" : "");
if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
bgmac_err(bgmac, "PCI setup not implemented\n");
err = -ENOTSUPP;
goto err_netdev_free;
}
bgmac_chip_reset(bgmac);
/* For Northstar, we have to take all GMAC core out of reset */
if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
core->id.id == BCMA_CHIP_ID_BCM53018) {
struct bcma_device *ns_core;
int ns_gmac;
/* Northstar has 4 GMAC cores */
for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
/* As Northstar requirement, we have to reset all GMACs
* before accessing one. bgmac_chip_reset() call
* bcma_core_enable() for this core. Then the other
* three GMACs didn't reset. We do it here.
*/
ns_core = bcma_find_core_unit(core->bus,
BCMA_CORE_MAC_GBIT,
ns_gmac);
if (ns_core && !bcma_core_is_enabled(ns_core))
bcma_core_enable(ns_core, 0);
}
}
err = bgmac_dma_alloc(bgmac);
if (err) {
bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
goto err_netdev_free;
}
bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
/* TODO: reset the external phy. Specs are needed */
bgmac_phy_reset(bgmac);
bgmac->has_robosw = !!(core->bus->sprom.boardflags_lo &
BGMAC_BFL_ENETROBO);
if (bgmac->has_robosw)
bgmac_warn(bgmac, "Support for Roboswitch not implemented\n");
if (core->bus->sprom.boardflags_lo & BGMAC_BFL_ENETADM)
bgmac_warn(bgmac, "Support for ADMtek ethernet switch not implemented\n");
err = bgmac_mii_register(bgmac);
if (err) {
bgmac_err(bgmac, "Cannot register MDIO\n");
goto err_dma_free;
}
err = register_netdev(bgmac->net_dev);
if (err) {
bgmac_err(bgmac, "Cannot register net device\n");
goto err_mii_unregister;
}
netif_carrier_off(net_dev);
netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
return 0;
err_mii_unregister:
bgmac_mii_unregister(bgmac);
err_dma_free:
bgmac_dma_free(bgmac);
err_netdev_free:
bcma_set_drvdata(core, NULL);
free_netdev(net_dev);
return err;
}
static int bgmac_phy_connect_direct(struct bgmac *bgmac)
{
struct fixed_phy_status fphy_status = {
.link = 1,
.speed = SPEED_1000,
.duplex = DUPLEX_FULL,
};
struct phy_device *phy_dev;
int err;
phy_dev = fixed_phy_register(PHY_POLL, &fphy_status, -1, NULL);
if (!phy_dev || IS_ERR(phy_dev)) {
dev_err(bgmac->dev, "Failed to register fixed PHY device\n");
return -ENODEV;
}
err = phy_connect_direct(bgmac->net_dev, phy_dev, bgmac_adjust_link,
PHY_INTERFACE_MODE_MII);
if (err) {
dev_err(bgmac->dev, "Connecting PHY failed\n");
return err;
}
return err;
}
static int bgmac_phy_connect(struct bgmac *bgmac)
{
struct phy_device *phy_dev;
char bus_id[MII_BUS_ID_SIZE + 3];
/* Connect to the PHY */
snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,
bgmac->phyaddr);
phy_dev = phy_connect(bgmac->net_dev, bus_id, &bgmac_adjust_link,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(phy_dev)) {
dev_err(bgmac->dev, "PHY connection failed\n");
return PTR_ERR(phy_dev);
}
return 0;
}
int bgmac_enet_probe(struct bgmac *info)
{
struct net_device *net_dev;
struct bgmac *bgmac;
int err;
/* Allocation and references */
net_dev = alloc_etherdev(sizeof(*bgmac));
if (!net_dev)
return -ENOMEM;
net_dev->netdev_ops = &bgmac_netdev_ops;
net_dev->ethtool_ops = &bgmac_ethtool_ops;
bgmac = netdev_priv(net_dev);
memcpy(bgmac, info, sizeof(*bgmac));
bgmac->net_dev = net_dev;
net_dev->irq = bgmac->irq;
SET_NETDEV_DEV(net_dev, bgmac->dev);
if (!is_valid_ether_addr(bgmac->mac_addr)) {
dev_err(bgmac->dev, "Invalid MAC addr: %pM\n",
bgmac->mac_addr);
eth_random_addr(bgmac->mac_addr);
dev_warn(bgmac->dev, "Using random MAC: %pM\n",
bgmac->mac_addr);
}
ether_addr_copy(net_dev->dev_addr, bgmac->mac_addr);
/* This (reset &) enable is not preset in specs or reference driver but
* Broadcom does it in arch PCI code when enabling fake PCI device.
*/
bgmac_clk_enable(bgmac, 0);
/* This seems to be fixing IRQ by assigning OOB #6 to the core */
if (bgmac->feature_flags & BGMAC_FEAT_IRQ_ID_OOB_6)
bgmac_idm_write(bgmac, BCMA_OOB_SEL_OUT_A30, 0x86);
bgmac_chip_reset(bgmac);
err = bgmac_dma_alloc(bgmac);
if (err) {
dev_err(bgmac->dev, "Unable to alloc memory for DMA\n");
goto err_netdev_free;
}
bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
if (!bgmac->mii_bus)
err = bgmac_phy_connect_direct(bgmac);
else
err = bgmac_phy_connect(bgmac);
if (err) {
dev_err(bgmac->dev, "Cannot connect to phy\n");
goto err_dma_free;
}
net_dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
net_dev->hw_features = net_dev->features;
net_dev->vlan_features = net_dev->features;
err = register_netdev(bgmac->net_dev);
if (err) {
dev_err(bgmac->dev, "Cannot register net device\n");
goto err_phy_disconnect;
}
netif_carrier_off(net_dev);
return 0;
err_phy_disconnect:
phy_disconnect(net_dev->phydev);
err_dma_free:
bgmac_dma_free(bgmac);
err_netdev_free:
free_netdev(net_dev);
return err;
}
EXPORT_SYMBOL_GPL(bgmac_enet_probe);
void bgmac_enet_remove(struct bgmac *bgmac)
{
unregister_netdev(bgmac->net_dev);
phy_disconnect(bgmac->net_dev->phydev);
netif_napi_del(&bgmac->napi);
bgmac_dma_free(bgmac);
free_netdev(bgmac->net_dev);
}
int ftmac110_initialize(bd_t *bis)
{
int i, card_nr = 0;
struct eth_device *dev;
struct ftmac110_chip *chip;
dev = malloc(sizeof(*dev) + sizeof(*chip));
if (dev == NULL) {
panic("ftmac110: out of memory 1\n");
return -1;
}
chip = (struct ftmac110_chip *)(dev + 1);
memset(dev, 0, sizeof(*dev) + sizeof(*chip));
sprintf(dev->name, "FTMAC110#%d", card_nr);
dev->iobase = CONFIG_FTMAC110_BASE;
chip->regs = (void __iomem *)dev->iobase;
dev->priv = chip;
dev->init = ftmac110_probe;
dev->halt = ftmac110_halt;
dev->send = ftmac110_send;
dev->recv = ftmac110_recv;
if (!eth_getenv_enetaddr_by_index("eth", card_nr, dev->enetaddr))
eth_random_addr(dev->enetaddr);
/* allocate tx descriptors (it must be 16 bytes aligned) */
chip->txd = dma_alloc_coherent(
sizeof(struct ftmac110_desc) * CFG_TXDES_NUM, &chip->txd_dma);
if (!chip->txd)
panic("ftmac110: out of memory 3\n");
memset(chip->txd, 0,
sizeof(struct ftmac110_desc) * CFG_TXDES_NUM);
for (i = 0; i < CFG_TXDES_NUM; ++i) {
void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE);
if (!va)
panic("ftmac110: out of memory 4\n");
chip->txd[i].vbuf = va;
chip->txd[i].pbuf = cpu_to_le32(virt_to_phys(va));
chip->txd[i].ctrl = 0; /* owned by SW */
}
chip->txd[i - 1].ctrl |= cpu_to_le64(FTMAC110_TXD_END);
chip->txd_idx = 0;
/* allocate rx descriptors (it must be 16 bytes aligned) */
chip->rxd = dma_alloc_coherent(
sizeof(struct ftmac110_desc) * CFG_RXDES_NUM, &chip->rxd_dma);
if (!chip->rxd)
panic("ftmac110: out of memory 4\n");
memset((void *)chip->rxd, 0,
sizeof(struct ftmac110_desc) * CFG_RXDES_NUM);
for (i = 0; i < CFG_RXDES_NUM; ++i) {
void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2);
if (!va)
panic("ftmac110: out of memory 5\n");
/* it needs to be exactly 2 bytes aligned */
va = ((uint8_t *)va + 2);
chip->rxd[i].vbuf = va;
chip->rxd[i].pbuf = cpu_to_le32(virt_to_phys(va));
chip->rxd[i].ctrl = cpu_to_le64(FTMAC110_RXD_OWNER
| FTMAC110_RXD_BUFSZ(CFG_XBUF_SIZE));
}
chip->rxd[i - 1].ctrl |= cpu_to_le64(FTMAC110_RXD_END);
chip->rxd_idx = 0;
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write);
#endif
card_nr++;
return card_nr;
}
