Exemplo n.º 1
0
static void update_dst_buf_vars(struct i915_context *i915)
{
   struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
   struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
   uint32_t dst_buf_vars, cformat, zformat;
   uint32_t early_z = 0;
   uint32_t fixup = 0;
   int need_fixup;

   if (cbuf_surface)
      cformat = cbuf_surface->format;
   else
      cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
   cformat = translate_format(cformat);

   if (depth_surface) {
      struct i915_texture *tex = i915_texture(depth_surface->texture);
      struct i915_screen *is = i915_screen(i915->base.screen);

      zformat = translate_depth_format(depth_surface->format);

      if (is->is_i945 && tex->tiling != I915_TILE_NONE
            && !i915->fs->info.writes_z)
         early_z = CLASSIC_EARLY_DEPTH;
   } else
      zformat = 0;

   dst_buf_vars = DSTORG_HORT_BIAS(0x8) | /* .5 */
                  DSTORG_VERT_BIAS(0x8) | /* .5 */
                  LOD_PRECLAMP_OGL |
                  TEX_DEFAULT_COLOR_OGL |
                  cformat |
                  zformat |
                  early_z;

   if (i915->current.dst_buf_vars != dst_buf_vars) {
      if (early_z != (i915->current.dst_buf_vars & CLASSIC_EARLY_DEPTH))
         i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);

      i915->current.dst_buf_vars = dst_buf_vars;
      i915->static_dirty |= I915_DST_VARS;
      i915->hardware_dirty |= I915_HW_STATIC;
   }

   need_fixup = need_target_fixup(cbuf_surface, &fixup);
   if (i915->current.target_fixup_format != need_fixup ||
         i915->current.fixup_swizzle != fixup) {
      i915->current.target_fixup_format = need_fixup;
      i915->current.fixup_swizzle = fixup;
      /* we also send a new program to make sure the fixup for RGBA surfaces happens */
      i915->hardware_dirty |= I915_HW_PROGRAM;
   }
}
Exemplo n.º 2
0
/* Push the state into the sarea and/or texture memory.
 */
void
i915_emit_hardware_state(struct i915_context *i915 )
{
   /* XXX: there must be an easier way */
   const unsigned dwords = ( 14 + 
                             7 + 
                             I915_MAX_DYNAMIC + 
                             8 + 
                             2 + I915_TEX_UNITS*3 + 
                             2 + I915_TEX_UNITS*3 +
                             2 + I915_MAX_CONSTANT*4 + 
#if 0
                             i915->current.program_len + 
#else
                             i915->fs->program_len + 
#endif
                             6 
                           ) * 3/2; /* plus 50% margin */
   const unsigned relocs = ( I915_TEX_UNITS +
	                     3
                           ) * 3/2; /* plus 50% margin */

#if 0
   debug_printf("i915_emit_hardware_state: %d dwords, %d relocs\n", dwords, relocs);
#endif
   
   if(!BEGIN_BATCH(dwords, relocs)) {
      FLUSH_BATCH(NULL);
      assert(BEGIN_BATCH(dwords, relocs));
   }

   /* 14 dwords, 0 relocs */
   if (i915->hardware_dirty & I915_HW_INVARIENT)
   {
      OUT_BATCH(_3DSTATE_AA_CMD |
		AA_LINE_ECAAR_WIDTH_ENABLE |
		AA_LINE_ECAAR_WIDTH_1_0 |
		AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);

      OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
      OUT_BATCH(0);

      OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
      OUT_BATCH(0);
      
      OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
      OUT_BATCH(0);

      OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
		CSB_TCB(0, 0) |
		CSB_TCB(1, 1) |
		CSB_TCB(2, 2) |
		CSB_TCB(3, 3) |
		CSB_TCB(4, 4) | 
		CSB_TCB(5, 5) | 
		CSB_TCB(6, 6) | 
		CSB_TCB(7, 7));

      OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
		ENABLE_POINT_RASTER_RULE |
		OGL_POINT_RASTER_RULE |
		ENABLE_LINE_STRIP_PROVOKE_VRTX |
		ENABLE_TRI_FAN_PROVOKE_VRTX |
		LINE_STRIP_PROVOKE_VRTX(1) |
		TRI_FAN_PROVOKE_VRTX(2) | 
		ENABLE_TEXKILL_3D_4D | 
		TEXKILL_4D);

      /* Need to initialize this to zero.
       */
      OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
      OUT_BATCH(0);

      OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);

      /* disable indirect state for now
       */
      OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
      OUT_BATCH(0);
   }
   
   /* 7 dwords, 1 relocs */
   if (i915->hardware_dirty & I915_HW_IMMEDIATE)
   {
      OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | 
		I1_LOAD_S(0) |
		I1_LOAD_S(1) |
		I1_LOAD_S(2) |
		I1_LOAD_S(4) |
		I1_LOAD_S(5) |
		I1_LOAD_S(6) | 
		(5));
      
      if(i915->vbo)
         OUT_RELOC(i915->vbo,
                   I915_BUFFER_ACCESS_READ,
                   i915->current.immediate[I915_IMMEDIATE_S0]);
      else
	 /* FIXME: we should not do this */
	 OUT_BATCH(0);
      OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
      OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
      OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
      OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
      OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
   } 
   
   /* I915_MAX_DYNAMIC dwords, 0 relocs */
   if (i915->hardware_dirty & I915_HW_DYNAMIC) 
   {
      int i;
      for (i = 0; i < I915_MAX_DYNAMIC; i++) {
	 OUT_BATCH(i915->current.dynamic[i]);
      }
   }
   
   /* 8 dwords, 2 relocs */
   if (i915->hardware_dirty & I915_HW_STATIC)
   {
      struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
      struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;

      if (cbuf_surface) {
	 unsigned cpitch = cbuf_surface->stride;
	 unsigned ctile = BUF_3D_USE_FENCE;
	 if (cbuf_surface->texture &&
	       ((struct i915_texture*)(cbuf_surface->texture))->tiled) {
	    ctile = BUF_3D_TILED_SURFACE;
	 }

	 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);

	 OUT_BATCH(BUF_3D_ID_COLOR_BACK | 
		   BUF_3D_PITCH(cpitch) |  /* pitch in bytes */
		   ctile);

	 OUT_RELOC(cbuf_surface->buffer,
		   I915_BUFFER_ACCESS_WRITE,
		   cbuf_surface->offset);
      }

      /* What happens if no zbuf??
       */
      if (depth_surface) {
	 unsigned zpitch = depth_surface->stride;
	 unsigned ztile = BUF_3D_USE_FENCE;
	 if (depth_surface->texture &&
	       ((struct i915_texture*)(depth_surface->texture))->tiled) {
	    ztile = BUF_3D_TILED_SURFACE;
	 }

	 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);

	 OUT_BATCH(BUF_3D_ID_DEPTH |
		   BUF_3D_PITCH(zpitch) |  /* pitch in bytes */
		   ztile);

	 OUT_RELOC(depth_surface->buffer,
		   I915_BUFFER_ACCESS_WRITE,
		   depth_surface->offset);
      }
   
      {
	 unsigned cformat, zformat = 0;
      
	 if (cbuf_surface)
            cformat = cbuf_surface->format;
         else
            cformat = PIPE_FORMAT_A8R8G8B8_UNORM; /* arbitrary */
         cformat = translate_format(cformat);

	 if (depth_surface) 
	    zformat = translate_depth_format( i915->framebuffer.zsbuf->format );

	 OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
	 OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
		   DSTORG_VERT_BIAS(0x8) | /* .5 */
		   LOD_PRECLAMP_OGL |
		   TEX_DEFAULT_COLOR_OGL |
		   cformat |
		   zformat );
      }
   }

#if 01
      /* texture images */
      /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
      if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
      {
         const uint nr = i915->current.sampler_enable_nr;
         if (nr) {
            const uint enabled = i915->current.sampler_enable_flags;
            uint unit;
            uint count = 0;
            OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
            OUT_BATCH(enabled);
            for (unit = 0; unit < I915_TEX_UNITS; unit++) {
               if (enabled & (1 << unit)) {
                  struct pipe_buffer *buf =
                     i915->texture[unit]->buffer;
                  uint offset = 0;
                  assert(buf);

                  count++;

                  OUT_RELOC(buf,
                            I915_BUFFER_ACCESS_READ,
                            offset);
                  OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
                  OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
               }
            }
            assert(count == nr);
         }
      }
#endif

#if 01
   /* samplers */
   /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
   if (i915->hardware_dirty & I915_HW_SAMPLER) 
   {
      if (i915->current.sampler_enable_nr) {
	 int i;
	 
	 OUT_BATCH( _3DSTATE_SAMPLER_STATE | 
		    (3 * i915->current.sampler_enable_nr) );

	 OUT_BATCH( i915->current.sampler_enable_flags );

	 for (i = 0; i < I915_TEX_UNITS; i++) {
	    if (i915->current.sampler_enable_flags & (1<<i)) {
	       OUT_BATCH( i915->current.sampler[i][0] );
	       OUT_BATCH( i915->current.sampler[i][1] );
	       OUT_BATCH( i915->current.sampler[i][2] );
	    }
	 }
      }
   }
#endif

   /* constants */
   /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
   if (i915->hardware_dirty & I915_HW_PROGRAM)
   {
      /* Collate the user-defined constants with the fragment shader's
       * immediates according to the constant_flags[] array.
       */
      const uint nr = i915->fs->num_constants;
      if (nr) {
         uint i;

         OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
         OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );

         for (i = 0; i < nr; i++) {
            const uint *c;
            if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
               /* grab user-defined constant */
               c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
            }
            else {
               /* emit program constant */
               c = (uint *) i915->fs->constants[i];
            }
#if 0 /* debug */
            {
               float *f = (float *) c;
               printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
                      (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
                       ? "user" : "immediate"));
            }
#endif
            OUT_BATCH(*c++);
            OUT_BATCH(*c++);
            OUT_BATCH(*c++);
            OUT_BATCH(*c++);
         }
      }
   }

   /* Fragment program */
   /* i915->current.program_len dwords, 0 relocs */
   if (i915->hardware_dirty & I915_HW_PROGRAM)
   {
      uint i;
      /* we should always have, at least, a pass-through program */
      assert(i915->fs->program_len > 0);
      for (i = 0; i < i915->fs->program_len; i++) {
         OUT_BATCH(i915->fs->program[i]);
      }
   }

   /* drawing surface size */
   /* 6 dwords, 0 relocs */
   {
      uint w, h;
      boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
      (void)k;
      assert(k);

      OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
      OUT_BATCH(0);
      OUT_BATCH(0);
      OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
      OUT_BATCH(0);
      OUT_BATCH(0);
   }


   i915->hardware_dirty = 0;
}
Exemplo n.º 3
0
int AudioALSA::set_params(snd_pcm_t *dsp, 
	int channels, 
	int bits,
	int samplerate,
	int samples)
{
	snd_pcm_hw_params_t *params;
	snd_pcm_sw_params_t *swparams;
	int err;

	snd_pcm_hw_params_alloca(&params);
	snd_pcm_sw_params_alloca(&swparams);
	err = snd_pcm_hw_params_any(dsp, params);

	if (err < 0) 
	{
		fprintf(stderr, "AudioALSA::set_params: no PCM configurations available\n");
		return 1;
	}

	err=snd_pcm_hw_params_set_access(dsp, 
		params,
		SND_PCM_ACCESS_RW_INTERLEAVED);
        if(err){
		fprintf(stderr, "AudioALSA::set_params: failed to set up "
				"interleaved device access.\n");
		return 1;
        }

	err=snd_pcm_hw_params_set_format(dsp, 
		params, 
		translate_format(bits));
        if(err){
		fprintf(stderr, "AudioALSA::set_params: failed to set output format.\n");
		return 1;
        }

	err=snd_pcm_hw_params_set_channels(dsp, 
		params, 
		channels);
        if(err){
		fprintf(stderr, "AudioALSA::set_params: Configured ALSA device "
				"does not support %d channel operation.\n",
			channels);
		return 1;
        }

	err=snd_pcm_hw_params_set_rate_near(dsp, 
		params, 
		(unsigned int*)&samplerate, 
		(int*)0);
        if(err){
		fprintf(stderr, "AudioALSA::set_params: Configured ALSA device "
				"does not support %u Hz playback.\n",
			(unsigned int)samplerate);
		return 1;
        }

// Buffers written must be equal to period_time
	int buffer_time;
	int period_time;
	if(device->r)
	{
		buffer_time = 10000000;
		period_time = (int)((int64_t)samples * 1000000 / samplerate);
	}
	else
	{
		buffer_time = (int)((int64_t)samples * 1000000 * 2 / samplerate + 0.5);
		period_time = samples * samplerate / 1000000;
	}


//printf("AudioALSA::set_params 1 %d %d %d\n", samples, buffer_time, period_time);
	snd_pcm_hw_params_set_buffer_time_near(dsp, 
		params,
		(unsigned int*)&buffer_time, 
		(int*)0);
	snd_pcm_hw_params_set_period_time_near(dsp, 
		params,
		(unsigned int*)&period_time, 
		(int*)0);
//printf("AudioALSA::set_params 5 %d %d\n", buffer_time, period_time);
	err = snd_pcm_hw_params(dsp, params);
	if(err < 0)
	{
		fprintf(stderr, "AudioALSA::set_params: hw_params failed\n");
		return 1;
	}

	snd_pcm_uframes_t chunk_size = 1024;
	snd_pcm_uframes_t buffer_size = 262144;
	snd_pcm_hw_params_get_period_size(params, &chunk_size, 0);
	snd_pcm_hw_params_get_buffer_size(params, &buffer_size);
//printf("AudioALSA::set_params 10 %d %d\n", chunk_size, buffer_size);

	snd_pcm_sw_params_current(dsp, swparams);
	int n = chunk_size;
	err = snd_pcm_sw_params_set_avail_min(dsp, swparams, n);
	if(snd_pcm_sw_params(dsp, swparams) < 0)
	{
		fprintf(stderr, "AudioALSA::set_params: snd_pcm_sw_params failed\n");
                /* we can continue staggering along even if this fails */
	}

	device->device_buffer = samples * bits / 8 * channels;

//printf("AudioALSA::set_params 100 %d %d\n", samples,  device->device_buffer);

//	snd_pcm_hw_params_free(params);
//	snd_pcm_sw_params_free(swparams);
	return 0;
}