Пример #1
0
void mbx_init(void)
{
    volatile immap_t *immr = (immap_t *)CFG_IMMR;
    volatile memctl8xx_t *memctl = &immr->im_memctl;
    ulong speed, refclock, plprcr, sccr;

    /* real-time clock status and control register */
    immr->im_sitk.sitk_rtcsck = KAPWR_KEY;
    immr->im_sit.sit_rtcsc = 0x00C3;

    /* SIEL and SIMASK Registers (see MBX PRG 2-3) */
    immr->im_siu_conf.sc_simask = 0x00000000;
    immr->im_siu_conf.sc_siel = 0xAAAA0000;
    immr->im_siu_conf.sc_tesr = 0xFFFFFFFF;

    /*
     * Prepare access to i2c bus. The MBX offers 3 devices on the i2c
     * bus:
     * 1. Vital Product Data (contains clock speeds, mac-address etc,
     *    see vpd.h)
     * 2. RAM Specs (see dimm.h)
     * 2. DIMM Specs (see dimm.h)
     */
    vpd_init();

    /* system clock and reset control register */
    immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
    sccr = immr->im_clkrst.car_sccr;
    sccr &= SCCR_MASK;
    sccr |= CFG_SCCR;
    immr->im_clkrst.car_sccr = sccr;

    speed = board_get_cpufreq();
    refclock = get_reffreq();

    plprcr = CFG_PLPRCR;
    plprcr |= ((speed + refclock / 2) / refclock - 1) << 20;
    immr->im_clkrst.car_plprcr = plprcr;

    /*
     * preliminary setup of memory controller:
     * - map pci registers
     * - map configuation and status registers
     * - DON'T map ram/flash/rom yet, this is done in initdram()
     */
    switch(speed / 1000000)
    {
    case 40:
        memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
        memctl->memc_or4 = CFG_NVRAM_OR   | 0x920;
        break;
    case 50:
        memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
        memctl->memc_or4 = CFG_NVRAM_OR   | 0x930;
        break;
    default:
        hang();
        break;
    }
    memctl->memc_br5 = CFG_PCIMEM_BASE | 0x001;
    memctl->memc_or5 = CFG_PCIMEM_OR;
    memctl->memc_br6 = CFG_PCIBRIDGE_BASE | 0x001;
    memctl->memc_or6 = CFG_PCIBRIDGE_OR;
}
Пример #2
0
void mbx_init (void)
{
	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
	volatile memctl8xx_t *memctl = &immr->im_memctl;
	ulong speed, plprcr, sccr;
	ulong br0_32 = memctl->memc_br0 & 0x400;

	/* real-time clock status and control register */
	immr->im_sitk.sitk_rtcsck = KAPWR_KEY;
	immr->im_sit.sit_rtcsc = 0x00C3;

	/* SIEL and SIMASK Registers (see MBX PRG 2-3) */
	immr->im_siu_conf.sc_simask = 0x00000000;
	immr->im_siu_conf.sc_siel = 0xAAAA0000;
	immr->im_siu_conf.sc_tesr = 0xFFFFFFFF;

	/*
	 * Prepare access to i2c bus. The MBX offers 3 devices on the i2c bus:
	 * 1. Vital Product Data (contains clock speeds, MAC address etc, see vpd.h)
	 * 2. RAM  Specs (see dimm.h)
	 * 2. DIMM Specs (see dimm.h)
	 */
	vpd_init ();

	/* system clock and reset control register */
	immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
	sccr = immr->im_clkrst.car_sccr;
	sccr &= SCCR_MASK;
	sccr |= CONFIG_SYS_SCCR;
	immr->im_clkrst.car_sccr = sccr;

	speed = board_get_cpufreq ();

#if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0)
	plprcr = CONFIG_SYS_PLPRCR;
#else
	plprcr = immr->im_clkrst.car_plprcr;
	plprcr &= PLPRCR_MF_MSK;	/* isolate MF field */
	plprcr |= CONFIG_SYS_PLPRCR;		/* reset control bits   */
#endif

#ifdef CONFIG_SYS_USE_OSCCLK			/* See doc/README.MBX ! */
	plprcr |= ((speed + get_reffreq() / 2) / refclock - 1) << 20;
#endif

	immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
	immr->im_clkrst.car_plprcr = plprcr;

	/*
	 * preliminary setup of memory controller:
	 * - map Flash, otherwise configuration/status
	 *    registers won't be accessible when read
	 *    by board_init_f.
	 * - map NVRAM and configuation/status registers.
	 * - map pci registers.
	 * - DON'T map ram yet, this is done in initdram().
	 */
	switch (speed / 1000000) {
	case 40:
		memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
		memctl->memc_or0 = 0xFF800930;
		memctl->memc_or4 = CONFIG_SYS_NVRAM_OR | 0x920;
		memctl->memc_br4 = CONFIG_SYS_NVRAM_BASE | 0x401;
		break;
	case 50:
		memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
		memctl->memc_or0 = 0xFF800940;
		memctl->memc_or4 = CONFIG_SYS_NVRAM_OR | 0x930;
		memctl->memc_br4 = CONFIG_SYS_NVRAM_BASE | 0x401;
		break;
	default:
		hang ();
		break;
	}
#ifdef CONFIG_USE_PCI
	memctl->memc_or5 = CONFIG_SYS_PCIMEM_OR;
	memctl->memc_br5 = CONFIG_SYS_PCIMEM_BASE | 0x001;
	memctl->memc_or6 = CONFIG_SYS_PCIBRIDGE_OR;
	memctl->memc_br6 = CONFIG_SYS_PCIBRIDGE_BASE | 0x001;
#endif
	/*
	 * FIXME: I do not understand why I have to call this to
	 * initialise the control register here before booting from
	 * the PCMCIA card but if I do not the Linux kernel falls
	 * over in a big heap. If you can answer this question I
	 * would like to know about it.
	 */
	board_ether_init();
}