Пример #1
0
void updateFPURegs(RegisterViewModel& model, const State& state) {
	for(std::size_t i=0;i<MAX_FPU_REGS_COUNT;++i)
	{
		const auto reg=state.fpu_register(i);
		const auto comment = floatType(reg)==FloatValueClass::PseudoDenormal ?
								QObject::tr("pseudo-denormal") : "";
		model.updateFPUReg(i,reg,comment);
	}
	model.updateFCR(state.fpu_control_word());
	const auto fsr=state.fpu_status_word();
	model.updateFSR(fsr,FSRComment(fsr));
	model.updateFTR(state.fpu_tag_word());
	{
		const Register FIS=state["FIS"];
		if(FIS) model.updateFIS(FIS.value<edb::value16>());
		else model.invalidateFIS();
	}
	{
		const Register FDS=state["FDS"];
		if(FDS) model.updateFDS(FDS.value<edb::value16>());
		else model.invalidateFDS();
	}
	{
		const Register FIP=state["FIP"];
		if(FIP.bitSize()==64)
			model.updateFIP(FIP.value<edb::value64>());
		else if(FIP.bitSize()==32)
			model.updateFIP(FIP.value<edb::value32>());
		else
			model.invalidateFIP();
	}
	{
		const Register FDP=state["FDP"];
		if(FDP.bitSize()==64)
			model.updateFDP(FDP.value<edb::value64>());
		else if(FDP.bitSize()==32)
			model.updateFDP(FDP.value<edb::value32>());
		else
			model.invalidateFDP();
	}
	{
		const Register FOP=state["fopcode"];
		if(FOP) {
			const auto value=FOP.value<edb::value16>();
			// Yes, FOP is a big-endian view of the instruction
			const auto comment=value>0x7ff ? QString("?!!") :
								QObject::tr("Insn: %1 %2").arg((edb::value8(value>>8)+0xd8).toHexString()).arg(edb::value8(value).toHexString());
			model.updateFOP(value,comment);
		}
		else model.invalidateFOP();
	}
void DialogEditSIMDRegister::set_value(const Register& newReg)
{
	resetLayout();
	assert(newReg.bitSize()<=8*sizeof value_);
	reg=newReg;
	util::markMemory(&value_,value_.size());
	if(QRegExp("mm[0-7]").exactMatch(reg.name()))
	{
		const auto value=reg.value<edb::value64>();
		std::memcpy(&value_,&value,sizeof value);
		hideColumns(MMX_FIRST_COL);
		// MMX registers are never used in float computations, so hide useless rows
		hideRows(FLOATS32_ROW);
		hideRows(FLOATS64_ROW);
	}
	else if(QRegExp("xmm[0-9]+").exactMatch(reg.name()))
	{
		const auto value=reg.value<edb::value128>();
		std::memcpy(&value_,&value,sizeof value);
		hideColumns(XMM_FIRST_COL);
	}
	else if(QRegExp("ymm[0-9]+").exactMatch(reg.name()))
	{
		const auto value=reg.value<edb::value256>();
		std::memcpy(&value_,&value,sizeof value);
		hideColumns(YMM_FIRST_COL);
	}
	else qCritical() << "DialogEditSIMDRegister::set_value(" << reg.name() << "): register type unsupported";
	setWindowTitle(tr("Modify %1").arg(reg.name().toUpper()));
	updateAllEntriesExcept(nullptr);
}