示例#1
0
static int pcm037_devices_init(void)
{
	/* CS0: Nor Flash */
	imx31_setup_weimcs(0, 0x0000cf03, 0x10000d03, 0x00720900);
	/* CS1: Network Controller */
	imx31_setup_weimcs(1, 0x0000df06, 0x444a4541, 0x44443302);
	/* CS4: SRAM */
	imx31_setup_weimcs(4, 0x0000d843, 0x22252521, 0x22220a00);
	/* CS5: SJA1000 */
	imx31_setup_weimcs(4, 0x0000DCF6, 0x444A0301, 0x44443302);

	/*
	 * Up to 32MiB NOR type flash, connected to
	 * CS line 0, data width is 16 bit
	 */
	add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX31_CS0_BASE_ADDR, 32 * 1024 * 1024, 0);

	imx31_add_mmc0(NULL);

	/*
	 * Create partitions that should be
	 * not touched by any regular user
	 */
	devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0");	/* ourself */
	devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");	/* environment */

	protect_file("/dev/env0", 1);

	/*
	 * up to 2MiB static RAM type memory, connected
	 * to CS4, data width is 16 bit
	 */
	add_mem_device("sram0", MX31_CS4_BASE_ADDR, MX31_CS4_SIZE, /* area size */
				   IORESOURCE_MEM_WRITEABLE);
	imx31_add_nand(&nand_info);

	/*
	 * SMSC 9217 network controller
	 * connected to CS line 1 and interrupt line
	 * GPIO3, data width is 16 bit
	 */
	add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL,	MX31_CS1_BASE_ADDR,
			MX31_CS1_SIZE, IORESOURCE_MEM, &smsc9217_pdata);

#ifdef CONFIG_USB
	pcm037_usb_init();
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX31_USB_OTG_BASE_ADDR, NULL);
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX31_USB_HS2_BASE_ADDR, NULL);
#endif

	armlinux_set_bootparams((void *)0x80000100);
	armlinux_set_architecture(MACH_TYPE_PCM037);

	return 0;
}
示例#2
0
static void pca100_usb_register(void)
{
	mdelay(10);

	gpio_direction_output(GPIO_PORTB + 24, 0);
	gpio_direction_output(GPIO_PORTB + 23, 0);

	mdelay(10);

	ulpi_setup((void *)(MX27_USB_OTG_BASE_ADDR + 0x170), 1);
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX27_USB_OTG_BASE_ADDR, NULL);
	ulpi_setup((void *)(MX27_USB_OTG_BASE_ADDR + 0x570), 1);
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX27_USB_OTG_BASE_ADDR + 0x400, NULL);
}
示例#3
0
static void olinuxino_init_usb(void)
{

	imx23_usb_phy_enable();

	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_USB_BASE, NULL);
}
示例#4
0
文件: 3stack.c 项目: AubrCool/barebox
static int imx25_3ds_devices_init(void)
{
#ifdef CONFIG_USB
	/* USB does not work yet. Don't know why. Maybe
	 * the CPLD has to be initialized.
	 */
	imx25_usb_init();
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX25_USB_OTG_BASE_ADDR + 0x400, NULL);
#endif

	imx25_iim_register_fec_ethaddr();
	imx25_add_fec(&fec_info);

	add_mem_device("sram0", 0x78000000, 128 * 1024, IORESOURCE_MEM_WRITEABLE);

	if (readl(MX25_CCM_BASE_ADDR + MX25_CCM_RCSR) & (1 << 14))
		nand_info.width = 2;

	imx25_add_nand(&nand_info);

	devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
	dev_add_bb_dev("self_raw", "self0");

	devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
	dev_add_bb_dev("env_raw", "env0");

	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
	imx25_add_i2c0(NULL);

	armlinux_set_architecture(MACH_TYPE_MX25_3DS);
	armlinux_set_serial(imx_uid());

	return 0;
}
示例#5
0
static int mx23_evk_devices_init(void)
{
	int i, rc;

	/* initizalize gpios */
	for (i = 0; i < ARRAY_SIZE(pad_setup); i++)
		imx_gpio_mode(pad_setup[i]);

	armlinux_set_architecture(MACH_TYPE_MX23EVK);

	add_generic_device("mxs_mci", DEVICE_ID_DYNAMIC, NULL, IMX_SSP1_BASE,
					0x8000, IORESOURCE_MEM, &mci_pdata);

	rc = register_persistant_environment();
	if (rc != 0)
		printf("Cannot create the 'env0' persistant "
			 "environment storage (%d)\n", rc);

#ifdef CONFIG_USB_GADGET_DRIVER_ARC
	imx23_usb_phy_enable();
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_USB_BASE, NULL);
	add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, IMX_USB_BASE,
			   0x200, IORESOURCE_MEM, &usb_pdata);
#endif
	return 0;
}
示例#6
0
static int ac100_devices_init(void)
{
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, TEGRA_USB3_BASE,
			&ehci_pdata);

	return 0;
}
示例#7
0
static void loco_ehci_init(void)
{
	/* USB PWR enable */
	gpio_direction_output(MX53_LOCO_USB_PWREN, 0);
	gpio_set_value(MX53_LOCO_USB_PWREN, 1);

	writel(0, MX53_OTG_BASE_ADDR + 0x384); /* setup portsc */
	add_generic_usb_ehci_device(1, MX53_OTG_BASE_ADDR + 0x200, NULL);
}
示例#8
0
static void sabrelite_ehci_init(void)
{
	imx6_usb_phy2_disable_oc();
	imx6_usb_phy2_enable();

	/* hub reset */
	gpio_direction_output(204, 0);
	udelay(2000);
	gpio_set_value(204, 1);

	add_generic_usb_ehci_device(1, MX6_USBOH3_USB_BASE_ADDR + 0x200, NULL);
}
示例#9
0
static void falconwing_init_usb(void)
{
	/* power USB hub */
	gpio_direction_output(GPIO_USB_HUB_POWER, 1);
	mdelay(1);
	/* bring USB hub out of reset */
	gpio_direction_output(GPIO_USB_HUB_RESET, 1);

	imx23_usb_phy_enable();

	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_USB_BASE, NULL);
}
static int eukrea_cpuimx25_devices_init(void)
{
    mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
                                     ARRAY_SIZE(eukrea_cpuimx25_pads));

    led_gpio_register(&led0);

    imx25_iim_register_fec_ethaddr();
    imx25_add_fec(&fec_info);

    nand_info.width = 1;
    imx25_add_nand(&nand_info);

    devfs_add_partition("nand0", 0x00000, 0x40000,
                        DEVFS_PARTITION_FIXED, "self_raw");
    dev_add_bb_dev("self_raw", "self0");

    devfs_add_partition("nand0", 0x40000, 0x20000,
                        DEVFS_PARTITION_FIXED, "env_raw");
    dev_add_bb_dev("env_raw", "env0");

    /* enable LCD */
    gpio_direction_output(26, 1);
    gpio_set_value(26, 1);

    /* LED : default OFF */
    gpio_direction_output(2 * 32 + 19, 1);

    /* Switch : input */
    gpio_direction_input(2 * 32 + 18);

    imx25_add_fb(&eukrea_cpuimx25_fb_data);

    imx25_add_i2c0(NULL);
    imx25_add_mmc0(NULL);

#ifdef CONFIG_USB
    imx25_usb_init();
    add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX25_USB_OTG_BASE_ADDR + 0x400, NULL);
#endif
#ifdef CONFIG_USB_GADGET
    /* Workaround ENGcm09152 */
    writel(readl(MX25_USB_OTG_BASE_ADDR + 0x608) | (1 << 23), MX25_USB_OTG_BASE_ADDR + 0x608);
    add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, MX25_USB_OTG_BASE_ADDR, 0x200,
                       IORESOURCE_MEM, &usb_pdata);
#endif

    armlinux_set_bootparams((void *)0x80000100);
    armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX25SD);

    return 0;
}
示例#11
0
static int mx28_evk_devices_init(void)
{
	int i;

	/* initizalize muxing */
	for (i = 0; i < ARRAY_SIZE(mx28evk_pads); i++)
		imx_gpio_mode(mx28evk_pads[i]);

	armlinux_set_architecture(MACH_TYPE_MX28EVK);

	add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0x2000,
			   IORESOURCE_MEM, &mci_pdata);

	add_generic_device("stmfb", 0, NULL, IMX_FB_BASE, 0x2000,
			   IORESOURCE_MEM, &mx28_evk_fb_pdata);

	mx28_evk_get_ethaddr(); /* must be after registering ocotp */

	mx28_evk_fec_reset();
	add_generic_device("imx28-fec", 0, NULL, IMX_FEC0_BASE, 0x4000,
			   IORESOURCE_MEM, &fec_info);

	imx28_add_nand();

	spi_register_board_info(mx28evk_spi_board_info,
			ARRAY_SIZE(mx28evk_spi_board_info));

	add_generic_device("mxs_spi", 2, NULL, IMX_SSP2_BASE, 0x2000,
			   IORESOURCE_MEM, NULL);

#ifdef CONFIG_USB_GADGET_DRIVER_ARC
	imx28_usb_phy0_enable();
	imx28_usb_phy1_enable();
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_USB1_BASE, NULL);
	add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, IMX_USB0_BASE,
			   0x200, IORESOURCE_MEM, &usb_pdata);
#endif

	return 0;
}
示例#12
0
文件: pcm038.c 项目: cpdesign/barebox
static int pcm038_devices_init(void)
{
	int i;
	char *envdev;

	unsigned int mode[] = {
		PD0_AIN_FEC_TXD0,
		PD1_AIN_FEC_TXD1,
		PD2_AIN_FEC_TXD2,
		PD3_AIN_FEC_TXD3,
		PD4_AOUT_FEC_RX_ER,
		PD5_AOUT_FEC_RXD1,
		PD6_AOUT_FEC_RXD2,
		PD7_AOUT_FEC_RXD3,
		PD8_AF_FEC_MDIO,
		PD9_AIN_FEC_MDC | GPIO_PUEN,
		PD10_AOUT_FEC_CRS,
		PD11_AOUT_FEC_TX_CLK,
		PD12_AOUT_FEC_RXD0,
		PD13_AOUT_FEC_RX_DV,
		PD14_AOUT_FEC_RX_CLK,
		PD15_AOUT_FEC_COL,
		PD16_AIN_FEC_TX_ER,
		PF23_AIN_FEC_TX_EN,
		PE12_PF_UART1_TXD,
		PE13_PF_UART1_RXD,
		PE14_PF_UART1_CTS,
		PE15_PF_UART1_RTS,
		PD25_PF_CSPI1_RDY,
		GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT,
		PD29_PF_CSPI1_SCLK,
		PD30_PF_CSPI1_MISO,
		PD31_PF_CSPI1_MOSI,
		/* display */
		PA5_PF_LSCLK,
		PA6_PF_LD0,
		PA7_PF_LD1,
		PA8_PF_LD2,
		PA9_PF_LD3,
		PA10_PF_LD4,
		PA11_PF_LD5,
		PA12_PF_LD6,
		PA13_PF_LD7,
		PA14_PF_LD8,
		PA15_PF_LD9,
		PA16_PF_LD10,
		PA17_PF_LD11,
		PA18_PF_LD12,
		PA19_PF_LD13,
		PA20_PF_LD14,
		PA21_PF_LD15,
		PA22_PF_LD16,
		PA23_PF_LD17,
		PA24_PF_REV,
		PA25_PF_CLS,
		PA26_PF_PS,
		PA27_PF_SPL_SPR,
		PA28_PF_HSYNC,
		PA29_PF_VSYNC,
		PA30_PF_CONTRAST,
		PA31_PF_OE_ACD,
		/* USB host 2 */
		PA0_PF_USBH2_CLK,
		PA1_PF_USBH2_DIR,
		PA2_PF_USBH2_DATA7,
		PA3_PF_USBH2_NXT,
		PA4_PF_USBH2_STP,
		PD19_AF_USBH2_DATA4,
		PD20_AF_USBH2_DATA3,
		PD21_AF_USBH2_DATA6,
		PD22_AF_USBH2_DATA0,
		PD23_AF_USBH2_DATA2,
		PD24_AF_USBH2_DATA1,
		PD26_AF_USBH2_DATA5,
		/* I2C1 */
		PD17_PF_I2C_DATA | GPIO_PUEN,
		PD18_PF_I2C_CLK,
		/* I2C2 */
		PC5_PF_I2C2_SDA,
		PC6_PF_I2C2_SCL,
	};

	/* configure 16 bit nor flash on cs0 */
	CS0U = 0x22C2CF00;
	CS0L = 0x75000D01;
	CS0A = 0x00000900;

	/* configure SRAM on cs1 */
	CS1U = 0x0000d843;
	CS1L = 0x22252521;
	CS1A = 0x22220a00;

	/* configure SJA1000 on cs4 */
	CS4U = 0x0000DCF6;
	CS4L = 0x444A0301;
	CS4A = 0x44443302;

	/* initizalize gpios */
	for (i = 0; i < ARRAY_SIZE(mode); i++)
		imx_gpio_mode(mode[i]);

	PCCR0 |= PCCR0_CSPI1_EN;
	PCCR1 |= PCCR1_PERCLK2_EN;

	gpio_direction_output(GPIO_PORTD | 28, 0);
	gpio_set_value(GPIO_PORTD | 28, 0);

	spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info));
	imx27_add_spi0(&pcm038_spi_0_data);

	add_cfi_flash_device(-1, 0xC0000000, 32 * 1024 * 1024, 0);
	imx27_add_nand(&nand_info);
	imx27_add_fb(&pcm038_fb_data);

	PCCR0 |= PCCR0_I2C1_EN | PCCR0_I2C2_EN;
	imx27_add_i2c0(NULL);
	imx27_add_i2c1(NULL);

#ifdef CONFIG_USB
	pcm038_usbh_init();
	add_generic_usb_ehci_device(-1, IMX_OTG_BASE + 0x400, NULL);
#endif

	/* Register the fec device after the PLL re-initialisation
	 * as the fec depends on the (now higher) ipg clock
	 */
	imx27_add_fec(&fec_info);

	switch ((GPCR & GPCR_BOOT_MASK) >> GPCR_BOOT_SHIFT) {
	case GPCR_BOOT_8BIT_NAND_2k:
	case GPCR_BOOT_16BIT_NAND_2k:
	case GPCR_BOOT_16BIT_NAND_512:
	case GPCR_BOOT_8BIT_NAND_512:
		devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
		dev_add_bb_dev("self_raw", "self0");

		devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
		dev_add_bb_dev("env_raw", "env0");
		envdev = "NAND";
		break;
	default:
		devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
		devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
		protect_file("/dev/env0", 1);

		envdev = "NOR";
	}

	printf("Using environment in %s Flash\n", envdev);

	armlinux_set_bootparams((void *)0xa0000100);
	armlinux_set_architecture(MACH_TYPE_PCM038);

	return 0;
}
示例#13
0
文件: board.c 项目: Jokymon/barebox
static int neso_devices_init(void)
{
	int i;

	unsigned int mode[] = {
		/* UART1 */
		PE12_PF_UART1_TXD,
		PE13_PF_UART1_RXD,
		PE14_PF_UART1_CTS,
		PE15_PF_UART1_RTS,
		/* FEC */
		PD0_AIN_FEC_TXD0,
		PD1_AIN_FEC_TXD1,
		PD2_AIN_FEC_TXD2,
		PD3_AIN_FEC_TXD3,
		PD4_AOUT_FEC_RX_ER,
		PD5_AOUT_FEC_RXD1,
		PD6_AOUT_FEC_RXD2,
		PD7_AOUT_FEC_RXD3,
		PD8_AF_FEC_MDIO,
		PD9_AIN_FEC_MDC,
		PD10_AOUT_FEC_CRS,
		PD11_AOUT_FEC_TX_CLK,
		PD12_AOUT_FEC_RXD0,
		PD13_AOUT_FEC_RX_DV,
		PD14_AOUT_FEC_RX_CLK,
		PD15_AOUT_FEC_COL,
		PD16_AIN_FEC_TX_ER,
		PF23_AIN_FEC_TX_EN,

		/* SSI1 connected in AC97 style */
		PC20_PF_SSI1_FS,
		PC21_PF_SSI1_RXD,
		PC22_PF_SSI1_TXD,
		PC23_PF_SSI1_CLK,

		/* LED 1 */
		(GPIO_PORTB | 15 | GPIO_GPIO | GPIO_OUT),
		/* LED 2 */
		(GPIO_PORTB | 16 | GPIO_GPIO | GPIO_OUT),
		/* CTOUCH reset */
		(GPIO_PORTB | 17 | GPIO_GPIO | GPIO_OUT),
		/* CTOUCH IRQ */
		(GPIO_PORTB | 14 | GPIO_GPIO | GPIO_IN),
		/* RTC IRQ */
		(GPIO_PORTF | 14 | GPIO_GPIO | GPIO_IN),
		/* SD change card detection */
		(GPIO_PORTF | 17 | GPIO_GPIO | GPIO_IN),
		/* SDHC1*/
		PE18_PF_SD1_D0,
		PE19_PF_SD1_D1,
		PE20_PF_SD1_D2,
		PE21_PF_SD1_D3,
		PE22_PF_SD1_CMD,
		PE23_PF_SD1_CLK,
		/* I2C1 */
		PD17_PF_I2C_DATA,
		PD18_PF_I2C_CLK,
		/* I2C2, for CTOUCH */
		PC5_PF_I2C2_SDA,
		PC6_PF_I2C2_SCL,

		/* Connected to: Both USB phys and ethernet phy FIXME 1 = RESET? */
		PE17_PF_RESET_OUT,

		/* USB host */
		(USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT),
		PA0_PF_USBH2_CLK,
		PA1_PF_USBH2_DIR,
		PA3_PF_USBH2_NXT,
		PA4_PF_USBH2_STP,
		PD22_AF_USBH2_DATA0,
		PD24_AF_USBH2_DATA1,
		PD23_AF_USBH2_DATA2,
		PD20_AF_USBH2_DATA3,
		PD19_AF_USBH2_DATA4,
		PD26_AF_USBH2_DATA5,
		PD21_AF_USBH2_DATA6,
		PA2_PF_USBH2_DATA7,

		/* USB OTG */
		(OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT),
		PE24_PF_USBOTG_CLK,
		PE2_PF_USBOTG_DIR,
		PE0_PF_USBOTG_NXT,
		PE1_PF_USBOTG_STP,
		PC9_PF_USBOTG_DATA0,
		PC11_PF_USBOTG_DATA1,
		PC10_PF_USBOTG_DATA2,
		PC13_PF_USBOTG_DATA3,
		PC12_PF_USBOTG_DATA4,
		PC7_PF_USBOTG_DATA5,
		PC8_PF_USBOTG_DATA6,
		PE25_PF_USBOTG_DATA7,

		/* Display signals */
		(LCD_POWER_GPIO | GPIO_GPIO | GPIO_OUT), /* LCD power: 1 = LCD on */
		PA5_PF_LSCLK,
		PA6_PF_LD0,
		PA7_PF_LD1,
		PA8_PF_LD2,
		PA9_PF_LD3,
		PA10_PF_LD4,
		PA11_PF_LD5,
		PA12_PF_LD6,
		PA13_PF_LD7,
		PA14_PF_LD8,
		PA15_PF_LD9,
		PA16_PF_LD10,
		PA17_PF_LD11,
		PA18_PF_LD12,
		PA19_PF_LD13,
		PA20_PF_LD14,
		PA21_PF_LD15,
		PA22_PF_LD16,
		PA23_PF_LD17,
		PA31_PF_OE_ACD,	/* DE */

		/* Backlight PWM (Use as gpio) */
		(BACKLIGHT_POWER_GPIO | GPIO_GPIO | GPIO_OUT),
	};

	/* reset the chip select lines to the USB/OTG phys to avoid any hang */
	gpio_direction_output(OTG_PHY_CS_GPIO, 1);
	gpio_direction_output(USBH2_PHY_CS_GPIO, 1);

	/* initialize gpios */
	for (i = 0; i < ARRAY_SIZE(mode); i++)
		imx_gpio_mode(mode[i]);

	imx27_add_nand(&nand_info);
	imx27_add_fb(&neso_fb_data);

#ifdef CONFIG_USB
	neso_usbh_init();
	add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX27_USB_OTG_BASE_ADDR + 0x400, NULL);
#endif

	imx27_add_fec(&fec_info);

	devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
	dev_add_bb_dev("self_raw", "self0");

	devfs_add_partition("nand0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env_raw");
	dev_add_bb_dev("env_raw", "env0");

	armlinux_set_bootparams((void *)0xa0000100);
	armlinux_set_architecture(MACH_TYPE_NESO);

	return 0;
}