HAL_BOOL
ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
HAL_CHANNEL_INTERNAL *ichan;
ichan = ath_hal_checkchannel(ah, chan);
HALASSERT(ichan != AH_NULL);
/* Do initial chipset-specific calibration */
if (! AH5416(ah)->ah_cal_initcal(ah, chan)) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: initial chipset calibration did "
"not complete in time; noisy environment?\n", __func__);
return AH_FALSE;
}
/* If there's PA Cal, do it */
if (AH5416(ah)->ah_cal_pacal)
AH5416(ah)->ah_cal_pacal(ah, AH_TRUE);
/*
* Do NF calibration after DC offset and other CALs.
* Per system engineers, noise floor value can sometimes be 20 dB
* higher than normal value if DC offset and noise floor cal are
* triggered at the same time.
*/
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
/*
* This may take a while to run; make sure subsequent
* calibration routines check that this has completed
* before reading the value and triggering a subsequent
* calibration.
*/
/* Initialize list pointers */
cal->cal_list = cal->cal_last = cal->cal_curr = AH_NULL;
/*
* Enable IQ, ADC Gain, ADC DC Offset Cals
*/
if (AR_SREV_HOWL(ah) || AR_SREV_SOWL_10_OR_LATER(ah)) {
/* Setup all non-periodic, init time only calibrations */
/* XXX: Init DC Offset not working yet */
#if 0
if (ar5416IsCalSupp(ah, chan, ADC_DC_INIT_CAL)) {
INIT_CAL(&cal->adcDcCalInitData);
INSERT_CAL(cal, &cal->adcDcCalInitData);
}
/* Initialize current pointer to first element in list */
cal->cal_curr = cal->cal_list;
if (cal->ah_cal_curr != AH_NULL && !ar5416RunInitCals(ah, 0))
return AH_FALSE;
#endif
}
/* If Cals are supported, add them to list via INIT/INSERT_CAL */
if (ar5416IsCalSupp(ah, chan, ADC_GAIN_CAL)) {
INIT_CAL(&cal->adcGainCalData);
INSERT_CAL(cal, &cal->adcGainCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable ADC Gain Calibration.\n", __func__);
}
if (ar5416IsCalSupp(ah, chan, ADC_DC_CAL)) {
INIT_CAL(&cal->adcDcCalData);
INSERT_CAL(cal, &cal->adcDcCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable ADC DC Calibration.\n", __func__);
}
if (ar5416IsCalSupp(ah, chan, IQ_MISMATCH_CAL)) {
INIT_CAL(&cal->iqCalData);
INSERT_CAL(cal, &cal->iqCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable IQ Calibration.\n", __func__);
}
/* Initialize current pointer to first element in list */
cal->cal_curr = cal->cal_list;
/* Kick off measurements for the first cal */
if (cal->cal_curr != AH_NULL)
ar5416ResetMeasurement(ah, cal->cal_curr);
/* Mark all calibrations on this channel as being invalid */
ichan->calValid = 0;
return AH_TRUE;
#undef MAX_CAL_CHECK
}
/*
* Initialize Calibration infrastructure.
*/
HAL_BOOL
ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
HAL_CHANNEL_INTERNAL *ichan;
ichan = ath_hal_checkchannel(ah, chan);
HALASSERT(ichan != AH_NULL);
if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
/* Enable Rx Filter Cal */
OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_FLTR_CAL);
/* Clear the carrier leak cal bit */
OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
/* kick off the cal */
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
/* Poll for offset calibration complete */
if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: offset calibration failed to complete in 1ms; "
"noisy environment?\n", __func__);
return AH_FALSE;
}
/* Set the cl cal bit and rerun the cal a 2nd time */
/* Enable Rx Filter Cal */
OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_FLTR_CAL);
OS_REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
}
/* Calibrate the AGC */
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
/* Poll for offset calibration complete */
if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: offset calibration did not complete in 1ms; "
"noisy environment?\n", __func__);
return AH_FALSE;
}
/*
* Do NF calibration after DC offset and other CALs.
* Per system engineers, noise floor value can sometimes be 20 dB
* higher than normal value if DC offset and noise floor cal are
* triggered at the same time.
*/
OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
/* Initialize list pointers */
cal->cal_list = cal->cal_last = cal->cal_curr = AH_NULL;
/*
* Enable IQ, ADC Gain, ADC DC Offset Cals
*/
if (AR_SREV_SOWL_10_OR_LATER(ah)) {
/* Setup all non-periodic, init time only calibrations */
/* XXX: Init DC Offset not working yet */
#if 0
if (ar5416IsCalSupp(ah, chan, ADC_DC_INIT_CAL)) {
INIT_CAL(&cal->adcDcCalInitData);
INSERT_CAL(cal, &cal->adcDcCalInitData);
}
/* Initialize current pointer to first element in list */
cal->cal_curr = cal->cal_list;
if (cal->ah_cal_curr != AH_NULL && !ar5416RunInitCals(ah, 0))
return AH_FALSE;
#endif
}
/* If Cals are supported, add them to list via INIT/INSERT_CAL */
if (ar5416IsCalSupp(ah, chan, ADC_GAIN_CAL)) {
INIT_CAL(&cal->adcGainCalData);
INSERT_CAL(cal, &cal->adcGainCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable ADC Gain Calibration.\n", __func__);
}
if (ar5416IsCalSupp(ah, chan, ADC_DC_CAL)) {
INIT_CAL(&cal->adcDcCalData);
INSERT_CAL(cal, &cal->adcDcCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable ADC DC Calibration.\n", __func__);
}
if (ar5416IsCalSupp(ah, chan, IQ_MISMATCH_CAL)) {
INIT_CAL(&cal->iqCalData);
INSERT_CAL(cal, &cal->iqCalData);
HALDEBUG(ah, HAL_DEBUG_PERCAL,
"%s: enable IQ Calibration.\n", __func__);
}
/* Initialize current pointer to first element in list */
cal->cal_curr = cal->cal_list;
/* Kick off measurements for the first cal */
if (cal->cal_curr != AH_NULL)
ar5416ResetMeasurement(ah, cal->cal_curr);
/* Mark all calibrations on this channel as being invalid */
ichan->calValid = 0;
return AH_TRUE;
}
