int32_t CenMbaTdCtlrCommon::cleanupPrevCmd()
{
#define PRDF_FUNC "[CenMbaTdCtlrCommon::cleanupPrevCmd] "
int32_t o_rc = SUCCESS;
// Clean up the current maintenance command. This must be done whenever
// maintenance command will no longer be executed.
if ( NULL != iv_mssCmd )
{
o_rc = iv_mssCmd->cleanupCmd();
if ( SUCCESS != o_rc )
PRDF_ERR( PRDF_FUNC "cleanupCmd() failed" );
delete iv_mssCmd; iv_mssCmd = NULL;
}
// Clear the command complete attention. This must be done before starting
// the next maintenance command.
SCAN_COMM_REGISTER_CLASS * firand = iv_mbaChip->getRegister("MBASPA_AND");
firand->setAllBits();
firand->ClearBit(0); // Maintenance command complete
firand->ClearBit(8); // Maintenance command complete (DD1.0 workaround)
if ( SUCCESS != firand->Write() )
{
PRDF_ERR( PRDF_FUNC "Write() failed on MBASPA_AND" );
o_rc = FAIL;
}
return o_rc;
#undef PRDF_FUNC
}
int32_t CenMbaTdCtlrCommon::chipMarkCleanup()
{
#define PRDF_FUNC "[CenMbaTdCtlrCommon::chipMarkCleanup] "
int32_t o_rc = SUCCESS;
do
{
SCAN_COMM_REGISTER_CLASS * ddrPhyAndFir =
iv_mbaChip->getRegister( "MBADDRPHYFIR_AND" );
ddrPhyAndFir->setAllBits();
ddrPhyAndFir->ClearBit(50); // Calibration Error RE 0
ddrPhyAndFir->ClearBit(58); // Calibration Error RE 1
o_rc = ddrPhyAndFir->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on MBADDRPHYFIR_AND" );
break;
}
} while(0);
return o_rc;
#undef PRDF_FUNC
}
int32_t CenMbaTdCtlrCommon::prepareNextCmd( bool i_clearStats )
{
#define PRDF_FUNC "[CenMbaTdCtlrCommon::prepareNextCmd] "
int32_t o_rc = SUCCESS;
do
{
//----------------------------------------------------------------------
// Clean up previous command
//----------------------------------------------------------------------
o_rc = cleanupPrevCmd();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "cleanupPrevCmd() failed" );
break;
}
//----------------------------------------------------------------------
// Clear ECC counters
//----------------------------------------------------------------------
const char * reg_str = NULL;
if ( i_clearStats )
{
reg_str = (0 == iv_mbaPos) ? "MBA0_MBSTR" : "MBA1_MBSTR";
SCAN_COMM_REGISTER_CLASS * mbstr =
iv_membChip->getRegister( reg_str );
// MBSTR's content could be modified from cleanupCmd()
// so we need to refresh
o_rc = mbstr->ForceRead();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "ForceRead() failed on %s", reg_str );
break;
}
mbstr->SetBit(53); // Setting this bit clears all counters.
o_rc = mbstr->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on %s", reg_str );
break;
}
// Hardware automatically clears bit 53, so flush this register out
// of the register cache to avoid clearing the counters again with
// a write from the out-of-date cached copy.
RegDataCache & cache = RegDataCache::getCachedRegisters();
cache.flush( iv_membChip, mbstr );
}
//----------------------------------------------------------------------
// Clear ECC FIRs
//----------------------------------------------------------------------
reg_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_AND"
: "MBA1_MBSECCFIR_AND";
SCAN_COMM_REGISTER_CLASS * firand = iv_membChip->getRegister( reg_str );
firand->setAllBits();
// Clear all scrub MPE bits.
// This will need to be done when starting a TD procedure or background
// scrubbing. iv_rank may not be set when starting background scrubbing
// and technically there should only be one of these MPE bits on at a
// time so we should not have to worry about losing an attention by
// clearing them all.
firand->SetBitFieldJustified( 20, 8, 0 );
// Clear scrub NCE, SCE, MCE, RCE, SUE, UE bits (36-41)
firand->SetBitFieldJustified( 36, 6, 0 );
o_rc = firand->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on %s", reg_str );
break;
}
SCAN_COMM_REGISTER_CLASS * spaAnd =
iv_mbaChip->getRegister("MBASPA_AND");
spaAnd->setAllBits();
// Clear threshold exceeded attentions
spaAnd->SetBitFieldJustified( 1, 4, 0 );
o_rc = spaAnd->Write();
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "Write() failed on MBASPA_AND" );
break;
}
} while (0);
return o_rc;
#undef PRDF_FUNC
}
/**
* @fn ClearMbaCalSecondaryBits
* @brief Clears MBACAL secondary Fir bits which may come up because of MBSFIR
* @param i_chip The Centaur chip.
* @param i_sc ServiceDataColector.
* @return SUCCESS.
*/
int32_t ClearMbaCalSecondaryBits( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & i_sc )
{
#define PRDF_FUNC "[ClearMbaCalSecondaryBits ] "
int32_t l_rc = SUCCESS;
do
{
SCAN_COMM_REGISTER_CLASS * mbsFir = i_chip->getRegister("MBSFIR");
SCAN_COMM_REGISTER_CLASS * mbsFirMask =
i_chip->getRegister("MBSFIR_MASK");
l_rc = mbsFir->Read();
l_rc |= mbsFirMask->Read();
if ( SUCCESS != l_rc )
{
PRDF_ERR( PRDF_FUNC"MBSFIR/MBSFIR_MASK read failed"
"for 0x%08x", i_chip->GetId());
break;
}
CenMembufDataBundle * membdb = getMembufDataBundle( i_chip );
for( uint32_t i = 0; i < MAX_MBA_PER_MEMBUF; i++ )
{
ExtensibleChip * mbaChip = membdb->getMbaChip(i);
if ( NULL == mbaChip ) continue;
SCAN_COMM_REGISTER_CLASS * mbaCalFir =
mbaChip->getRegister("MBACALFIR");
if( SUCCESS != mbaCalFir->Read() )
{
// Do not break. Just print error trace and look for
// other MBA.
PRDF_ERR( PRDF_FUNC"MBACALFIR read failed"
"for 0x%08x", mbaChip->GetId());
continue;
}
if( !( mbaCalFir->IsBitSet( 10 ) || mbaCalFir->IsBitSet( 14 ) ))
continue;
SCAN_COMM_REGISTER_CLASS * mbaCalAndFir =
mbaChip->getRegister("MBACALFIR_AND");
mbaCalAndFir->setAllBits();
mbaCalAndFir->ClearBit(10);
mbaCalAndFir->ClearBit(14);
l_rc = mbaCalAndFir->Write();
if ( SUCCESS != l_rc )
{
// Do not break. Just print error trace and look for
// other MBA.
PRDF_ERR( PRDF_FUNC"MBACALFIR_AND write failed"
"for 0x%08x", mbaChip->GetId());
}
}
}while( 0 );
return SUCCESS;
#undef PRDF_FUNC
} PRDF_PLUGIN_DEFINE( Membuf, ClearMbaCalSecondaryBits );
/**
* @fn ClearMbsSecondaryBits
* @brief Clears MBS secondary Fir bits which may come up because of primary
* MBS/MBI FIR bits.
* @param i_chip The Centaur chip.
* @param i_sc ServiceDataColector.
* @return SUCCESS.
*/
int32_t ClearMbsSecondaryBits( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & i_sc )
{
#define PRDF_FUNC "[ClearMbsSecondaryBits] "
int32_t l_rc = SUCCESS;
do
{
SCAN_COMM_REGISTER_CLASS * mbsFir = i_chip->getRegister("MBSFIR");
SCAN_COMM_REGISTER_CLASS * mbsFirMask =
i_chip->getRegister("MBSFIR_MASK");
SCAN_COMM_REGISTER_CLASS * mbsFirAnd =
i_chip->getRegister("MBSFIR_AND");
l_rc = mbsFir->Read();
l_rc |= mbsFirMask->Read();
if ( SUCCESS != l_rc )
{
PRDF_ERR( PRDF_FUNC"MBSFIR/MBSFIR_MASK read failed"
"for 0x%08x", i_chip->GetId());
break;
}
mbsFirAnd->setAllBits();
if ( mbsFir->IsBitSet(26)
&& mbsFir->IsBitSet(9) && ( ! mbsFirMask->IsBitSet(9)))
{
mbsFirAnd->ClearBit(26);
}
if( mbsFir->IsBitSet(3) || mbsFir->IsBitSet(4) )
{
SCAN_COMM_REGISTER_CLASS * mbiFir = i_chip->getRegister("MBIFIR");
SCAN_COMM_REGISTER_CLASS * mbiFirMask =
i_chip->getRegister("MBIFIR_MASK");
l_rc = mbiFir->Read();
l_rc |= mbiFirMask->Read();
if ( SUCCESS != l_rc )
{
// Do not break from here, just print error trace.
// If there are other secondary bits ( e.g. 26, 27 ),
// we want to clear them.
PRDF_ERR( PRDF_FUNC"MBIFIR/MASK read failed"
"for 0x%08x", i_chip->GetId());
}
else if ( mbiFir->IsBitSet( 0 ) && ( ! mbiFirMask->IsBitSet( 0 )) )
{
mbsFirAnd->ClearBit(3);
mbsFirAnd->ClearBit(4);
}
}
l_rc = mbsFirAnd->Write();
if ( SUCCESS != l_rc )
{
PRDF_ERR( PRDF_FUNC"MBSFIR_AND write failed"
"for 0x%08x", i_chip->GetId());
break;
}
}while( 0 );
return SUCCESS;
#undef PRDF_FUNC
} PRDF_PLUGIN_DEFINE( Membuf, ClearMbsSecondaryBits );
int32_t cleanupSecondaryFirBits( ExtensibleChip * i_chip,
TYPE i_busType,
uint32_t i_busPos )
{
int32_t l_rc = SUCCESS;
TargetHandle_t mcsTgt = NULL;
TargetHandle_t mbTgt = NULL;
ExtensibleChip * mcsChip = NULL;
ExtensibleChip * mbChip = NULL;
//In case of spare deployed attention for DMI bus, we need to clear
// secondary MBIFIR[10] and MCIFIR[10] bits.
do
{
if ( i_busType == TYPE_MCS )
{
mcsTgt = getConnectedChild( i_chip->GetChipHandle(),
TYPE_MCS,
i_busPos);
if (!mcsTgt) break;
mcsChip = ( ExtensibleChip * )systemPtr->GetChip( mcsTgt );
if (!mcsChip) break;
mbChip = getMcsDataBundle( mcsChip )->getMembChip();
if (!mbChip) break;
mbTgt = mbChip->GetChipHandle();
if (!mbTgt) break;
}
else if ( i_busType == TYPE_MEMBUF )
{
mbTgt = i_chip->GetChipHandle();
if (!mbTgt) break;
mcsChip = getMembufDataBundle( i_chip )->getMcsChip();
if (!mcsChip) break;
mcsTgt = mcsChip->GetChipHandle();
if (!mcsTgt) break;
mbChip = i_chip;
}
else
{
// We only need to clean secondary FIR bits for DMI bus
l_rc = SUCCESS;
break;
}
SCAN_COMM_REGISTER_CLASS * mciAnd = mcsChip->getRegister("MCIFIR_AND");
SCAN_COMM_REGISTER_CLASS * mbiAnd = mbChip->getRegister( "MBIFIR_AND");
mciAnd->setAllBits(); mciAnd->ClearBit(10);
mbiAnd->setAllBits(); mbiAnd->ClearBit(10);
l_rc = mciAnd->Write();
l_rc |= mbiAnd->Write();
if ( SUCCESS != l_rc )
{
PRDF_ERR( "[cleanupSecondaryFirBits] Write() failed on "
"MCIFIR/MBIFIR: MCS=0x%08x MEMB=0x%08x",
mcsChip->GetId(), mbChip->GetId() );
break;
}
} while (0);
return l_rc;
}
