/// tryAliasOpMatch - This is a helper function for the CodeGenInstAlias /// constructor. It checks if an argument in an InstAlias pattern matches /// the corresponding operand of the instruction. It returns true on a /// successful match, with ResOp set to the result operand to be used. bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, Record *InstOpRec, bool hasSubOps, SMLoc Loc, CodeGenTarget &T, ResultOperand &ResOp) { Init *Arg = Result->getArg(AliasOpNo); DefInit *ADI = dynamic_cast<DefInit*>(Arg); if (ADI && ADI->getDef() == InstOpRec) { // If the operand is a record, it must have a name, and the record type // must match up with the instruction's argument type. if (Result->getArgName(AliasOpNo).empty()) throw TGError(Loc, "result argument #" + utostr(AliasOpNo) + " must have a name!"); ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef()); return true; } // Handle explicit registers. if (ADI && ADI->getDef()->isSubClassOf("Register")) { if (!InstOpRec->isSubClassOf("RegisterClass")) return false; if (!T.getRegisterClass(InstOpRec) .contains(T.getRegBank().getReg(ADI->getDef()))) throw TGError(Loc, "fixed register " +ADI->getDef()->getName() + " is not a member of the " + InstOpRec->getName() + " register class!"); if (!Result->getArgName(AliasOpNo).empty()) throw TGError(Loc, "result fixed register argument must " "not have a name!"); ResOp = ResultOperand(ADI->getDef()); return true; } // Handle "zero_reg" for optional def operands. if (ADI && ADI->getDef()->getName() == "zero_reg") { // Check if this is an optional def. if (!InstOpRec->isSubClassOf("OptionalDefOperand")) throw TGError(Loc, "reg0 used for result that is not an " "OptionalDefOperand!"); ResOp = ResultOperand(static_cast<Record*>(0)); return true; } if (IntInit *II = dynamic_cast<IntInit*>(Arg)) { if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) return false; // Integer arguments can't have names. if (!Result->getArgName(AliasOpNo).empty()) throw TGError(Loc, "result argument #" + utostr(AliasOpNo) + " must not have a name!"); ResOp = ResultOperand(II->getValue()); return true; } return false; }
/// tryAliasOpMatch - This is a helper function for the CodeGenInstAlias /// constructor. It checks if an argument in an InstAlias pattern matches /// the corresponding operand of the instruction. It returns true on a /// successful match, with ResOp set to the result operand to be used. bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc, CodeGenTarget &T, ResultOperand &ResOp) { Init *Arg = Result->getArg(AliasOpNo); DefInit *ADI = dyn_cast<DefInit>(Arg); Record *ResultRecord = ADI ? ADI->getDef() : nullptr; if (ADI && ADI->getDef() == InstOpRec) { // If the operand is a record, it must have a name, and the record type // must match up with the instruction's argument type. if (Result->getArgName(AliasOpNo).empty()) PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) + " must have a name!"); ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord); return true; } // For register operands, the source register class can be a subclass // of the instruction register class, not just an exact match. if (InstOpRec->isSubClassOf("RegisterOperand")) InstOpRec = InstOpRec->getValueAsDef("RegClass"); if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) ADI = ADI->getDef()->getValueAsDef("RegClass")->getDefInit(); if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) { if (!InstOpRec->isSubClassOf("RegisterClass")) return false; if (!T.getRegisterClass(InstOpRec) .hasSubClass(&T.getRegisterClass(ADI->getDef()))) return false; ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord); return true; } // Handle explicit registers. if (ADI && ADI->getDef()->isSubClassOf("Register")) { if (InstOpRec->isSubClassOf("OptionalDefOperand")) { DagInit *DI = InstOpRec->getValueAsDag("MIOperandInfo"); // The operand info should only have a single (register) entry. We // want the register class of it. InstOpRec = cast<DefInit>(DI->getArg(0))->getDef(); } if (!InstOpRec->isSubClassOf("RegisterClass")) return false; if (!T.getRegisterClass(InstOpRec) .contains(T.getRegBank().getReg(ADI->getDef()))) PrintFatalError(Loc, "fixed register " + ADI->getDef()->getName() + " is not a member of the " + InstOpRec->getName() + " register class!"); if (!Result->getArgName(AliasOpNo).empty()) PrintFatalError(Loc, "result fixed register argument must " "not have a name!"); ResOp = ResultOperand(ResultRecord); return true; } // Handle "zero_reg" for optional def operands. if (ADI && ADI->getDef()->getName() == "zero_reg") { // Check if this is an optional def. // Tied operands where the source is a sub-operand of a complex operand // need to represent both operands in the alias destination instruction. // Allow zero_reg for the tied portion. This can and should go away once // the MC representation of things doesn't use tied operands at all. //if (!InstOpRec->isSubClassOf("OptionalDefOperand")) // throw TGError(Loc, "reg0 used for result that is not an " // "OptionalDefOperand!"); ResOp = ResultOperand(static_cast<Record*>(nullptr)); return true; } // Literal integers. if (IntInit *II = dyn_cast<IntInit>(Arg)) { if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) return false; // Integer arguments can't have names. if (!Result->getArgName(AliasOpNo).empty()) PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) + " must not have a name!"); ResOp = ResultOperand(II->getValue()); return true; } // If both are Operands with the same MVT, allow the conversion. It's // up to the user to make sure the values are appropriate, just like // for isel Pat's. if (InstOpRec->isSubClassOf("Operand") && ADI->getDef()->isSubClassOf("Operand")) { // FIXME: What other attributes should we check here? Identical // MIOperandInfo perhaps? if (InstOpRec->getValueInit("Type") != ADI->getDef()->getValueInit("Type")) return false; ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef()); return true; } return false; }
CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) { AsmString = R->getValueAsString("AsmString"); Result = R->getValueAsDag("ResultInst"); // Verify that the root of the result is an instruction. DefInit *DI = dynamic_cast<DefInit*>(Result->getOperator()); if (DI == 0 || !DI->getDef()->isSubClassOf("Instruction")) throw TGError(R->getLoc(), "result of inst alias should be an instruction"); ResultInst = &T.getInstruction(DI->getDef()); // NameClass - If argument names are repeated, we need to verify they have // the same class. StringMap<Record*> NameClass; // Decode and validate the arguments of the result. unsigned AliasOpNo = 0; for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { // Tied registers don't have an entry in the result dag. if (ResultInst->Operands[i].getTiedRegister() != -1) continue; if (AliasOpNo >= Result->getNumArgs()) throw TGError(R->getLoc(), "result has " + utostr(Result->getNumArgs()) + " arguments, but " + ResultInst->TheDef->getName() + " instruction expects " + utostr(ResultInst->Operands.size()) + " operands!"); Init *Arg = Result->getArg(AliasOpNo); Record *ResultOpRec = ResultInst->Operands[i].Rec; // Handle explicit registers. if (DefInit *ADI = dynamic_cast<DefInit*>(Arg)) { if (ADI->getDef()->isSubClassOf("Register")) { if (!Result->getArgName(AliasOpNo).empty()) throw TGError(R->getLoc(), "result fixed register argument must " "not have a name!"); if (!ResultOpRec->isSubClassOf("RegisterClass")) throw TGError(R->getLoc(), "result fixed register argument is not " "passed to a RegisterClass operand!"); if (!T.getRegisterClass(ResultOpRec).containsRegister(ADI->getDef())) throw TGError(R->getLoc(), "fixed register " +ADI->getDef()->getName() + " is not a member of the " + ResultOpRec->getName() + " register class!"); // Now that it is validated, add it. ResultOperands.push_back(ResultOperand(ADI->getDef())); ++AliasOpNo; continue; } } // If the operand is a record, it must have a name, and the record type must // match up with the instruction's argument type. if (DefInit *ADI = dynamic_cast<DefInit*>(Arg)) { if (Result->getArgName(AliasOpNo).empty()) throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + " must have a name!"); if (ADI->getDef() != ResultOpRec) throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + " declared with class " + ADI->getDef()->getName() + ", instruction operand is class " + ResultOpRec->getName()); // Verify we don't have something like: (someinst GR16:$foo, GR32:$foo) // $foo can exist multiple times in the result list, but it must have the // same type. Record *&Entry = NameClass[Result->getArgName(AliasOpNo)]; if (Entry && Entry != ADI->getDef()) throw TGError(R->getLoc(), "result value $" + Result->getArgName(AliasOpNo) + " is both " + Entry->getName() + " and " + ADI->getDef()->getName() + "!"); // Now that it is validated, add it. ResultOperands.push_back(ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef())); ++AliasOpNo; continue; } if (IntInit *II = dynamic_cast<IntInit*>(Arg)) { // Integer arguments can't have names. if (!Result->getArgName(AliasOpNo).empty()) throw TGError(R->getLoc(), "result argument #" + utostr(AliasOpNo) + " must not have a name!"); if (ResultInst->Operands[i].MINumOperands != 1 || !ResultOpRec->isSubClassOf("Operand")) throw TGError(R->getLoc(), "invalid argument class " + ResultOpRec->getName() + " for integer result operand!"); ResultOperands.push_back(ResultOperand(II->getValue())); ++AliasOpNo; continue; } throw TGError(R->getLoc(), "result of inst alias has unknown operand type"); } if (AliasOpNo != Result->getNumArgs()) throw TGError(R->getLoc(), "result has " + utostr(Result->getNumArgs()) + " arguments, but " + ResultInst->TheDef->getName() + " instruction expects " + utostr(ResultInst->Operands.size())+ " operands!"); }