//Multi-Layer Construction
//J-You class must change to multiple WireList & GateList
//
void CirMgr::multi_Layer(size_t Layer=0){
//TODO input the longest route
size_t layerSize = Layer;
size_t wireSize = WireList[0].size();
size_t gateSize = GateList[0].size();
size_t inputSize = InputList[0].size();
size_t outputSize = OutputList[0].size();
for(size_t i=0; i<layerSize; ++i){
//i is previous levelu
//i+1 is current level
vector<Wire*> currentWireList;
vector<Gate*> currentGateList;
vector<Wire*> currentInputList;
int in0, in1, out;
for(size_t j=0; j<wireSize; ++j){
Wire* wire = new Wire(WireList[i][j]->getId());
wire->setListNum(j);
currentWireList.push_back(wire);
/*if(j>=inputSize && j<outputSize+inputSize){
currentWireList.push_back(wire);
}*/
}
#ifdef DEBUG
cerr << "constuct a layer, new current WireList[i]" << endl;
#endif
//input of newer
if(i == 0){
for(size_t k=0; k<inputSize; ++k){
currentWireList[k]->setFin(0);
currentInputList.push_back(currentWireList[k]);
}
InputList.push_back(currentInputList);
}
#ifdef DEBUG
if(i==0){
cerr<< " Second layer input = " << endl;
for(size_t j=0 ; j<inputSize ; ++j){
cerr << currentInputList[j]->getId() << " ";
}
}
#endif
//gate implement
for(size_t j=0; j<gateSize; ++j){
Gate* gate = new Gate(GateList[i][j]->getType(),GateList[i][j]->getId(),0,0,0);
#ifdef DEBUG
cerr << "new Gate in gateList["<<i<<"][" << j << "] --FINISHED..." << endl;
#endif
in0 = GateList[i][j]->getFin0VecNum();
out = GateList[i][j]->getFoutVecNum();
if(in0<(int)inputSize){
gate->setFin0(InputList[1][in0]);
InputList[1][in0]->addFout(gate);
}
else{
gate->setFin0(WireList[i][in0]);
WireList[i][in0]->addFout(gate);
}
gate->setFout(currentWireList[out]);
currentWireList[out]->setFin(gate);
if(gate->getType()!="NOT1"){
in1 = GateList[i][j]->getFin1VecNum();
if(in1<(int)inputSize){
gate->setFin1(InputList[1][in1]);
InputList[1][in1]->addFout(gate);
}
else{
gate->setFin1(WireList[i][in1]);
WireList[i][in1]->addFout(gate);
}
setVNum(gate,out,in0,in1);
}
else{
setVNum(gate,out,in0);
}
currentGateList.push_back(gate);
}
WireList.push_back(currentWireList);
GateList.push_back(currentGateList);
}
#ifdef DEBUG
cerr <<"Check All Gate"<< endl;
for(size_t i=0;i<layerSize;++i){
cerr<<"\n*********LAYER "<<i<<"*********\n"<<endl;
for(size_t j=0;j<gateSize;++j){
checkGate(GateList[i][j]);
}
}
#endif
}
