TRACK* TRACK::GetStartNetCode( int NetCode )
{
TRACK* Track = this;
int ii = 0;
if( NetCode == -1 )
NetCode = GetNetCode();
while( Track != NULL )
{
if( Track->GetNetCode() > NetCode )
break;
if( Track->GetNetCode() == NetCode )
{
ii++;
break;
}
Track = (TRACK*) Track->Pnext;
}
if( ii )
return Track;
else
return NULL;
}
void ROUTER_TOOL::NeighboringSegmentFilter( const VECTOR2I& aPt, GENERAL_COLLECTOR& aCollector )
{
/*
* If the collection contains a trivial line corner (two connected segments)
* or a non-fanout-via (a via with no more than two connected segments), then
* trim the collection down to a single item (which one won't matter since
* they're all connected).
*/
// First make sure we've got something that *might* match.
int vias = aCollector.CountType( PCB_VIA_T );
int traces = aCollector.CountType( PCB_TRACE_T );
if( vias > 1 || traces > 2 || vias + traces < 1 )
return;
// Fetch first TRACK (via or trace) as our reference
TRACK* reference = nullptr;
for( int i = 0; !reference && i < aCollector.GetCount(); i++ )
reference = dynamic_cast<TRACK*>( aCollector[i] );
int refNet = reference->GetNetCode();
wxPoint refPoint( aPt.x, aPt.y );
STATUS_FLAGS flags = reference->IsPointOnEnds( refPoint, -1 );
if( flags & STARTPOINT )
refPoint = reference->GetStart();
else if( flags & ENDPOINT )
refPoint = reference->GetEnd();
// Check all items to ensure that any TRACKs are co-terminus with the reference and on
// the same net.
for( int i = 0; i < aCollector.GetCount(); i++ )
{
TRACK* neighbor = dynamic_cast<TRACK*>( aCollector[i] );
if( neighbor && neighbor != reference )
{
if( neighbor->GetNetCode() != refNet )
return;
if( neighbor->GetStart() != refPoint && neighbor->GetEnd() != refPoint )
return;
}
}
// Selection meets criteria; trim it to the reference item.
aCollector.Empty();
aCollector.Append( reference );
}
bool TRACKS_CLEANER::remove_duplicates_of_track( const TRACK *aTrack )
{
bool modified = false;
TRACK *nextsegment;
for( TRACK *other = aTrack->Next(); other; other = nextsegment )
{
nextsegment = other->Next();
// New netcode, break out (can't be there any other)
if( aTrack->GetNetCode() != other->GetNetCode() )
break;
// Must be of the same type, on the same layer and the endpoints
// must be the same (maybe swapped)
if( (aTrack->Type() != other->Type()) &&
(aTrack->GetLayer() != other->GetLayer()) )
{
if( ((aTrack->GetStart() == other->GetStart()) &&
(aTrack->GetEnd() == other->GetEnd())) ||
((aTrack->GetStart() == other->GetEnd()) &&
(aTrack->GetEnd() == other->GetStart())))
{
m_Brd->GetRatsnest()->Remove( other );
other->ViewRelease();
other->DeleteStructure();
modified = true;
}
}
}
return modified;
}
/*
* Test all connections of the board,
* and update subnet variable of pads and tracks
* TestForActiveLinksInRatsnest must be called after this function
* to update active/inactive ratsnest items status
*/
void PCB_BASE_FRAME::TestConnections()
{
// Clear the cluster identifier for all pads
for( unsigned i = 0; i< m_Pcb->GetPadCount(); ++i )
{
D_PAD* pad = m_Pcb->GetPad(i);
pad->SetZoneSubNet( 0 );
pad->SetSubNet( 0 );
}
m_Pcb->Test_Connections_To_Copper_Areas();
// Test existing connections net by net
// note some nets can have no tracks, and pads intersecting
// so Build_CurrNet_SubNets_Connections must be called for each net
CONNECTIONS connections( m_Pcb );
int last_net_tested = 0;
int current_net_code = 0;
for( TRACK* track = m_Pcb->m_Track; track; )
{
// At this point, track is the first track of a given net
current_net_code = track->GetNetCode();
// Get last track of the current net
TRACK* lastTrack = track->GetEndNetCode( current_net_code );
if( current_net_code > 0 ) // do not spend time if net code = 0 ( dummy net )
{
// Test all previous nets having no tracks
for( int net = last_net_tested+1; net < current_net_code; net++ )
connections.Build_CurrNet_SubNets_Connections( NULL, NULL, net );
connections.Build_CurrNet_SubNets_Connections( track, lastTrack, current_net_code );
last_net_tested = current_net_code;
}
track = lastTrack->Next(); // this is now the first track of the next net
}
// Test last nets without tracks, if any
int netsCount = m_Pcb->GetNetCount();
for( int net = last_net_tested+1; net < netsCount; net++ )
connections.Build_CurrNet_SubNets_Connections( NULL, NULL, net );
Merge_SubNets_Connected_By_CopperAreas( m_Pcb );
return;
}
TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
{
TRACK* track;
if( Type() == PCB_ZONE_T )
track = aPcb->m_Zone;
else
track = aPcb->m_Track;
for( ; track; track = track->Next() )
{
if( GetNetCode() <= track->GetNetCode() )
return track;
}
return NULL;
}
void BOARD::DrawHighLight( EDA_DRAW_PANEL* am_canvas, wxDC* DC, int aNetCode )
{
GR_DRAWMODE draw_mode;
if( IsHighLightNetON() )
draw_mode = GR_HIGHLIGHT | GR_OR;
else
draw_mode = GR_AND | GR_HIGHLIGHT;
// Redraw zones
for( int ii = 0; ii < GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetArea( ii );
if( zone->GetNetCode() == aNetCode )
{
zone->Draw( am_canvas, DC, draw_mode );
}
}
// Redraw any pads that have aNetCode
for( MODULE* module = m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
{
if( pad->GetNetCode() == aNetCode )
{
pad->Draw( am_canvas, DC, draw_mode );
}
}
}
// Redraw track and vias that have aNetCode
for( TRACK* seg = m_Track; seg; seg = seg->Next() )
{
if( seg->GetNetCode() == aNetCode )
{
seg->Draw( am_canvas, DC, draw_mode );
}
}
}
void NETINFO_MAPPING::Update()
{
// Collect all the used nets
std::set<int> nets;
// Be sure that the unconnected gets 0 and is mapped as 0
nets.insert( 0 );
// Zones
for( int i = 0; i < m_board->GetAreaCount(); ++i )
nets.insert( m_board->GetArea( i )->GetNetCode() );
// Tracks
for( TRACK* track = m_board->m_Track; track; track = track->Next() )
nets.insert( track->GetNetCode() );
// Modules/pads
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
{
nets.insert( pad->GetNetCode() );
}
}
// Segzones
for( SEGZONE* zone = m_board->m_Zone; zone; zone = zone->Next() )
nets.insert( zone->GetNetCode() );
// Prepare the new mapping
m_netMapping.clear();
// Now the nets variable stores all the used net codes (not only for pads) and we are ready to
// assign new consecutive net numbers
int newNetCode = 0;
for( std::set<int>::const_iterator it = nets.begin(), itEnd = nets.end(); it != itEnd; ++it )
m_netMapping[*it] = newNetCode++;
}
TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
{
TRACK* track;
// When reading from a file most of the items will already be in the correct order.
// Searching from the back therefore takes us from n^2 to essentially 0.
if( Type() == PCB_ZONE_T ) // Deprecated items, only found in very old boards
track = aPcb->m_SegZoneDeprecated.GetLast();
else
track = aPcb->m_Track.GetLast();
for( ; track; track = track->Back() )
{
if( GetNetCode() >= track->GetNetCode() )
return track->Next();
}
if( Type() == PCB_ZONE_T ) // Deprecated
return aPcb->m_SegZoneDeprecated.GetFirst();
else
return aPcb->m_Track.GetFirst();
}
TRACK* TRACK::GetTrack( TRACK* aStartTrace, TRACK* aEndTrace, ENDPOINT_T aEndPoint,
bool aSameNetOnly, bool aSequential )
{
const wxPoint &position = GetEndPoint( aEndPoint );
LAYER_MSK refLayers = GetLayerMask();
TRACK *previousSegment;
TRACK *nextSegment;
if( aSequential )
{
// Simple sequential search: from aStartTrace forward to aEndTrace
previousSegment = NULL;
nextSegment = aStartTrace;
}
else
{
/* Local bidirectional search: from this backward to aStartTrace
* AND forward to aEndTrace. The idea is that nearest segments
* are found (on average) faster in this way. In fact same-net
* segments are almost guaranteed to be found faster, in a global
* search, since they are grouped together in the track list */
previousSegment = this;
nextSegment = this;
}
while( nextSegment || previousSegment )
{
// Terminate the search in the direction if the netcode mismatches
if( aSameNetOnly )
{
if( nextSegment && (nextSegment->GetNetCode() != GetNetCode()) )
nextSegment = NULL;
if( previousSegment && (previousSegment->GetNetCode() != GetNetCode()) )
previousSegment = NULL;
}
if( nextSegment )
{
if ( (nextSegment != this) &&
!nextSegment->GetState( BUSY | IS_DELETED ) &&
(refLayers & nextSegment->GetLayerMask()) )
{
if( (position == nextSegment->m_Start) ||
(position == nextSegment->m_End) )
return nextSegment;
}
// Keep looking forward
if( nextSegment == aEndTrace )
nextSegment = NULL;
else
nextSegment = nextSegment->Next();
}
// Same as above, looking back. During sequential search this branch is inactive
if( previousSegment )
{
if ( (previousSegment != this) &&
!previousSegment->GetState( BUSY | IS_DELETED ) &&
(refLayers & previousSegment->GetLayerMask()) )
{
if( (position == previousSegment->m_Start) ||
(position == previousSegment->m_End) )
return previousSegment;
}
if( previousSegment == aStartTrace )
previousSegment = NULL;
else
previousSegment = previousSegment->Back();
}
}
return NULL;
}
// Handles the selection of command events.
void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
{
int id = event.GetId();
LAYER_NUM itmp;
INSTALL_UNBUFFERED_DC( dc, m_canvas );
MODULE* module;
m_canvas->CrossHairOff( &dc );
switch( id ) // Some (not all ) edit commands must be finished or aborted
{
case wxID_CUT:
case wxID_COPY:
case ID_PCB_USER_GRID_SETUP:
case ID_TOOLBARH_PCB_SELECT_LAYER:
case ID_AUX_TOOLBAR_PCB_SELECT_LAYER_PAIR:
case ID_POPUP_PCB_ROTATE_TEXTEPCB:
case ID_POPUP_PCB_FLIP_TEXTEPCB:
case ID_POPUP_PCB_COPY_TEXTEPCB:
case ID_POPUP_PCB_EDIT_TEXTEPCB:
case ID_POPUP_PCB_EDIT_MIRE:
case ID_POPUP_PCB_ROTATE_TEXTMODULE:
case ID_POPUP_PCB_ROTATE_MODULE_CLOCKWISE:
case ID_POPUP_PCB_ROTATE_MODULE_COUNTERCLOCKWISE:
case ID_POPUP_PCB_CHANGE_SIDE_MODULE:
case ID_POPUP_PCB_EDIT_MODULE_PRMS:
case ID_POPUP_PCB_EDIT_MODULE_WITH_MODEDIT:
case ID_POPUP_PCB_EDIT_TEXTMODULE:
case ID_POPUP_PCB_STOP_CURRENT_DRAWING:
case ID_POPUP_PCB_BEGIN_TRACK:
case ID_POPUP_PCB_END_TRACK:
case ID_POPUP_PCB_PLACE_THROUGH_VIA:
case ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_THROUGH_VIA:
case ID_POPUP_PCB_PLACE_BLIND_BURIED_VIA:
case ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_BLIND_BURIED_VIA:
case ID_POPUP_PCB_PLACE_MICROVIA:
case ID_POPUP_PCB_SWITCH_TRACK_POSTURE:
case ID_POPUP_PCB_IMPORT_PAD_SETTINGS:
case ID_POPUP_PCB_EXPORT_PAD_SETTINGS:
case ID_POPUP_PCB_GLOBAL_IMPORT_PAD_SETTINGS:
case ID_POPUP_PCB_STOP_CURRENT_EDGE_ZONE:
case ID_POPUP_PCB_DELETE_ZONE_LAST_CREATED_CORNER:
case ID_POPUP_PCB_FILL_ALL_ZONES:
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_ALL_ZONES:
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE:
case ID_POPUP_PCB_PLACE_ZONE_CORNER:
case ID_POPUP_PCB_PLACE_ZONE_OUTLINES:
case ID_POPUP_PCB_EDIT_ZONE_PARAMS:
case ID_POPUP_PCB_DELETE_ZONE:
case ID_POPUP_PCB_MOVE_ZONE_CORNER:
case ID_POPUP_PCB_DRAG_ZONE_OUTLINE_SEGMENT:
case ID_POPUP_PCB_MOVE_ZONE_OUTLINES:
case ID_POPUP_PCB_ADD_ZONE_CORNER:
case ID_POPUP_PCB_DELETE_TRACKSEG:
case ID_POPUP_PCB_DELETE_TRACK:
case ID_POPUP_PCB_DELETE_TRACKNET:
case ID_POPUP_PCB_FILL_ZONE:
case ID_POPUP_PCB_SELECT_LAYER:
case ID_POPUP_PCB_SELECT_CU_LAYER:
case ID_POPUP_PCB_SELECT_LAYER_PAIR:
case ID_POPUP_PCB_SELECT_NO_CU_LAYER:
case ID_POPUP_PCB_MOVE_TRACK_NODE:
case ID_POPUP_PCB_MOVE_TEXTEPCB_REQUEST:
case ID_POPUP_PCB_DRAG_TRACK_SEGMENT_KEEP_SLOPE:
case ID_POPUP_PCB_DRAG_TRACK_SEGMENT:
case ID_POPUP_PCB_MOVE_TRACK_SEGMENT:
case ID_POPUP_PCB_PLACE_MOVED_TRACK_NODE:
case ID_POPUP_PCB_BREAK_TRACK:
case ID_POPUP_PCB_EDIT_NET:
case ID_POPUP_PCB_EDIT_TRACK:
case ID_POPUP_PCB_EDIT_TRACKSEG:
case ID_POPUP_PCB_LOCK_ON_TRACKSEG:
case ID_POPUP_PCB_LOCK_OFF_TRACKSEG:
case ID_POPUP_PCB_LOCK_ON_TRACK:
case ID_POPUP_PCB_LOCK_OFF_TRACK:
case ID_POPUP_PCB_LOCK_ON_NET:
case ID_POPUP_PCB_LOCK_OFF_NET:
case ID_POPUP_DELETE_BLOCK:
case ID_POPUP_PLACE_BLOCK:
case ID_POPUP_ZOOM_BLOCK:
case ID_POPUP_FLIP_BLOCK:
case ID_POPUP_ROTATE_BLOCK:
case ID_POPUP_COPY_BLOCK:
case ID_POPUP_PCB_EDIT_DRAWING:
case ID_POPUP_PCB_GETINFO_MARKER:
case ID_POPUP_PCB_MOVE_TEXT_DIMENSION_REQUEST:
case ID_POPUP_PCB_DRAG_MODULE_REQUEST:
case ID_POPUP_PCB_MOVE_MODULE_REQUEST:
case ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST:
case ID_POPUP_PCB_MOVE_MIRE_REQUEST:
break;
case ID_POPUP_CANCEL_CURRENT_COMMAND:
if( m_canvas->IsMouseCaptured() )
{
m_canvas->EndMouseCapture();
}
// Should not be executed, just in case
if( GetScreen()->m_BlockLocate.GetCommand() != BLOCK_IDLE )
{
GetScreen()->m_BlockLocate.SetCommand( BLOCK_IDLE );
GetScreen()->m_BlockLocate.SetState( STATE_NO_BLOCK );
GetScreen()->m_BlockLocate.ClearItemsList();
}
if( GetToolId() == ID_NO_TOOL_SELECTED )
SetToolID( ID_NO_TOOL_SELECTED, m_canvas->GetDefaultCursor(), wxEmptyString );
else
SetCursor( (wxStockCursor) m_canvas->GetDefaultCursor() );
break;
default: // Finish (abort) the command
if( m_canvas->IsMouseCaptured() )
m_canvas->CallEndMouseCapture( &dc );
if( GetToolId() != id )
{
if( m_lastDrawToolId != GetToolId() )
m_lastDrawToolId = GetToolId();
SetToolID( ID_NO_TOOL_SELECTED, m_canvas->GetDefaultCursor(), wxEmptyString );
}
break;
}
switch( id ) // Execute command
{
case 0:
break;
case ID_OPEN_MODULE_EDITOR:
{
FOOTPRINT_EDIT_FRAME* editor = (FOOTPRINT_EDIT_FRAME*) Kiway().Player( FRAME_PCB_MODULE_EDITOR, false );
if( !editor )
{
editor = (FOOTPRINT_EDIT_FRAME*) Kiway().Player( FRAME_PCB_MODULE_EDITOR, true );
editor->Show( true );
editor->Zoom_Automatique( false );
}
else
{
/* not needed on linux, other platforms need this?
if( editor->IsIconized() )
editor->Iconize( false );
*/
editor->Raise();
// Raising the window does not set the focus on Linux. This should work on
// any platform.
if( wxWindow::FindFocus() != editor )
editor->SetFocus();
}
}
break;
case ID_OPEN_MODULE_VIEWER:
{
FOOTPRINT_VIEWER_FRAME* viewer = (FOOTPRINT_VIEWER_FRAME*) Kiway().Player( FRAME_PCB_MODULE_VIEWER, false );
if( !viewer )
{
viewer = (FOOTPRINT_VIEWER_FRAME*) Kiway().Player( FRAME_PCB_MODULE_VIEWER, true );
viewer->Show( true );
viewer->Zoom_Automatique( false );
}
else
{
/* not needed on linux, other platforms need this?
if( viewer->IsIconized() )
viewer->Iconize( false );
*/
viewer->Raise();
// Raising the window does not set the focus on Linux. This should work on
// any platform.
if( wxWindow::FindFocus() != viewer )
viewer->SetFocus();
}
}
break;
case ID_PCB_GLOBAL_DELETE:
InstallPcbGlobalDeleteFrame( wxDefaultPosition );
break;
case ID_POPUP_PLACE_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_MOVE );
m_canvas->SetAutoPanRequest( false );
HandleBlockPlace( &dc );
break;
case ID_POPUP_COPY_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_COPY );
GetScreen()->m_BlockLocate.SetMessageBlock( this );
m_canvas->SetAutoPanRequest( false );
HandleBlockPlace( &dc );
break;
case ID_POPUP_ZOOM_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_ZOOM );
GetScreen()->m_BlockLocate.SetMessageBlock( this );
HandleBlockEnd( &dc );
break;
case ID_POPUP_DELETE_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_DELETE );
GetScreen()->m_BlockLocate.SetMessageBlock( this );
HandleBlockEnd( &dc );
break;
case ID_POPUP_ROTATE_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_ROTATE );
GetScreen()->m_BlockLocate.SetMessageBlock( this );
HandleBlockEnd( &dc );
break;
case ID_POPUP_FLIP_BLOCK:
GetScreen()->m_BlockLocate.SetCommand( BLOCK_FLIP );
GetScreen()->m_BlockLocate.SetMessageBlock( this );
HandleBlockEnd( &dc );
break;
case ID_DRC_CONTROL:
m_drc->ShowDialog();
break;
case ID_GET_NETLIST:
InstallNetlistFrame( &dc );
break;
case ID_FIND_ITEMS:
InstallFindFrame();
break;
case ID_POPUP_CLOSE_CURRENT_TOOL:
SetToolID( ID_NO_TOOL_SELECTED, m_canvas->GetDefaultCursor(), wxEmptyString );
break;
case ID_POPUP_CANCEL_CURRENT_COMMAND:
break;
case ID_POPUP_PCB_END_LINE:
m_canvas->MoveCursorToCrossHair();
// EndSegment(&dc);
break;
case ID_POPUP_PCB_EDIT_TRACK:
if( GetCurItem() == NULL )
break;
Edit_Track_Width( &dc, (TRACK*) GetCurItem() );
m_canvas->MoveCursorToCrossHair();
OnModify();
break;
case ID_POPUP_PCB_EDIT_TRACKSEG:
if( GetCurItem() == NULL )
break;
Edit_TrackSegm_Width( &dc, (TRACK*) GetCurItem() );
m_canvas->MoveCursorToCrossHair();
OnModify();
break;
case ID_POPUP_PCB_EDIT_ALL_VIAS_AND_TRACK_SIZE:
if( GetCurItem() == NULL )
break;
{
int type = GetCurItem()->Type();
if( type == PCB_TRACE_T || type == PCB_VIA_T )
{
BOARD_CONNECTED_ITEM*item = (BOARD_CONNECTED_ITEM*) GetCurItem();
DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS dlg( this, item->GetNetCode() );
dlg.ShowModal();
}
}
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_BEGIN_TRACK:
m_canvas->MoveCursorToCrossHair();
OnHotkeyBeginRoute( &dc );
break;
case ID_POPUP_PCB_END_TRACK:
m_canvas->MoveCursorToCrossHair();
End_Route( (TRACK*) GetCurItem(), &dc );
break;
case ID_POPUP_PCB_PLACE_MOVED_TRACK_NODE:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem()->IsDragging() )
{
PlaceDraggedOrMovedTrackSegment( (TRACK*) GetCurItem(), &dc );
}
break;
case ID_POPUP_PCB_SWITCH_TRACK_POSTURE:
/* change the position of initial segment when creating new tracks
* switch from _/ to -\ .
* If a track is in progress, it will be redrawn
*/
if( m_canvas->IsMouseCaptured() )
m_canvas->CallMouseCapture( &dc, wxDefaultPosition, false );
g_Alternate_Track_Posture = !g_Alternate_Track_Posture;
if( m_canvas->IsMouseCaptured() )
m_canvas->CallMouseCapture( &dc, wxDefaultPosition, false );
break;
case ID_POPUP_PCB_PLACE_MICROVIA:
if( !IsMicroViaAcceptable() )
break;
// fall through
case ID_POPUP_PCB_PLACE_BLIND_BURIED_VIA:
case ID_POPUP_PCB_PLACE_THROUGH_VIA:
case ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_THROUGH_VIA:
case ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_BLIND_BURIED_VIA:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem()->IsDragging() )
{
PlaceDraggedOrMovedTrackSegment( (TRACK*) GetCurItem(), &dc );
}
else
{
BOARD_DESIGN_SETTINGS &settings = GetDesignSettings();
VIATYPE_T v_type = settings.m_CurrentViaType;
switch( id )
{
case ID_POPUP_PCB_PLACE_BLIND_BURIED_VIA:
case ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_BLIND_BURIED_VIA:
settings.m_CurrentViaType = VIA_BLIND_BURIED;
break;
case ID_POPUP_PCB_PLACE_MICROVIA:
settings.m_CurrentViaType = VIA_MICROVIA;
break;
default:
settings.m_CurrentViaType = VIA_THROUGH;
break;
}
// place via and switch layer.
if( id == ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_THROUGH_VIA ||
id == ID_POPUP_PCB_SELECT_CU_LAYER_AND_PLACE_BLIND_BURIED_VIA )
{
m_canvas->SetIgnoreMouseEvents( true );
wxPoint dlgPosition;
wxGetMousePosition( &dlgPosition.x, &dlgPosition.y );
LAYER_NUM layer = SelectLayer( getActiveLayer(), ALL_NO_CU_LAYERS,
dlgPosition );
m_canvas->SetIgnoreMouseEvents( false );
m_canvas->MoveCursorToCrossHair();
if( getActiveLayer() != layer )
{
GetScreen()->m_Route_Layer_TOP = getActiveLayer();
GetScreen()->m_Route_Layer_BOTTOM = layer;
Other_Layer_Route( (TRACK*) GetCurItem(), &dc );
}
}
else
Other_Layer_Route( (TRACK*) GetCurItem(), &dc );
settings.m_CurrentViaType = v_type;
if( DisplayOpt.ContrastModeDisplay )
m_canvas->Refresh();
}
break;
case ID_POPUP_PCB_DELETE_TRACKSEG:
if( GetCurItem() == NULL )
break;
m_canvas->MoveCursorToCrossHair();
SetCurItem( Delete_Segment( &dc, (TRACK*) GetCurItem() ) );
OnModify();
break;
case ID_POPUP_PCB_DELETE_TRACK:
if( GetCurItem() == NULL )
break;
m_canvas->MoveCursorToCrossHair();
Delete_Track( &dc, (TRACK*) GetCurItem() );
SetCurItem( NULL );
OnModify();
break;
case ID_POPUP_PCB_DELETE_TRACKNET:
m_canvas->MoveCursorToCrossHair();
Delete_net( &dc, (TRACK*) GetCurItem() );
SetCurItem( NULL );
OnModify();
break;
case ID_POPUP_PCB_LOCK_ON_TRACKSEG:
Attribut_Segment( (TRACK*) GetCurItem(), &dc, true );
break;
case ID_POPUP_PCB_LOCK_OFF_TRACKSEG:
Attribut_Segment( (TRACK*) GetCurItem(), &dc, false );
break;
case ID_POPUP_PCB_LOCK_ON_TRACK:
Attribut_Track( (TRACK*) GetCurItem(), &dc, true );
break;
case ID_POPUP_PCB_LOCK_OFF_TRACK:
Attribut_Track( (TRACK*) GetCurItem(), &dc, false );
break;
case ID_POPUP_PCB_LOCK_ON_NET:
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNetCode(), true );
break;
case ID_POPUP_PCB_LOCK_OFF_NET:
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNetCode(), false );
break;
case ID_POPUP_PCB_SETFLAGS_TRACK_MNU:
break;
case ID_POPUP_PCB_DELETE_ZONE:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem() == NULL )
break;
{
SEGZONE* zsegm = (SEGZONE*) GetCurItem();
int netcode = zsegm->GetNetCode();
Delete_OldZone_Fill( zsegm );
SetCurItem( NULL );
TestNetConnection( NULL, netcode );
OnModify();
SetMsgPanel( GetBoard() );
}
break;
case ID_POPUP_PCB_EDIT_ZONE_PARAMS:
Edit_Zone_Params( &dc, (ZONE_CONTAINER*) GetCurItem() );
SetCurItem( NULL ); // Outlines can have changed
break;
case ID_POPUP_PCB_ZONE_DUPLICATE:
{
ZONE_CONTAINER* zone = (ZONE_CONTAINER*) GetCurItem();
duplicateZone( &dc, zone );
}
break;
case ID_POPUP_PCB_ZONE_ADD_SIMILAR_ZONE:
m_canvas->MoveCursorToCrossHair();
m_canvas->SetAutoPanRequest( true );
Add_Similar_Zone( &dc, (ZONE_CONTAINER*) GetCurItem() );
break;
case ID_POPUP_PCB_ZONE_ADD_CUTOUT_ZONE:
m_canvas->MoveCursorToCrossHair();
m_canvas->SetAutoPanRequest( true );
Add_Zone_Cutout( &dc, (ZONE_CONTAINER*) GetCurItem() );
break;
case ID_POPUP_PCB_DELETE_ZONE_CONTAINER:
case ID_POPUP_PCB_DELETE_ZONE_CUTOUT:
m_canvas->MoveCursorToCrossHair();
{
int netcode = ( (ZONE_CONTAINER*) GetCurItem() )->GetNetCode();
Delete_Zone_Contour( &dc, (ZONE_CONTAINER*) GetCurItem() );
SetCurItem( NULL );
TestNetConnection( NULL, netcode );
SetMsgPanel( GetBoard() );
}
break;
case ID_POPUP_PCB_DELETE_ZONE_CORNER:
Remove_Zone_Corner( &dc, (ZONE_CONTAINER*) GetCurItem() );
SetCurItem( NULL );
break;
case ID_POPUP_PCB_MOVE_ZONE_CORNER:
{
m_canvas->MoveCursorToCrossHair();
ZONE_CONTAINER* zone_cont = (ZONE_CONTAINER*) GetCurItem();
m_canvas->SetAutoPanRequest( true );
Start_Move_Zone_Corner( &dc, zone_cont, zone_cont->GetSelectedCorner(), false );
break;
}
case ID_POPUP_PCB_DRAG_ZONE_OUTLINE_SEGMENT:
{
m_canvas->MoveCursorToCrossHair();
ZONE_CONTAINER* zone_cont = (ZONE_CONTAINER*) GetCurItem();
m_canvas->SetAutoPanRequest( true );
Start_Move_Zone_Drag_Outline_Edge( &dc, zone_cont, zone_cont->GetSelectedCorner() );
break;
}
case ID_POPUP_PCB_MOVE_ZONE_OUTLINES:
{
m_canvas->MoveCursorToCrossHair();
ZONE_CONTAINER* zone_cont = (ZONE_CONTAINER*) GetCurItem();
m_canvas->SetAutoPanRequest( true );
Start_Move_Zone_Outlines( &dc, zone_cont );
break;
}
case ID_POPUP_PCB_ADD_ZONE_CORNER:
{
m_canvas->MoveCursorToCrossHair();
ZONE_CONTAINER* zone_cont = (ZONE_CONTAINER*) GetCurItem();
wxPoint pos = GetCrossHairPosition();
/* add corner between zone_cont->m_CornerSelection
* and zone_cont->m_CornerSelection+1
* and start move the new corner
*/
zone_cont->Draw( m_canvas, &dc, GR_XOR );
zone_cont->Outline()->InsertCorner( zone_cont->GetSelectedCorner(), pos.x, pos.y );
zone_cont->SetSelectedCorner( zone_cont->GetSelectedCorner() + 1 );
zone_cont->Draw( m_canvas, &dc, GR_XOR );
m_canvas->SetAutoPanRequest( true );
Start_Move_Zone_Corner( &dc, zone_cont, zone_cont->GetSelectedCorner(), true );
break;
}
case ID_POPUP_PCB_PLACE_ZONE_OUTLINES:
case ID_POPUP_PCB_PLACE_ZONE_CORNER:
{
m_canvas->MoveCursorToCrossHair();
ZONE_CONTAINER* zone_cont = (ZONE_CONTAINER*) GetCurItem();
End_Move_Zone_Corner_Or_Outlines( &dc, zone_cont );
m_canvas->SetAutoPanRequest( false );
break;
}
case ID_POPUP_PCB_FILL_ALL_ZONES:
m_canvas->MoveCursorToCrossHair();
Fill_All_Zones( this );
m_canvas->Refresh();
SetMsgPanel( GetBoard() );
break;
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE:
if( ( GetCurItem() )->Type() == PCB_ZONE_AREA_T )
{
ZONE_CONTAINER* zone_container = (ZONE_CONTAINER*) GetCurItem();
zone_container->UnFill();
TestNetConnection( NULL, zone_container->GetNetCode() );
OnModify();
SetMsgPanel( GetBoard() );
m_canvas->Refresh();
}
SetCurItem( NULL );
break;
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_ALL_ZONES: // Remove all zones :
GetBoard()->m_Zone.DeleteAll(); // remove zone segments used to fill zones.
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ )
{
// Remove filled areas in zone
ZONE_CONTAINER* zone_container = GetBoard()->GetArea( ii );
zone_container->ClearFilledPolysList();
}
SetCurItem( NULL ); // CurItem might be deleted by this command, clear the pointer
TestConnections();
TestForActiveLinksInRatsnest( 0 ); // Recalculate the active ratsnest, i.e. the unconnected links
OnModify();
SetMsgPanel( GetBoard() );
m_canvas->Refresh();
break;
case ID_POPUP_PCB_FILL_ZONE:
m_canvas->MoveCursorToCrossHair();
Fill_Zone( (ZONE_CONTAINER*) GetCurItem() );
TestNetConnection( NULL, ( (ZONE_CONTAINER*) GetCurItem() )->GetNetCode() );
SetMsgPanel( GetBoard() );
m_canvas->Refresh();
break;
case ID_POPUP_PCB_MOVE_TEXTEPCB_REQUEST:
StartMoveTextePcb( (TEXTE_PCB*) GetCurItem(), &dc );
m_canvas->SetAutoPanRequest( true );
break;
case ID_POPUP_PCB_DRAG_MODULE_REQUEST:
case ID_POPUP_PCB_MOVE_MODULE_REQUEST:
if( GetCurItem() == NULL )
break;
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
SendMessageToEESCHEMA( module );
SetCrossHairPosition( module->GetPosition() );
m_canvas->MoveCursorToCrossHair();
StartMoveModule( module, &dc, id == ID_POPUP_PCB_DRAG_MODULE_REQUEST );
break;
case ID_POPUP_PCB_GET_AND_MOVE_MODULE_REQUEST: // get module by name and move it
SetCurItem( GetModuleByName() );
module = (MODULE*) GetCurItem();
if( module == NULL )
break;
if( module->IsLocked() )
{
wxString msg = wxString::Format(
_( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
SendMessageToEESCHEMA( module );
m_canvas->MoveCursorToCrossHair();
StartMoveModule( module, &dc, false );
break;
case ID_POPUP_PCB_DELETE_MODULE:
m_canvas->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
if( Delete_Module( (MODULE*) GetCurItem(), &dc, true ) )
{
SetCurItem( NULL );
}
break;
case ID_POPUP_PCB_ROTATE_MODULE_COUNTERCLOCKWISE:
m_canvas->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
// This is a simple rotation, no other editing in progress
if( !GetCurItem()->IsMoving() )
SaveCopyInUndoList( GetCurItem(), UR_CHANGED, ((MODULE*)GetCurItem())->GetPosition() );
Rotate_Module( &dc, (MODULE*) GetCurItem(), m_rotationAngle, true );
break;
case ID_POPUP_PCB_ROTATE_MODULE_CLOCKWISE:
m_canvas->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
// This is a simple rotation, no other editing in progress
if( !GetCurItem()->IsMoving() )
SaveCopyInUndoList( GetCurItem(), UR_CHANGED, ((MODULE*)GetCurItem())->GetPosition() );
Rotate_Module( &dc, (MODULE*) GetCurItem(), -m_rotationAngle, true );
break;
case ID_POPUP_PCB_CHANGE_SIDE_MODULE:
m_canvas->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "Footprint %s found, but it is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
// This is a simple flip, no other editing in progress
if( !GetCurItem()->IsMoving() )
SaveCopyInUndoList( GetCurItem(), UR_FLIPPED, ((MODULE*)GetCurItem())->GetPosition() );
Change_Side_Module( (MODULE*) GetCurItem(), &dc );
break;
case ID_POPUP_PCB_EDIT_MODULE_PRMS:
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
InstallModuleOptionsFrame( (MODULE*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_EDIT_MODULE_WITH_MODEDIT:
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
if( GetCurItem()->GetTimeStamp() == 0 ) // Module Editor needs a non null timestamp
{
GetCurItem()->SetTimeStamp( GetNewTimeStamp() );
OnModify();
}
{
FOOTPRINT_EDIT_FRAME* editor = (FOOTPRINT_EDIT_FRAME*) Kiway().Player( FRAME_PCB_MODULE_EDITOR, true );
editor->Load_Module_From_BOARD( (MODULE*)GetCurItem() );
SetCurItem( NULL ); // the current module could be deleted by
editor->Show( true );
editor->Raise(); // Iconize( false );
}
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DRAG_PAD_REQUEST:
module = (MODULE*) GetCurItem()->GetParent();
if( !module || module->Type() != PCB_MODULE_T )
break;
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "The parent (%s) of the pad is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
m_canvas->MoveCursorToCrossHair();
StartMovePad( (D_PAD*) GetCurItem(), &dc, true );
break;
case ID_POPUP_PCB_MOVE_PAD_REQUEST:
module = (MODULE*) GetCurItem()->GetParent();
if( !module || module->Type() != PCB_MODULE_T )
break;
if( module->IsLocked() )
{
wxString msg;
msg.Printf( _( "The parent (%s) of the pad is locked" ),
module->GetReference().GetData() );
DisplayInfoMessage( this, msg );
break;
}
m_canvas->MoveCursorToCrossHair();
StartMovePad( (D_PAD*) GetCurItem(), &dc, false );
break;
case ID_POPUP_PCB_EDIT_PAD:
InstallPadOptionsFrame( (D_PAD*) GetCurItem() );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_IMPORT_PAD_SETTINGS:
m_canvas->MoveCursorToCrossHair();
SaveCopyInUndoList( GetCurItem()->GetParent(), UR_CHANGED );
Import_Pad_Settings( (D_PAD*) GetCurItem(), true );
break;
case ID_POPUP_PCB_GLOBAL_IMPORT_PAD_SETTINGS:
m_canvas->MoveCursorToCrossHair();
DlgGlobalChange_PadSettings( (D_PAD*) GetCurItem(), true );
break;
case ID_POPUP_PCB_EXPORT_PAD_SETTINGS:
m_canvas->MoveCursorToCrossHair();
Export_Pad_Settings( (D_PAD*) GetCurItem() );
break;
case ID_POPUP_PCB_DELETE_PAD:
SaveCopyInUndoList( GetCurItem()->GetParent(), UR_CHANGED );
DeletePad( (D_PAD*) GetCurItem() );
SetCurItem( NULL );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_EDIT_TEXTMODULE:
InstallTextModOptionsFrame( (TEXTE_MODULE*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_RESET_TEXT_SIZE:
ResetTextSize( GetCurItem(), &dc );
break;
case ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST:
m_canvas->MoveCursorToCrossHair();
StartMoveTexteModule( (TEXTE_MODULE*) GetCurItem(), &dc );
break;
case ID_POPUP_PCB_ROTATE_TEXTMODULE:
RotateTextModule( (TEXTE_MODULE*) GetCurItem(),
&dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DELETE_TEXTMODULE:
DeleteTextModule( (TEXTE_MODULE*) GetCurItem() );
SetCurItem( NULL );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_SELECT_LAYER:
itmp = SelectLayer( getActiveLayer() );
if( itmp >= 0 )
{
// if user changed colors and we are in high contrast mode, then redraw
// because the PAD_SMD pads may change color.
if( DisplayOpt.ContrastModeDisplay && getActiveLayer() != itmp )
{
m_canvas->Refresh();
}
setActiveLayer( itmp );
}
m_canvas->MoveCursorToCrossHair();
break;
case ID_AUX_TOOLBAR_PCB_SELECT_LAYER_PAIR:
SelectCopperLayerPair();
break;
case ID_POPUP_PCB_SELECT_NO_CU_LAYER:
itmp = SelectLayer( getActiveLayer(), ALL_CU_LAYERS );
if( itmp >= 0 )
setActiveLayer( itmp );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_SELECT_CU_LAYER:
itmp = SelectLayer( getActiveLayer(), ALL_NO_CU_LAYERS );
if( itmp >= 0 )
setActiveLayer( itmp );
break;
case ID_POPUP_PCB_SELECT_LAYER_PAIR:
SelectCopperLayerPair();
m_canvas->MoveCursorToCrossHair();
break;
case ID_TOOLBARH_PCB_SELECT_LAYER:
setActiveLayer( m_SelLayerBox->GetLayerSelection() );
if( DisplayOpt.ContrastModeDisplay )
m_canvas->Refresh( true );
break;
case ID_POPUP_PCB_EDIT_TEXTEPCB:
InstallTextPCBOptionsFrame( (TEXTE_PCB*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_ROTATE_TEXTEPCB:
Rotate_Texte_Pcb( (TEXTE_PCB*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_COPY_TEXTEPCB:
CreateTextePcb( &dc, (TEXTE_PCB*) GetCurItem() );
m_canvas->MoveCursorToCrossHair();
m_canvas->SetAutoPanRequest( true );
break;
case ID_POPUP_PCB_FLIP_TEXTEPCB:
FlipTextePcb( (TEXTE_PCB*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DELETE_TEXTEPCB:
Delete_Texte_Pcb( (TEXTE_PCB*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_MOVE_MIRE_REQUEST:
BeginMoveTarget( (PCB_TARGET*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_EDIT_MIRE:
ShowTargetOptionsDialog( (PCB_TARGET*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DELETE_MIRE:
m_canvas->MoveCursorToCrossHair();
DeleteTarget( (PCB_TARGET*) GetCurItem(), &dc );
SetCurItem( NULL );
break;
case ID_POPUP_PCB_DELETE_DIMENSION:
m_canvas->MoveCursorToCrossHair();
DeleteDimension( (DIMENSION*) GetCurItem(), &dc );
SetCurItem( NULL );
break;
case ID_POPUP_PCB_EDIT_DIMENSION:
ShowDimensionPropertyDialog( (DIMENSION*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_MOVE_TEXT_DIMENSION_REQUEST:
BeginMoveDimensionText( (DIMENSION*) GetCurItem(), &dc );
break;
case ID_POPUP_PCB_DELETE_DRAWING:
Delete_Segment_Edge( (DRAWSEGMENT*) GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DELETE_MARKER:
RemoveStruct( GetCurItem(), &dc );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_GETINFO_MARKER:
if( GetCurItem() && GetCurItem()->Type() == PCB_MARKER_T )
( (MARKER_PCB*) GetCurItem() )->DisplayMarkerInfo( this );
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_DELETE_DRAWING_LAYER:
if( GetCurItem()->GetFlags() != 0 )
break;
Delete_Drawings_All_Layer( GetCurItem()->GetLayer() );
SetCurItem( NULL );
m_canvas->MoveCursorToCrossHair();
m_canvas->Refresh();
break;
case ID_POPUP_PCB_EDIT_DRAWING:
#ifndef USE_WX_OVERLAY
InstallGraphicItemPropertiesDialog( (DRAWSEGMENT*) GetCurItem(), &dc );
#else
// #1277772 - Draw into dialog converted in refresh request
InstallGraphicItemPropertiesDialog( (DRAWSEGMENT*) GetCurItem(), NULL );
m_canvas->Refresh();
#endif
m_canvas->MoveCursorToCrossHair();
break;
case ID_POPUP_PCB_MOVE_DRAWING_REQUEST:
m_canvas->MoveCursorToCrossHair();
Start_Move_DrawItem( (DRAWSEGMENT*) GetCurItem(), &dc );
break;
case ID_POPUP_PCB_STOP_CURRENT_DRAWING:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem() && (GetCurItem()->IsNew()) )
{
End_Edge( (DRAWSEGMENT*) GetCurItem(), &dc );
SetCurItem( NULL );
}
break;
case ID_POPUP_PCB_STOP_CURRENT_EDGE_ZONE:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem() && (GetCurItem()->IsNew()) )
{
if( End_Zone( &dc ) )
SetCurItem( NULL );
}
m_canvas->SetAutoPanRequest( false );
break;
case ID_POPUP_PCB_DELETE_ZONE_LAST_CREATED_CORNER:
m_canvas->MoveCursorToCrossHair();
if( GetCurItem() && (GetCurItem()->IsNew()) )
{
if( Delete_LastCreatedCorner( &dc ) == 0 ) // No more segment in outline,
SetCurItem( NULL );
}
break;
case ID_POPUP_PCB_MOVE_TRACK_SEGMENT:
m_canvas->MoveCursorToCrossHair();
StartMoveOneNodeOrSegment( (TRACK*) GetScreen()->GetCurItem(), &dc, id );
break;
case ID_POPUP_PCB_DRAG_TRACK_SEGMENT:
case ID_POPUP_PCB_MOVE_TRACK_NODE:
m_canvas->MoveCursorToCrossHair();
StartMoveOneNodeOrSegment( (TRACK*) GetScreen()->GetCurItem(), &dc, id );
break;
case ID_POPUP_PCB_DRAG_TRACK_SEGMENT_KEEP_SLOPE:
m_canvas->MoveCursorToCrossHair();
Start_DragTrackSegmentAndKeepSlope( (TRACK*) GetScreen()->GetCurItem(), &dc );
break;
case ID_POPUP_PCB_BREAK_TRACK:
m_canvas->MoveCursorToCrossHair();
{
TRACK* track = (TRACK*) GetScreen()->GetCurItem();
wxPoint pos = GetCrossHairPosition();
track->Draw( m_canvas, &dc, GR_XOR );
PICKED_ITEMS_LIST itemsListPicker;
TRACK* newtrack = GetBoard()->CreateLockPoint( pos, track, &itemsListPicker );
SaveCopyInUndoList( itemsListPicker, UR_UNSPECIFIED );
track->Draw( m_canvas, &dc, GR_XOR );
newtrack->Draw( m_canvas, &dc, GR_XOR );
// compute the new ratsnest, because connectivity could change
TestNetConnection( &dc, track->GetNetCode() );
}
break;
case ID_MENU_PCB_CLEAN:
Clean_Pcb();
break;
case ID_MENU_PCB_SWAP_LAYERS:
Swap_Layers( event );
break;
case ID_PCB_USER_GRID_SETUP:
InvokeDialogGrid();
break;
case ID_POPUP_PCB_DISPLAY_FOOTPRINT_DOC:
{
wxConfigBase* cfg = Pgm().CommonSettings();
cfg->Read( wxT( "module_doc_file" ), g_DocModulesFileName );
GetAssociatedDocument( this, g_DocModulesFileName, &Kiface().KifaceSearch() );
}
break;
case ID_MENU_ARCHIVE_NEW_MODULES:
ArchiveModulesOnBoard( true );
break;
case ID_MENU_ARCHIVE_ALL_MODULES:
ArchiveModulesOnBoard( false );
break;
case ID_GEN_IMPORT_DXF_FILE:
InvokeDXFDialogImport( this );
m_canvas->Refresh();
break;
default:
wxString msg;
msg.Printf( wxT( "PCB_EDIT_FRAME::Process_Special_Functions() unknown event id %d" ),
id );
DisplayError( this, msg );
break;
}
m_canvas->CrossHairOn( &dc );
m_canvas->SetIgnoreMouseEvents( false );
}
// Delete null length segments, and intermediate points ..
bool TRACKS_CLEANER::clean_segments()
{
bool modified = false;
TRACK* segment, * nextsegment;
TRACK* other;
int flag, no_inc;
// Delete null segments
for( segment = m_Brd->m_Track; segment; segment = nextsegment )
{
nextsegment = segment->Next();
if( segment->IsNull() ) // Length segment = 0; delete it
segment->DeleteStructure();
}
// Delete redundant segments, i.e. segments having the same end points
// and layers
for( segment = m_Brd->m_Track; segment; segment = segment->Next() )
{
for( other = segment->Next(); other; other = nextsegment )
{
nextsegment = other->Next();
bool erase = false;
if( segment->Type() != other->Type() )
continue;
if( segment->GetLayer() != other->GetLayer() )
continue;
if( segment->GetNetCode() != other->GetNetCode() )
break;
if( ( segment->GetStart() == other->GetStart() ) &&
( segment->GetEnd() == other->GetEnd() ) )
erase = true;
if( ( segment->GetStart() == other->GetEnd() ) &&
( segment->GetEnd() == other->GetStart() ) )
erase = true;
// Delete redundant point
if( erase )
{
other->DeleteStructure();
modified = true;
}
}
}
// merge collinear segments:
for( segment = m_Brd->m_Track; segment; segment = nextsegment )
{
TRACK* segStart;
TRACK* segEnd;
TRACK* segDelete;
nextsegment = segment->Next();
if( segment->Type() != PCB_TRACE_T )
continue;
flag = no_inc = 0;
// search for a possible point connected to the START point of the current segment
for( segStart = segment->Next(); ; )
{
segStart = segment->GetTrace( segStart, NULL, FLG_START );
if( segStart )
{
// the two segments must have the same width
if( segment->GetWidth() != segStart->GetWidth() )
break;
// it cannot be a via
if( segStart->Type() != PCB_TRACE_T )
break;
// We must have only one segment connected
segStart->SetState( BUSY, true );
other = segment->GetTrace( m_Brd->m_Track, NULL, FLG_START );
segStart->SetState( BUSY, false );
if( other == NULL )
flag = 1; // OK
break;
}
break;
}
if( flag ) // We have the starting point of the segment is connected to an other segment
{
segDelete = mergeCollinearSegmentIfPossible( segment, segStart, FLG_START );
if( segDelete )
{
no_inc = 1;
segDelete->DeleteStructure();
modified = true;
}
}
// search for a possible point connected to the END point of the current segment:
for( segEnd = segment->Next(); ; )
{
segEnd = segment->GetTrace( segEnd, NULL, FLG_END );
if( segEnd )
{
if( segment->GetWidth() != segEnd->GetWidth() )
break;
if( segEnd->Type() != PCB_TRACE_T )
break;
// We must have only one segment connected
segEnd->SetState( BUSY, true );
other = segment->GetTrace( m_Brd->m_Track, NULL, FLG_END );
segEnd->SetState( BUSY, false );
if( other == NULL )
flag |= 2; // Ok
break;
}
else
{
break;
}
}
if( flag & 2 ) // We have the ending point of the segment is connected to an other segment
{
segDelete = mergeCollinearSegmentIfPossible( segment, segEnd, FLG_END );
if( segDelete )
{
no_inc = 1;
segDelete->DeleteStructure();
modified = true;
}
}
if( no_inc ) // The current segment was modified, retry to merge it
nextsegment = segment->Next();
}
return modified;
}
void ZONE_CONTAINER::buildFeatureHoleList( BOARD* aPcb, SHAPE_POLY_SET& aFeatures )
{
int segsPerCircle;
double correctionFactor;
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
correctionFactor = 1.0 / cos( M_PI / (double) segsPerCircle );
aFeatures.RemoveAllContours();
int outline_half_thickness = m_ZoneMinThickness / 2;
int zone_clearance = std::max( m_ZoneClearance, GetClearance() );
zone_clearance += outline_half_thickness;
/* store holes (i.e. tracks and pads areas as polygons outlines)
* in a polygon list
*/
/* items ouside the zone bounding box are skipped
* the bounding box is the zone bounding box + the biggest clearance found in Netclass list
*/
EDA_RECT item_boundingbox;
EDA_RECT zone_boundingbox = GetBoundingBox();
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
PAD_SHAPE_OVAL : PAD_SHAPE_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + outline_half_thickness;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( aFeatures,
clearance,
segsPerCircle,
correctionFactor );
}
continue;
}
// Pads are removed from zone if the setup is PAD_ZONE_CONN_NONE
if( GetPadConnection( pad ) == PAD_ZONE_CONN_NONE )
{
int gap = zone_clearance;
int thermalGap = GetThermalReliefGap( pad );
gap = std::max( gap, thermalGap );
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( gap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
pad->TransformShapeWithClearanceToPolygon( aFeatures,
gap,
segsPerCircle,
correctionFactor );
}
}
}
}
/* Add holes (i.e. tracks and vias areas as polygons outlines)
* in cornerBufferPolysToSubstract
*/
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNetCode() == GetNetCode() && (GetNetCode() != 0) )
continue;
item_clearance = track->GetClearance() + outline_half_thickness;
item_boundingbox = track->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
track->TransformShapeWithClearanceToPolygon( aFeatures,
clearance,
segsPerCircle,
correctionFactor );
}
}
/* Add module edge items that are on copper layers
* Pcbnew allows these items to be on copper layers in microwave applictions
* This is a bad thing, but must be handled here, until a better way is found
*/
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() )
{
if( !item->IsOnLayer( GetLayer() ) && !item->IsOnLayer( Edge_Cuts ) )
continue;
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
( (EDGE_MODULE*) item )->TransformShapeWithClearanceToPolygon(
aFeatures, zone_clearance,
segsPerCircle, correctionFactor );
}
}
}
// Add graphic items (copper texts) and board edges
for( BOARD_ITEM* item = aPcb->m_Drawings; item; item = item->Next() )
{
if( item->GetLayer() != GetLayer() && item->GetLayer() != Edge_Cuts )
continue;
switch( item->Type() )
{
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
aFeatures,
zone_clearance, segsPerCircle, correctionFactor );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformBoundingBoxWithClearanceToPolygon(
aFeatures, zone_clearance );
break;
default:
break;
}
}
// Add zones outlines having an higher priority and keepout
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetBoard()->GetArea( ii );
if( zone->GetLayer() != GetLayer() )
continue;
if( !zone->GetIsKeepout() && zone->GetPriority() <= GetPriority() )
continue;
if( zone->GetIsKeepout() && ! zone->GetDoNotAllowCopperPour() )
continue;
// A highter priority zone or keepout area is found: remove this area
item_boundingbox = zone->GetBoundingBox();
if( !item_boundingbox.Intersects( zone_boundingbox ) )
continue;
// Add the zone outline area.
// However if the zone has the same net as the current zone,
// do not add any clearance.
// the zone will be connected to the current zone, but filled areas
// will use different parameters (clearance, thermal shapes )
bool same_net = GetNetCode() == zone->GetNetCode();
bool use_net_clearance = true;
int min_clearance = zone_clearance;
// Do not forget to make room to draw the thick outlines
// of the hole created by the area of the zone to remove
int holeclearance = zone->GetClearance() + outline_half_thickness;
// The final clearance is obviously the max value of each zone clearance
min_clearance = std::max( min_clearance, holeclearance );
if( zone->GetIsKeepout() || same_net )
{
// Just take in account the fact the outline has a thickness, so
// the actual area to substract is inflated to take in account this fact
min_clearance = outline_half_thickness;
use_net_clearance = false;
}
zone->TransformOutlinesShapeWithClearanceToPolygon(
aFeatures,
min_clearance, use_net_clearance );
}
// Remove thermal symbols
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
{
// Rejects non-standard pads with tht-only thermal reliefs
if( GetPadConnection( pad ) == PAD_ZONE_CONN_THT_THERMAL
&& pad->GetAttribute() != PAD_ATTRIB_STANDARD )
continue;
if( GetPadConnection( pad ) != PAD_ZONE_CONN_THERMAL
&& GetPadConnection( pad ) != PAD_ZONE_CONN_THT_THERMAL )
continue;
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNetCode() != GetNetCode() )
continue;
item_boundingbox = pad->GetBoundingBox();
int thermalGap = GetThermalReliefGap( pad );
item_boundingbox.Inflate( thermalGap, thermalGap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
CreateThermalReliefPadPolygon( aFeatures,
*pad, thermalGap,
GetThermalReliefCopperBridge( pad ),
m_ZoneMinThickness,
segsPerCircle,
correctionFactor, s_thermalRot );
}
}
}
}
/**
* Function Test_Connection_To_Copper_Areas
* init .m_ZoneSubnet parameter in tracks and pads according to the connections to areas found
* @param aNetcode = netcode to analyse. if -1, analyse all nets
*/
void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
{
// list of pads and tracks candidates on this layer and on this net.
// It is static to avoid multiple memory realloc.
static std::vector <BOARD_CONNECTED_ITEM*> candidates;
// clear .m_ZoneSubnet parameter for pads
for( MODULE* module = m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad; pad = pad->Next() )
if( aNetcode < 0 || aNetcode == pad->GetNetCode() )
pad->SetZoneSubNet( 0 );
}
// clear .m_ZoneSubnet parameter for tracks and vias
for( TRACK* track = m_Track; track; track = track->Next() )
{
if( aNetcode < 0 || aNetcode == track->GetNetCode() )
track->SetZoneSubNet( 0 );
}
// examine all zones, net by net:
int subnet = 0;
// Build zones candidates list
std::vector<ZONE_CONTAINER*> zones_candidates;
zones_candidates.reserve( GetAreaCount() );
for( int index = 0; index < GetAreaCount(); index++ )
{
ZONE_CONTAINER* zone = GetArea( index );
if( !zone->IsOnCopperLayer() )
continue;
if( aNetcode >= 0 && aNetcode != zone->GetNetCode() )
continue;
if( zone->GetFilledPolysList().GetCornersCount() == 0 )
continue;
zones_candidates.push_back( zone );
}
// sort them by netcode then vertices count.
// For a given net, examine the smaller zones first slightly speed up calculation
// (25% faster)
// this is only noticeable with very large boards and depends on board zones topology
// This is due to the fact some items are connected by small zones ares,
// before examining large zones areas and these items are not tested after a connection is found
sort( zones_candidates.begin(), zones_candidates.end(), sort_areas );
int oldnetcode = -1;
for( unsigned idx = 0; idx < zones_candidates.size(); idx++ )
{
ZONE_CONTAINER* zone = zones_candidates[idx];
int netcode = zone->GetNetCode();
// Build a list of candidates connected to the net:
// At this point, layers are not considered, because areas on different layers can
// be connected by a via or a pad.
// (because zones are sorted by netcode, there is made only once per net)
NETINFO_ITEM* net = FindNet( netcode );
wxASSERT( net );
if( net == NULL )
continue;
if( oldnetcode != netcode )
{
oldnetcode = netcode;
candidates.clear();
// Build the list of pads candidates connected to the net:
candidates.reserve( net->m_PadInNetList.size() );
for( unsigned ii = 0; ii < net->m_PadInNetList.size(); ii++ )
candidates.push_back( net->m_PadInNetList[ii] );
// Build the list of track candidates connected to the net:
TRACK* track = m_Track.GetFirst()->GetStartNetCode( netcode );
for( ; track; track = track->Next() )
{
if( track->GetNetCode() != netcode )
break;
candidates.push_back( track );
}
}
// test if a candidate is inside a filled area of this zone
unsigned indexstart = 0, indexend;
const CPOLYGONS_LIST& polysList = zone->GetFilledPolysList();
for( indexend = 0; indexend < polysList.GetCornersCount(); indexend++ )
{
// end of a filled sub-area found
if( polysList.IsEndContour( indexend ) )
{
subnet++;
EDA_RECT bbox = zone->CalculateSubAreaBoundaryBox( indexstart, indexend );
for( unsigned ic = 0; ic < candidates.size(); ic++ )
{
// test if this area is connected to a board item:
BOARD_CONNECTED_ITEM* item = candidates[ic];
if( item->GetZoneSubNet() == subnet ) // Already merged
continue;
if( !item->IsOnLayer( zone->GetLayer() ) )
continue;
wxPoint pos1, pos2;
if( item->Type() == PCB_PAD_T )
{
// For pads we use the shape position instead of
// the pad position, because the zones are connected
// to the center of the shape, not the pad position
// (this is important for pads with thermal relief)
pos1 = pos2 = ( (D_PAD*) item )->ShapePos();
}
else if( item->Type() == PCB_VIA_T )
{
const VIA *via = static_cast<const VIA*>( item );
pos1 = via->GetStart();
pos2 = pos1;
}
else if( item->Type() == PCB_TRACE_T )
{
const TRACK *trk = static_cast<const TRACK*>( item );
pos1 = trk->GetStart();
pos2 = trk->GetEnd();
}
else
{
continue;
}
bool connected = false;
if( bbox.Contains( pos1 ) )
{
if( TestPointInsidePolygon( polysList, indexstart,
indexend, pos1.x, pos1.y ) )
connected = true;
}
if( !connected && (pos1 != pos2 ) )
{
if( bbox.Contains( pos2 ) )
{
if( TestPointInsidePolygon( polysList,
indexstart, indexend,
pos2.x, pos2.y ) )
connected = true;
}
}
if( connected )
{
// Set ZoneSubnet to the current subnet value.
// If the previous subnet is not 0, merge all items with old subnet
// to the new one
int old_subnet = item->GetZoneSubNet();
item->SetZoneSubNet( subnet );
// Merge previous subnet with the current
if( (old_subnet > 0) && (old_subnet != subnet) )
{
for( unsigned jj = 0; jj < candidates.size(); jj++ )
{
BOARD_CONNECTED_ITEM* item_to_merge = candidates[jj];
if( old_subnet == item_to_merge->GetZoneSubNet() )
{
item_to_merge->SetZoneSubNet( subnet );
}
}
} // End if ( old_subnet > 0 )
} // End if( connected )
}
// End test candidates for the current filled area
indexstart = indexend + 1; // prepare test next area, starting at indexend+1
// (if exists). End read one area in
// zone->m_FilledPolysList
}
} // End read all segments in zone
} // End read all zones candidates
}
/**
* Function Merge_SubNets_Connected_By_CopperAreas(BOARD* aPcb, int aNetcode)
* Used after connections by tracks calculations
* Merge subnets, in tracks ans pads when they are connected by a filled copper area
* for pads, this is the .m_physical_connexion member which is tested and modified
* for tracks, this is the .m_Subnet member which is tested and modified
* these members are block numbers (or cluster numbers) for a given net,
* calculated by Build_Pads_Info_Connections_By_Tracks()
* The result is merging 2 blocks (or subnets)
* @param aPcb = the current board
* @param aNetcode = netcode to consider
*/
void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb, int aNetcode )
{
// Ensure a zone with the given netcode exists: examine all zones:
bool found = false;
for( int index = 0; index < aPcb->GetAreaCount(); index++ )
{
ZONE_CONTAINER* zone = aPcb->GetArea( index );
if( aNetcode == zone->GetNetCode() )
{
found = true;
break;
}
}
if( !found ) // No zone with this netcode, therefore no connection by zone
return;
// list of pads and tracks candidates to test:
// It is static to avoid multiple memory realloc.
static std::vector <BOARD_CONNECTED_ITEM*> Candidates;
Candidates.clear();
// Build the list of pads candidates connected to the net:
NETINFO_ITEM* net = aPcb->FindNet( aNetcode );
wxASSERT( net );
Candidates.reserve( net->m_PadInNetList.size() );
for( unsigned ii = 0; ii < net->m_PadInNetList.size(); ii++ )
Candidates.push_back( net->m_PadInNetList[ii] );
// Build the list of track candidates connected to the net:
TRACK* track;
track = aPcb->m_Track.GetFirst()->GetStartNetCode( aNetcode );
for( ; track; track = track->Next() )
{
if( track->GetNetCode() != aNetcode )
break;
Candidates.push_back( track );
}
if( Candidates.size() == 0 )
return;
int next_subnet_free_number = 0;
for( unsigned ii = 0; ii < Candidates.size(); ii++ )
{
int subnet = Candidates[ii]->GetSubNet();
next_subnet_free_number = std::max( next_subnet_free_number, subnet );
}
next_subnet_free_number++; // This is a subnet we can use with not connected items
// by tracks, but connected by zone.
// Sort by zone_subnet:
sort( Candidates.begin(), Candidates.end(), CmpZoneSubnetValue );
// Some items can be not connected, but they can be connected to a filled area:
// give them a subnet common to these items connected only by the area,
// and not already used.
// a value like next_subnet_free_number+zone_subnet is right
for( unsigned jj = 0; jj < Candidates.size(); jj++ )
{
BOARD_CONNECTED_ITEM* item = Candidates[jj];
if ( item->GetSubNet() == 0 && (item->GetZoneSubNet() > 0) )
{
item->SetSubNet( next_subnet_free_number + item->GetZoneSubNet() );
}
}
// Now, for each zone subnet, we search for 2 items with different subnets.
// if found, the 2 subnet are merged in the whole candidate list.
int old_subnet = 0;
int old_zone_subnet = 0;
for( unsigned ii = 0; ii < Candidates.size(); ii++ )
{
BOARD_CONNECTED_ITEM* item = Candidates[ii];
int zone_subnet = item->GetZoneSubNet();
if( zone_subnet == 0 ) // Not connected by a filled area, skip it
continue;
int subnet = item->GetSubNet();
if( zone_subnet != old_zone_subnet ) // a new zone subnet is found
{
old_subnet = subnet;
old_zone_subnet = zone_subnet;
continue;
}
zone_subnet = old_zone_subnet;
// 2 successive items already from the same cluster: nothing to do
if( subnet == old_subnet )
continue;
// Here we have 2 items connected by the same area have 2 differents subnets: merge subnets
if( (subnet > old_subnet) || ( subnet <= 0) )
EXCHG( subnet, old_subnet );
for( unsigned jj = 0; jj < Candidates.size(); jj++ )
{
BOARD_CONNECTED_ITEM * item_to_merge = Candidates[jj];
if( item_to_merge->GetSubNet() == old_subnet )
item_to_merge->SetSubNet( subnet );
}
old_subnet = subnet;
}
}
/**
* Function AddClearanceAreasPolygonsToPolysList
* Supports a min thickness area constraint.
* Add non copper areas polygons (pads and tracks with clearance)
* to the filled copper area found
* in BuildFilledPolysListData after calculating filled areas in a zone
* Non filled copper areas are pads and track and their clearance areas
* The filled copper area must be computed just before.
* BuildFilledPolysListData() call this function just after creating the
* filled copper area polygon (without clearance areas)
* to do that this function:
* 1 - Creates the main outline (zone outline) using a correction to shrink the resulting area
* with m_ZoneMinThickness/2 value.
* The result is areas with a margin of m_ZoneMinThickness/2
* When drawing outline with segments having a thickness of m_ZoneMinThickness, the
* outlines will match exactly the initial outlines
* 3 - Add all non filled areas (pads, tracks) in group B with a clearance of m_Clearance +
* m_ZoneMinThickness/2
* in a buffer
* - If Thermal shapes are wanted, add non filled area, in order to create these thermal shapes
* 4 - calculates the polygon A - B
* 5 - put resulting list of polygons (filled areas) in m_FilledPolysList
* This zone contains pads with the same net.
* 6 - Remove insulated copper islands
* 7 - If Thermal shapes are wanted, remove unconnected stubs in thermal shapes:
* creates a buffer of polygons corresponding to stubs to remove
* sub them to the filled areas.
* Remove new insulated copper islands
*/
void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
{
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
s_CircleToSegmentsCount = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
s_CircleToSegmentsCount = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
s_Correction = 1.0 / cos( M_PI / s_CircleToSegmentsCount );
// This KI_POLYGON_SET is the area(s) to fill, with m_ZoneMinThickness/2
KI_POLYGON_SET polyset_zone_solid_areas;
int margin = m_ZoneMinThickness / 2;
/* First, creates the main polygon (i.e. the filled area using only one outline)
* to reserve a m_ZoneMinThickness/2 margin around the outlines and holes
* this margin is the room to redraw outlines with segments having a width set to
* m_ZoneMinThickness
* so m_ZoneMinThickness is the min thickness of the filled zones areas
* the main polygon is stored in polyset_zone_solid_areas
*/
CopyPolygonsFromFilledPolysListToKiPolygonList( polyset_zone_solid_areas );
polyset_zone_solid_areas -= margin;
if( polyset_zone_solid_areas.size() == 0 )
return;
/* Calculates the clearance value that meet DRC requirements
* from m_ZoneClearance and clearance from the corresponding netclass
* We have a "local" clearance in zones because most of time
* clearance between a zone and others items is bigger than the netclass clearance
* this is more true for small clearance values
* Note also the "local" clearance is used for clearance between non copper items
* or items like texts on copper layers
*/
int zone_clearance = std::max( m_ZoneClearance, GetClearance() );
zone_clearance += margin;
/* store holes (i.e. tracks and pads areas as polygons outlines)
* in a polygon list
*/
/* items ouside the zone bounding box are skipped
* the bounding box is the zone bounding box + the biggest clearance found in Netclass list
*/
EDA_RECT item_boundingbox;
EDA_RECT zone_boundingbox = GetBoundingBox();
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
// static to avoid unnecessary memory allocation when filling many zones.
static CPOLYGONS_LIST cornerBufferPolysToSubstract;
cornerBufferPolysToSubstract.RemoveAllContours();
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_OBLONG ?
PAD_OVAL : PAD_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + margin;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
clearance,
s_CircleToSegmentsCount,
s_Correction );
}
continue;
}
if( ( GetPadConnection( pad ) == PAD_NOT_IN_ZONE )
|| ( pad->GetShape() == PAD_TRAPEZOID ) )
// PAD_TRAPEZOID shapes are not in zones because they are used in microwave apps
// and i think it is good that shapes are not changed by thermal pads or others
{
int gap = zone_clearance;
int thermalGap = GetThermalReliefGap( pad );
gap = std::max( gap, thermalGap );
item_boundingbox = pad->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
pad->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
gap,
s_CircleToSegmentsCount,
s_Correction );
}
}
}
}
/* Add holes (i.e. tracks and vias areas as polygons outlines)
* in cornerBufferPolysToSubstract
*/
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNetCode() == GetNetCode() && (GetNetCode() != 0) )
continue;
item_clearance = track->GetClearance() + margin;
item_boundingbox = track->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
track->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
clearance,
s_CircleToSegmentsCount,
s_Correction );
}
}
/* Add module edge items that are on copper layers
* Pcbnew allows these items to be on copper layers in microwave applictions
* This is a bad thing, but must be handled here, until a better way is found
*/
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() )
{
if( !item->IsOnLayer( GetLayer() ) && !item->IsOnLayer( Edge_Cuts ) )
continue;
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
( (EDGE_MODULE*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract, zone_clearance,
s_CircleToSegmentsCount, s_Correction );
}
}
}
// Add graphic items (copper texts) and board edges
for( BOARD_ITEM* item = aPcb->m_Drawings; item; item = item->Next() )
{
if( item->GetLayer() != GetLayer() && item->GetLayer() != Edge_Cuts )
continue;
switch( item->Type() )
{
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance, s_CircleToSegmentsCount, s_Correction );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformBoundingBoxWithClearanceToPolygon(
cornerBufferPolysToSubstract, zone_clearance );
break;
default:
break;
}
}
// Add zones outlines having an higher priority and keepout
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetBoard()->GetArea( ii );
if( zone->GetLayer() != GetLayer() )
continue;
if( !zone->GetIsKeepout() && zone->GetPriority() <= GetPriority() )
continue;
if( zone->GetIsKeepout() && ! zone->GetDoNotAllowCopperPour() )
continue;
// A highter priority zone or keepout area is found: remove its area
item_boundingbox = zone->GetBoundingBox();
if( !item_boundingbox.Intersects( zone_boundingbox ) )
continue;
// Add the zone outline area.
// However if the zone has the same net as the current zone,
// do not add clearance.
// the zone will be connected to the current zone, but filled areas
// will use different parameters (clearance, thermal shapes )
bool addclearance = GetNetCode() != zone->GetNetCode();
int clearance = zone_clearance;
if( zone->GetIsKeepout() )
{
addclearance = true;
clearance = m_ZoneMinThickness / 2;
}
zone->TransformOutlinesShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
clearance, addclearance );
}
// Remove thermal symbols
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
{
// Rejects non-standard pads with tht-only thermal reliefs
if( GetPadConnection( pad ) == THT_THERMAL
&& pad->GetAttribute() != PAD_STANDARD )
continue;
if( GetPadConnection( pad ) != THERMAL_PAD
&& GetPadConnection( pad ) != THT_THERMAL )
continue;
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNetCode() != GetNetCode() )
continue;
item_boundingbox = pad->GetBoundingBox();
int thermalGap = GetThermalReliefGap( pad );
item_boundingbox.Inflate( thermalGap, thermalGap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
CreateThermalReliefPadPolygon( cornerBufferPolysToSubstract,
*pad, thermalGap,
GetThermalReliefCopperBridge( pad ),
m_ZoneMinThickness,
s_CircleToSegmentsCount,
s_Correction, s_thermalRot );
}
}
}
// cornerBufferPolysToSubstract contains polygons to substract.
// polyset_zone_solid_areas contains the main filled area
// Calculate now actual solid areas
if( cornerBufferPolysToSubstract.GetCornersCount() > 0 )
{
KI_POLYGON_SET polyset_holes;
cornerBufferPolysToSubstract.ExportTo( polyset_holes );
// Remove holes from initial area.:
polyset_zone_solid_areas -= polyset_holes;
}
// put solid areas in m_FilledPolysList:
m_FilledPolysList.RemoveAllContours();
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
// Remove insulated islands:
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
// Now we remove all unused thermal stubs.
cornerBufferPolysToSubstract.RemoveAllContours();
// Test thermal stubs connections and add polygons to remove unconnected stubs.
// (this is a refinement for thermal relief shapes)
if( GetNetCode() > 0 )
BuildUnconnectedThermalStubsPolygonList( cornerBufferPolysToSubstract, aPcb, this,
s_Correction, s_thermalRot );
// remove copper areas corresponding to not connected stubs
if( cornerBufferPolysToSubstract.GetCornersCount() )
{
KI_POLYGON_SET polyset_holes;
cornerBufferPolysToSubstract.ExportTo( polyset_holes );
// Remove unconnected stubs
polyset_zone_solid_areas -= polyset_holes;
// put these areas in m_FilledPolysList
m_FilledPolysList.RemoveAllContours();
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
}
cornerBufferPolysToSubstract.RemoveAllContours();
}
/**
* Function Magnetize
* tests to see if there are any magnetic items within near reach of the given
* "curpos". If yes, then curpos is adjusted appropriately according to that
* near magnetic item and true is returned.
* @param frame = the current frame
* @param aCurrentTool = the current tool id (from vertical right toolbar)
* @param aGridSize = the current grid size
* @param on_grid = the on grid position near initial position ( often on_grid = curpos)
* @param curpos The initial position, and what to adjust if a change is needed.
* @return bool - true if the position was adjusted magnetically, else false.
*/
bool Magnetize( PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize aGridSize,
wxPoint on_grid, wxPoint* curpos )
{
bool doCheckNet = g_MagneticPadOption != capture_always && g_Drc_On;
bool doTrack = false;
bool doPad = false;
bool amMovingVia = false;
BOARD* m_Pcb = frame->GetBoard();
TRACK* currTrack = g_CurrentTrackSegment;
BOARD_ITEM* currItem = frame->GetCurItem();
PCB_SCREEN* screen = frame->GetScreen();
wxPoint pos = frame->RefPos( true );
// D( printf( "currTrack=%p currItem=%p currTrack->Type()=%d currItem->Type()=%d\n", currTrack, currItem, currTrack ? currTrack->Type() : 0, currItem ? currItem->Type() : 0 ); )
if( !currTrack && currItem && currItem->Type()==PCB_VIA_T && currItem->GetFlags() )
{
// moving a VIA
currTrack = (TRACK*) currItem;
amMovingVia = true;
return false; // comment this return out and play with it.
}
else if( currItem != currTrack )
{
currTrack = NULL;
}
if( g_MagneticPadOption == capture_always )
doPad = true;
if( g_MagneticTrackOption == capture_always )
doTrack = true;
if( aCurrentTool == ID_TRACK_BUTT || amMovingVia )
{
int q = capture_cursor_in_track_tool;
if( g_MagneticPadOption == q )
doPad = true;
if( g_MagneticTrackOption == q )
doTrack = true;
}
// D(printf("doPad=%d doTrack=%d aCurrentTool=%d amMovingVia=%d\n", doPad, doTrack, aCurrentTool, amMovingVia );)
// The search precedence order is pads, then tracks/vias
if( doPad )
{
LSET layer_mask( screen->m_Active_Layer );
D_PAD* pad = m_Pcb->GetPad( pos, layer_mask );
if( pad )
{
if( doCheckNet && currTrack && currTrack->GetNetCode() != pad->GetNetCode() )
return false;
*curpos = pad->GetPosition();
return true;
}
}
// after pads, only track & via tests remain, skip them if not desired
if( doTrack )
{
LAYER_ID layer = screen->m_Active_Layer;
for( TRACK* via = m_Pcb->m_Track;
via && (via = via->GetVia( *curpos, layer )) != NULL;
via = via->Next() )
{
if( via != currTrack ) // a via cannot influence itself
{
if( !doCheckNet || !currTrack || currTrack->GetNetCode() == via->GetNetCode() )
{
*curpos = via->GetStart();
// D(printf("via hit\n");)
return true;
}
}
}
if( !currTrack )
{
LSET layers( layer );
TRACK* track = m_Pcb->GetVisibleTrack( m_Pcb->m_Track, pos, layers );
if( !track || track->Type() != PCB_TRACE_T )
{
// D(printf("!currTrack and track=%p not found, layer_mask=0x%X\n", track, layer_mask );)
return false;
}
// D( printf( "Project\n" ); )
return Project( curpos, on_grid, track );
}
/*
* In two segment mode, ignore the final segment if it's inside a grid square.
*/
if( !amMovingVia && currTrack && g_TwoSegmentTrackBuild && currTrack->Back()
&& currTrack->GetStart().x - aGridSize.x < currTrack->GetEnd().x
&& currTrack->GetStart().x + aGridSize.x > currTrack->GetEnd().x
&& currTrack->GetStart().y - aGridSize.y < currTrack->GetEnd().y
&& currTrack->GetStart().y + aGridSize.y > currTrack->GetEnd().y )
{
currTrack = currTrack->Back();
}
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
{
if( track->Type() != PCB_TRACE_T )
continue;
if( doCheckNet && currTrack && currTrack->GetNetCode() != track->GetNetCode() )
continue;
if( m_Pcb->IsLayerVisible( track->GetLayer() ) == false )
continue;
// omit the layer check if moving a via
if( !amMovingVia && !track->IsOnLayer( layer ) )
continue;
if( !track->HitTest( *curpos ) )
continue;
// D(printf( "have track prospect\n");)
if( Join( curpos, track->GetStart(), track->GetEnd(), currTrack->GetStart(), currTrack->GetEnd() ) )
{
// D(printf( "join currTrack->Type()=%d\n", currTrack->Type() );)
return true;
}
if( aCurrentTool == ID_TRACK_BUTT || amMovingVia )
{
// At this point we have a drawing mouse on a track, we are drawing
// a new track and that new track is parallel to the track the
// mouse is on. Find the nearest end point of the track under mouse
// to the mouse and return that.
double distStart = GetLineLength( *curpos, track->GetStart() );
double distEnd = GetLineLength( *curpos, track->GetEnd() );
// if track not via, or if its a via dragging but not with its adjacent track
if( currTrack->Type() != PCB_VIA_T ||
( currTrack->GetStart() != track->GetStart() && currTrack->GetStart() != track->GetEnd() ))
{
double max_dist = currTrack->GetWidth() / 2.0f;
if( distStart <= max_dist )
{
// D(printf("nearest end is start\n");)
*curpos = track->GetStart();
return true;
}
if( distEnd <= max_dist )
{
// D(printf("nearest end is end\n");)
*curpos = track->GetEnd();
return true;
}
// @todo otherwise confine curpos such that it stays centered within "track"
}
}
}
}
return false;
}
bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
{
TRACK* track;
wxPoint delta; // length on X and Y axis of segments
LSET layerMask;
int net_code_ref;
wxPoint shape_pos;
NETCLASSPTR netclass = aRefSeg->GetNetClass();
BOARD_DESIGN_SETTINGS& dsnSettings = m_pcb->GetDesignSettings();
/* In order to make some calculations more easier or faster,
* pads and tracks coordinates will be made relative to the reference segment origin
*/
wxPoint origin = aRefSeg->GetStart(); // origin will be the origin of other coordinates
m_segmEnd = delta = aRefSeg->GetEnd() - origin;
m_segmAngle = 0;
layerMask = aRefSeg->GetLayerSet();
net_code_ref = aRefSeg->GetNetCode();
// Phase 0 : Test vias
if( aRefSeg->Type() == PCB_VIA_T )
{
const VIA *refvia = static_cast<const VIA*>( aRefSeg );
// test if the via size is smaller than minimum
if( refvia->GetViaType() == VIA_MICROVIA )
{
if( refvia->GetWidth() < dsnSettings.m_MicroViasMinSize )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_TOO_SMALL_MICROVIA, m_currentMarker );
return false;
}
if( refvia->GetDrillValue() < dsnSettings.m_MicroViasMinDrill )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_TOO_SMALL_MICROVIA_DRILL, m_currentMarker );
return false;
}
}
else
{
if( refvia->GetWidth() < dsnSettings.m_ViasMinSize )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_TOO_SMALL_VIA, m_currentMarker );
return false;
}
if( refvia->GetDrillValue() < dsnSettings.m_ViasMinDrill )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_TOO_SMALL_VIA_DRILL, m_currentMarker );
return false;
}
}
// test if via's hole is bigger than its diameter
// This test is necessary since the via hole size and width can be modified
// and a default via hole can be bigger than some vias sizes
if( refvia->GetDrillValue() > refvia->GetWidth() )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_VIA_HOLE_BIGGER, m_currentMarker );
return false;
}
// For microvias: test if they are blind vias and only between 2 layers
// because they are used for very small drill size and are drill by laser
// and **only one layer** can be drilled
if( refvia->GetViaType() == VIA_MICROVIA )
{
LAYER_ID layer1, layer2;
bool err = true;
refvia->LayerPair( &layer1, &layer2 );
if( layer1 > layer2 )
std::swap( layer1, layer2 );
if( layer2 == B_Cu && layer1 == m_pcb->GetDesignSettings().GetCopperLayerCount() - 2 )
err = false;
else if( layer1 == F_Cu && layer2 == In1_Cu )
err = false;
if( err )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_MICRO_VIA_INCORRECT_LAYER_PAIR, m_currentMarker );
return false;
}
}
}
else // This is a track segment
{
if( aRefSeg->GetWidth() < dsnSettings.m_TrackMinWidth )
{
m_currentMarker = fillMarker( aRefSeg, NULL,
DRCE_TOO_SMALL_TRACK_WIDTH, m_currentMarker );
return false;
}
}
// for a non horizontal or vertical segment Compute the segment angle
// in tenths of degrees and its length
if( delta.x || delta.y )
{
// Compute the segment angle in 0,1 degrees
m_segmAngle = ArcTangente( delta.y, delta.x );
// Compute the segment length: we build an equivalent rotated segment,
// this segment is horizontal, therefore dx = length
RotatePoint( &delta, m_segmAngle ); // delta.x = length, delta.y = 0
}
m_segmLength = delta.x;
/******************************************/
/* Phase 1 : test DRC track to pads : */
/******************************************/
/* Use a dummy pad to test DRC tracks versus holes, for pads not on all copper layers
* but having a hole
* This dummy pad has the size and shape of the hole
* to test tracks to pad hole DRC, using checkClearanceSegmToPad test function.
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( m_pcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
dummypad.SetLayerSet( LSET::AllCuMask() ); // Ensure the hole is on all layers
// Compute the min distance to pads
if( testPads )
{
unsigned pad_count = m_pcb->GetPadCount();
for( unsigned ii = 0; ii<pad_count; ++ii )
{
D_PAD* pad = m_pcb->GetPad( ii );
/* No problem if pads are on an other layer,
* But if a drill hole exists (a pad on a single layer can have a hole!)
* we must test the hole
*/
if( !( pad->GetLayerSet() & layerMask ).any() )
{
/* We must test the pad hole. In order to use the function
* checkClearanceSegmToPad(),a pseudo pad is used, with a shape and a
* size like the hole
*/
if( pad->GetDrillSize().x == 0 )
continue;
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetPosition( pad->GetPosition() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
PAD_SHAPE_OVAL : PAD_SHAPE_CIRCLE );
dummypad.SetOrientation( pad->GetOrientation() );
m_padToTestPos = dummypad.GetPosition() - origin;
if( !checkClearanceSegmToPad( &dummypad, aRefSeg->GetWidth(),
netclass->GetClearance() ) )
{
m_currentMarker = fillMarker( aRefSeg, pad,
DRCE_TRACK_NEAR_THROUGH_HOLE, m_currentMarker );
return false;
}
continue;
}
// The pad must be in a net (i.e pt_pad->GetNet() != 0 )
// but no problem if the pad netcode is the current netcode (same net)
if( pad->GetNetCode() // the pad must be connected
&& net_code_ref == pad->GetNetCode() ) // the pad net is the same as current net -> Ok
continue;
// DRC for the pad
shape_pos = pad->ShapePos();
m_padToTestPos = shape_pos - origin;
if( !checkClearanceSegmToPad( pad, aRefSeg->GetWidth(), aRefSeg->GetClearance( pad ) ) )
{
m_currentMarker = fillMarker( aRefSeg, pad,
DRCE_TRACK_NEAR_PAD, m_currentMarker );
return false;
}
}
}
/***********************************************/
/* Phase 2: test DRC with other track segments */
/***********************************************/
// At this point the reference segment is the X axis
// Test the reference segment with other track segments
wxPoint segStartPoint;
wxPoint segEndPoint;
for( track = aStart; track; track = track->Next() )
{
// No problem if segments have the same net code:
if( net_code_ref == track->GetNetCode() )
continue;
// No problem if segment are on different layers :
if( !( layerMask & track->GetLayerSet() ).any() )
continue;
// the minimum distance = clearance plus half the reference track
// width plus half the other track's width
int w_dist = aRefSeg->GetClearance( track );
w_dist += (aRefSeg->GetWidth() + track->GetWidth()) / 2;
// Due to many double to int conversions during calculations, which
// create rounding issues,
// the exact clearance margin cannot be really known.
// To avoid false bad DRC detection due to these rounding issues,
// slightly decrease the w_dist (remove one nanometer is enough !)
w_dist -= 1;
// If the reference segment is a via, we test it here
if( aRefSeg->Type() == PCB_VIA_T )
{
delta = track->GetEnd() - track->GetStart();
segStartPoint = aRefSeg->GetStart() - track->GetStart();
if( track->Type() == PCB_VIA_T )
{
// Test distance between two vias, i.e. two circles, trivial case
if( EuclideanNorm( segStartPoint ) < w_dist )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_VIA_NEAR_VIA, m_currentMarker );
return false;
}
}
else // test via to segment
{
// Compute l'angle du segment a tester;
double angle = ArcTangente( delta.y, delta.x );
// Compute new coordinates ( the segment become horizontal)
RotatePoint( &delta, angle );
RotatePoint( &segStartPoint, angle );
if( !checkMarginToCircle( segStartPoint, w_dist, delta.x ) )
{
m_currentMarker = fillMarker( track, aRefSeg,
DRCE_VIA_NEAR_TRACK, m_currentMarker );
return false;
}
}
continue;
}
/* We compute segStartPoint, segEndPoint = starting and ending point coordinates for
* the segment to test in the new axis : the new X axis is the
* reference segment. We must translate and rotate the segment to test
*/
segStartPoint = track->GetStart() - origin;
segEndPoint = track->GetEnd() - origin;
RotatePoint( &segStartPoint, m_segmAngle );
RotatePoint( &segEndPoint, m_segmAngle );
if( track->Type() == PCB_VIA_T )
{
if( checkMarginToCircle( segStartPoint, w_dist, m_segmLength ) )
continue;
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_NEAR_VIA, m_currentMarker );
return false;
}
/* We have changed axis:
* the reference segment is Horizontal.
* 3 cases : the segment to test can be parallel, perpendicular or have an other direction
*/
if( segStartPoint.y == segEndPoint.y ) // parallel segments
{
if( abs( segStartPoint.y ) >= w_dist )
continue;
// Ensure segStartPoint.x <= segEndPoint.x
if( segStartPoint.x > segEndPoint.x )
std::swap( segStartPoint.x, segEndPoint.x );
if( segStartPoint.x > (-w_dist) && segStartPoint.x < (m_segmLength + w_dist) ) /* possible error drc */
{
// the start point is inside the reference range
// X........
// O--REF--+
// Fine test : we consider the rounded shape of each end of the track segment:
if( segStartPoint.x >= 0 && segStartPoint.x <= m_segmLength )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_ENDS1, m_currentMarker );
return false;
}
if( !checkMarginToCircle( segStartPoint, w_dist, m_segmLength ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_ENDS2, m_currentMarker );
return false;
}
}
if( segEndPoint.x > (-w_dist) && segEndPoint.x < (m_segmLength + w_dist) )
{
// the end point is inside the reference range
// .....X
// O--REF--+
// Fine test : we consider the rounded shape of the ends
if( segEndPoint.x >= 0 && segEndPoint.x <= m_segmLength )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_ENDS3, m_currentMarker );
return false;
}
if( !checkMarginToCircle( segEndPoint, w_dist, m_segmLength ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_ENDS4, m_currentMarker );
return false;
}
}
if( segStartPoint.x <=0 && segEndPoint.x >= 0 )
{
// the segment straddles the reference range (this actually only
// checks if it straddles the origin, because the other cases where already
// handled)
// X.............X
// O--REF--+
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACK_SEGMENTS_TOO_CLOSE, m_currentMarker );
return false;
}
}
else if( segStartPoint.x == segEndPoint.x ) // perpendicular segments
{
if( ( segStartPoint.x <= (-w_dist) ) || ( segStartPoint.x >= (m_segmLength + w_dist) ) )
continue;
// Test if segments are crossing
if( segStartPoint.y > segEndPoint.y )
std::swap( segStartPoint.y, segEndPoint.y );
if( (segStartPoint.y < 0) && (segEndPoint.y > 0) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_TRACKS_CROSSING, m_currentMarker );
return false;
}
// At this point the drc error is due to an end near a reference segm end
if( !checkMarginToCircle( segStartPoint, w_dist, m_segmLength ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_ENDS_PROBLEM1, m_currentMarker );
return false;
}
if( !checkMarginToCircle( segEndPoint, w_dist, m_segmLength ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_ENDS_PROBLEM2, m_currentMarker );
return false;
}
}
else // segments quelconques entre eux
{
// calcul de la "surface de securite du segment de reference
// First rought 'and fast) test : the track segment is like a rectangle
m_xcliplo = m_ycliplo = -w_dist;
m_xcliphi = m_segmLength + w_dist;
m_ycliphi = w_dist;
// A fine test is needed because a serment is not exactly a
// rectangle, it has rounded ends
if( !checkLine( segStartPoint, segEndPoint ) )
{
/* 2eme passe : the track has rounded ends.
* we must a fine test for each rounded end and the
* rectangular zone
*/
m_xcliplo = 0;
m_xcliphi = m_segmLength;
if( !checkLine( segStartPoint, segEndPoint ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_ENDS_PROBLEM3, m_currentMarker );
return false;
}
else // The drc error is due to the starting or the ending point of the reference segment
{
// Test the starting and the ending point
segStartPoint = track->GetStart();
segEndPoint = track->GetEnd();
delta = segEndPoint - segStartPoint;
// Compute the segment orientation (angle) en 0,1 degre
double angle = ArcTangente( delta.y, delta.x );
// Compute the segment length: delta.x = length after rotation
RotatePoint( &delta, angle );
/* Comute the reference segment coordinates relatives to a
* X axis = current tested segment
*/
wxPoint relStartPos = aRefSeg->GetStart() - segStartPoint;
wxPoint relEndPos = aRefSeg->GetEnd() - segStartPoint;
RotatePoint( &relStartPos, angle );
RotatePoint( &relEndPos, angle );
if( !checkMarginToCircle( relStartPos, w_dist, delta.x ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_ENDS_PROBLEM4, m_currentMarker );
return false;
}
if( !checkMarginToCircle( relEndPos, w_dist, delta.x ) )
{
m_currentMarker = fillMarker( aRefSeg, track,
DRCE_ENDS_PROBLEM5, m_currentMarker );
return false;
}
}
}
}
}
return true;
}
void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
{
wxString msg;
if( aNetCode <= 0 ) // -1 = not existing net, 0 = dummy net
return;
if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
Compile_Ratsnest( aDC, true );
// Clear the cluster identifier (subnet) of pads for this net
for( unsigned i = 0; i < m_Pcb->GetPadCount(); ++i )
{
D_PAD* pad = m_Pcb->GetPad(i);
int pad_net_code = pad->GetNetCode();
if( pad_net_code < aNetCode )
continue;
if( pad_net_code > aNetCode )
break;
pad->SetSubNet( 0 );
}
m_Pcb->Test_Connections_To_Copper_Areas( aNetCode );
// Search for the first and the last segment relative to the given net code
if( m_Pcb->m_Track )
{
CONNECTIONS connections( m_Pcb );
TRACK* firstTrack;
TRACK* lastTrack = NULL;
firstTrack = m_Pcb->m_Track.GetFirst()->GetStartNetCode( aNetCode );
if( firstTrack )
lastTrack = firstTrack->GetEndNetCode( aNetCode );
if( firstTrack && lastTrack ) // i.e. if there are segments
{
connections.Build_CurrNet_SubNets_Connections( firstTrack, lastTrack, firstTrack->GetNetCode() );
}
}
Merge_SubNets_Connected_By_CopperAreas( m_Pcb, aNetCode );
// rebuild the active ratsnest for this net
DrawGeneralRatsnest( aDC, aNetCode );
TestForActiveLinksInRatsnest( aNetCode );
DrawGeneralRatsnest( aDC, aNetCode );
// Display results
int net_notconnected_count = 0;
NETINFO_ITEM* net = m_Pcb->FindNet( aNetCode );
if( net ) // Should not occur, but ...
{
for( unsigned ii = net->m_RatsnestStartIdx; ii < net->m_RatsnestEndIdx; ii++ )
{
if( m_Pcb->m_FullRatsnest[ii].IsActive() )
net_notconnected_count++;
}
msg.Printf( wxT( "links %d nc %d net:nc %d" ),
m_Pcb->GetRatsnestsCount(), m_Pcb->GetUnconnectedNetCount(),
net_notconnected_count );
}
else
msg.Printf( wxT( "net not found: netcode %d" ),aNetCode );
SetStatusText( msg );
return;
}
/*
* Delete dangling tracks
* Vias:
* If a via is only connected to a dangling track, it also will be removed
*/
bool TRACKS_CLEANER::deleteUnconnectedTracks()
{
if( m_Brd->m_Track == NULL )
return false;
bool modified = false;
bool item_erased = true;
while( item_erased ) // Iterate when at least one track is deleted
{
item_erased = false;
TRACK* next_track;
for( TRACK * track = m_Brd->m_Track; track ; track = next_track )
{
next_track = track->Next();
int flag_erase = 0; //Not connected indicator
int type_end = 0;
if( track->GetState( START_ON_PAD ) )
type_end |= START_ON_PAD;
if( track->GetState( END_ON_PAD ) )
type_end |= END_ON_PAD;
// if the track start point is not connected to a pad,
// test if this track start point is connected to another track
// For via test, an enhancement could be to test if connected
// to 2 items on different layers.
// Currently a via must be connected to 2 items, that can be on the same layer
LAYER_NUM top_layer, bottom_layer;
ZONE_CONTAINER* zone;
if( (type_end & START_ON_PAD ) == 0 )
{
TRACK* other = track->GetTrace( m_Brd->m_Track, NULL, FLG_START );
if( other == NULL ) // Test a connection to zones
{
if( track->Type() != PCB_VIA_T )
{
zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(),
track->GetLayer(),
track->GetLayer(),
track->GetNetCode() );
}
else
{
((SEGVIA*)track)->LayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(),
top_layer, bottom_layer,
track->GetNetCode() );
}
}
if( (other == NULL) && (zone == NULL) )
{
flag_erase |= 1;
}
else // segment, via or zone connected to this end
{
track->start = other;
// If a via is connected to this end,
// test if this via has a second item connected.
// If no, remove it with the current segment
if( other && other->Type() == PCB_VIA_T )
{
// search for another segment following the via
track->SetState( BUSY, true );
SEGVIA* via = (SEGVIA*) other;
other = via->GetTrace( m_Brd->m_Track, NULL, FLG_START );
if( other == NULL )
{
via->LayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( via->GetStart(),
bottom_layer,
top_layer,
via->GetNetCode() );
}
if( (other == NULL) && (zone == NULL) )
flag_erase |= 2;
track->SetState( BUSY, false );
}
}
}
// if track end point is not connected to a pad,
// test if this track end point is connected to an other track
if( (type_end & END_ON_PAD ) == 0 )
{
TRACK* other = track->GetTrace( m_Brd->m_Track, NULL, FLG_END );
if( other == NULL ) // Test a connection to zones
{
if( track->Type() != PCB_VIA_T )
{
zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(),
track->GetLayer(),
track->GetLayer(),
track->GetNetCode() );
}
else
{
((SEGVIA*)track)->LayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(),
top_layer, bottom_layer,
track->GetNetCode() );
}
}
if ( (other == NULL) && (zone == NULL) )
{
flag_erase |= 0x10;
}
else // segment, via or zone connected to this end
{
track->end = other;
// If a via is connected to this end, test if this via has a second item connected
// if no, remove it with the current segment
if( other && other->Type() == PCB_VIA_T )
{
// search for another segment following the via
track->SetState( BUSY, true );
SEGVIA* via = (SEGVIA*) other;
other = via->GetTrace( m_Brd->m_Track, NULL, FLG_END );
if( other == NULL )
{
via->LayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( via->GetEnd(),
bottom_layer, top_layer,
via->GetNetCode() );
}
if( (other == NULL) && (zone == NULL) )
flag_erase |= 0x20;
track->SetState( BUSY, false );
}
}
}
if( flag_erase )
{
// remove segment from board
track->DeleteStructure();
// iterate, because a track connected to the deleted track
// is now perhaps now not connected and should be deleted
item_erased = true;
modified = true;
}
}
}
return modified;
}
/* search connections between tracks and pads and propagate pad net codes to the track
* segments.
* Pads netcodes are assumed to be up to date.
*/
void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
{
// Build the net info list
GetBoard()->BuildListOfNets();
// Reset variables and flags used in computation
for( TRACK* t = m_Pcb->m_Track; t; t = t->Next() )
{
t->m_TracksConnected.clear();
t->m_PadsConnected.clear();
t->start = NULL;
t->end = NULL;
t->SetState( BUSY | IN_EDIT | BEGIN_ONPAD | END_ONPAD, false );
t->SetZoneSubNet( 0 );
t->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
// If no pad, reset pointers and netcode, and do nothing else
if( m_Pcb->GetPadCount() == 0 )
return;
CONNECTIONS connections( m_Pcb );
connections.BuildPadsList();
connections.BuildTracksCandidatesList(m_Pcb->m_Track);
// First pass: build connections between track segments and pads.
connections.SearchTracksConnectedToPads();
// For tracks connected to at least one pad,
// set the track net code to the pad netcode
for( TRACK* t = m_Pcb->m_Track; t; t = t->Next() )
{
if( t->m_PadsConnected.size() )
t->SetNetCode( t->m_PadsConnected[0]->GetNetCode() );
}
// Pass 2: build connections between track ends
for( TRACK* t = m_Pcb->m_Track; t; t = t->Next() )
{
connections.SearchConnectedTracks( t );
connections.GetConnectedTracks( t );
}
// Propagate net codes from a segment to other connected segments
bool new_pass_request = true; // set to true if a track has its netcode changed from 0
// to a known netcode to re-evaluate netcodes
// of connected items
while( new_pass_request )
{
new_pass_request = false;
for( TRACK* t = m_Pcb->m_Track; t; t = t->Next() )
{
int netcode = t->GetNetCode();
if( netcode == 0 )
{
// try to find a connected item having a netcode
for( unsigned kk = 0; kk < t->m_TracksConnected.size(); kk++ )
{
int altnetcode = t->m_TracksConnected[kk]->GetNetCode();
if( altnetcode )
{
new_pass_request = true;
netcode = altnetcode;
t->SetNetCode(netcode);
break;
}
}
}
if( netcode ) // this track has a netcode
{
// propagate this netcode to connected tracks having no netcode
for( unsigned kk = 0; kk < t->m_TracksConnected.size(); kk++ )
{
int altnetcode = t->m_TracksConnected[kk]->GetNetCode();
if( altnetcode == 0 )
{
t->m_TracksConnected[kk]->SetNetCode(netcode);
new_pass_request = true;
}
}
}
}
}
// Sort the track list by net codes:
RebuildTrackChain( m_Pcb );
}
bool PCB_EDIT_FRAME::RemoveMisConnectedTracks()
{
/* finds all track segments which are mis-connected (to more than one net).
* When such a bad segment is found, it is flagged to be removed.
* All tracks having at least one flagged segment are removed.
*/
TRACK* segment;
TRACK* other;
TRACK* next;
int net_code_s, net_code_e;
bool isModified = false;
for( segment = GetBoard()->m_Track; segment; segment = (TRACK*) segment->Next() )
{
segment->SetState( FLAG0, false );
// find the netcode for segment using anything connected to the "start" of "segment"
net_code_s = -1;
if( segment->start && segment->start->Type()==PCB_PAD_T )
{
// get the netcode of the pad to propagate.
net_code_s = ((D_PAD*)(segment->start))->GetNetCode();
}
else
{
other = segment->GetTrace( GetBoard()->m_Track, NULL, FLG_START );
if( other )
net_code_s = other->GetNetCode();
}
if( net_code_s < 0 )
continue; // the "start" of segment is not connected
// find the netcode for segment using anything connected to the "end" of "segment"
net_code_e = -1;
if( segment->end && segment->end->Type()==PCB_PAD_T )
{
net_code_e = ((D_PAD*)(segment->end))->GetNetCode();
}
else
{
other = segment->GetTrace( GetBoard()->m_Track, NULL, FLG_END );
if( other )
net_code_e = other->GetNetCode();
}
if( net_code_e < 0 )
continue; // the "end" of segment is not connected
// Netcodes do not agree, so mark the segment as "to be removed"
if( net_code_s != net_code_e )
{
segment->SetState( FLAG0, true );
}
}
// Remove tracks having a flagged segment
for( segment = GetBoard()->m_Track; segment; segment = next )
{
next = (TRACK*) segment->Next();
if( segment->GetState( FLAG0 ) ) // Segment is flagged to be removed
{
segment->SetState( FLAG0, false );
isModified = true;
GetBoard()->m_Status_Pcb = 0;
Remove_One_Track( NULL, segment );
// the current segment is deleted,
// we do not know the next "not yet tested" segment,
// so restart to the beginning
next = GetBoard()->m_Track;
}
}
return isModified;
}
/*
* This function starts a new track segment.
* If a new track segment is in progress, ends this current new segment,
* and created a new one.
*/
TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
{
TRACK* TrackOnStartPoint = NULL;
LAYER_MSK layerMask = GetLayerMask( GetScreen()->m_Active_Layer );
BOARD_CONNECTED_ITEM* LockPoint;
wxPoint pos = GetCrossHairPosition();
if( aTrack == NULL ) // Starting a new track segment
{
m_canvas->SetMouseCapture( ShowNewTrackWhenMovingCursor, Abort_Create_Track );
// Prepare the undo command info
s_ItemsListPicker.ClearListAndDeleteItems(); // Should not be necessary, but...
GetBoard()->PushHighLight();
// erase old highlight
if( GetBoard()->IsHighLightNetON() )
HighLight( aDC );
g_CurrentTrackList.PushBack( new TRACK( GetBoard() ) );
g_CurrentTrackSegment->SetFlags( IS_NEW );
GetBoard()->SetHighLightNet( 0 );
// Search for a starting point of the new track, a track or pad
LockPoint = GetBoard()->GetLockPoint( pos, layerMask );
D_PAD* pad = NULL;
if( LockPoint ) // An item (pad or track) is found
{
if( LockPoint->Type() == PCB_PAD_T )
{
pad = (D_PAD*) LockPoint;
// A pad is found: put the starting point on pad center
pos = pad->GetPosition();
GetBoard()->SetHighLightNet( pad->GetNetCode() );
}
else // A track segment is found
{
TrackOnStartPoint = (TRACK*) LockPoint;
GetBoard()->SetHighLightNet( TrackOnStartPoint->GetNetCode() );
GetBoard()->CreateLockPoint( pos, TrackOnStartPoint, &s_ItemsListPicker );
}
}
else
{
// Not a starting point, but a filled zone area can exist. This is also a
// good starting point.
ZONE_CONTAINER* zone;
zone = GetBoard()->HitTestForAnyFilledArea( pos,
GetScreen()-> m_Active_Layer,
GetScreen()-> m_Active_Layer,
-1 );
if( zone )
GetBoard()->SetHighLightNet( zone->GetNetCode() );
}
DBG( g_CurrentTrackList.VerifyListIntegrity() );
BuildAirWiresTargetsList( LockPoint, wxPoint( 0, 0 ), true );
DBG( g_CurrentTrackList.VerifyListIntegrity() );
GetBoard()->HighLightON();
GetBoard()->DrawHighLight( m_canvas, aDC, GetBoard()->GetHighLightNetCode() );
// Display info about track Net class, and init track and vias sizes:
g_CurrentTrackSegment->SetNetCode( GetBoard()->GetHighLightNetCode() );
GetDesignSettings().SetCurrentNetClass( g_CurrentTrackSegment->GetNetClassName() );
g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer );
g_CurrentTrackSegment->SetWidth( GetDesignSettings().GetCurrentTrackWidth() );
if( GetDesignSettings().m_UseConnectedTrackWidth )
{
if( TrackOnStartPoint && TrackOnStartPoint->Type() == PCB_TRACE_T )
g_CurrentTrackSegment->SetWidth( TrackOnStartPoint->GetWidth());
}
g_CurrentTrackSegment->SetStart( pos );
g_CurrentTrackSegment->SetEnd( pos );
if( pad )
{
g_CurrentTrackSegment->m_PadsConnected.push_back( pad );
// Useful to display track length, if the pad has a die length:
g_CurrentTrackSegment->SetState( BEGIN_ONPAD, true );
g_CurrentTrackSegment->start = pad;
}
if( g_TwoSegmentTrackBuild )
{
// Create 2nd segment
g_CurrentTrackList.PushBack( (TRACK*)g_CurrentTrackSegment->Clone() );
DBG( g_CurrentTrackList.VerifyListIntegrity(); );
g_CurrentTrackSegment->start = g_FirstTrackSegment;
g_FirstTrackSegment->end = g_CurrentTrackSegment;
g_FirstTrackSegment->SetState( BEGIN_ONPAD | END_ONPAD, false );
}
